tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer fixes from Thomas Gleixner:
"A small set of fixes from the timer departement:

- Add a missing timer wheel clock forward when migrating timers off a
unplugged CPU to prevent operating on a stale clock base and
missing timer deadlines.

- Use the proper shift count to extract data from a register value to
prevent evaluating unrelated bits

- Make the error return check in the FSL timer driver work correctly.
Checking an unsigned variable for less than zero does not really
work well.

- Clarify the confusing comments in the ARC timer code"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
timers: Forward timer base before migrating timers
clocksource/drivers/arc_timer: Update some comments
clocksource/drivers/mips-gic-timer: Use correct shift count to extract data
clocksource/drivers/fsl_ftm_timer: Fix error return checking

Linus Torvalds 4c4ce302 ff8d5836

+16 -5
+8 -3
drivers/clocksource/arc_timer.c
··· 251 251 int irq_reenable = clockevent_state_periodic(evt); 252 252 253 253 /* 254 - * Any write to CTRL reg ACks the interrupt, we rewrite the 255 - * Count when [N]ot [H]alted bit. 256 - * And re-arm it if perioid by [I]nterrupt [E]nable bit 254 + * 1. ACK the interrupt 255 + * - For ARC700, any write to CTRL reg ACKs it, so just rewrite 256 + * Count when [N]ot [H]alted bit. 257 + * - For HS3x, it is a bit subtle. On taken count-down interrupt, 258 + * IP bit [3] is set, which needs to be cleared for ACK'ing. 259 + * The write below can only update the other two bits, hence 260 + * explicitly clears IP bit 261 + * 2. Re-arm interrupt if periodic by writing to IE bit [0] 257 262 */ 258 263 write_aux_reg(ARC_REG_TIMER0_CTRL, irq_reenable | TIMER_CTRL_NH); 259 264
+1 -1
drivers/clocksource/fsl_ftm_timer.c
··· 281 281 282 282 static unsigned long __init ftm_clk_init(struct device_node *np) 283 283 { 284 - unsigned long freq; 284 + long freq; 285 285 286 286 freq = __ftm_clk_init(np, "ftm-evt-counter-en", "ftm-evt"); 287 287 if (freq <= 0)
+1 -1
drivers/clocksource/mips-gic-timer.c
··· 166 166 167 167 /* Set clocksource mask. */ 168 168 count_width = read_gic_config() & GIC_CONFIG_COUNTBITS; 169 - count_width >>= __fls(GIC_CONFIG_COUNTBITS); 169 + count_width >>= __ffs(GIC_CONFIG_COUNTBITS); 170 170 count_width *= 4; 171 171 count_width += 32; 172 172 gic_clocksource.mask = CLOCKSOURCE_MASK(count_width);
+6
kernel/time/timer.c
··· 1894 1894 raw_spin_lock_irq(&new_base->lock); 1895 1895 raw_spin_lock_nested(&old_base->lock, SINGLE_DEPTH_NESTING); 1896 1896 1897 + /* 1898 + * The current CPUs base clock might be stale. Update it 1899 + * before moving the timers over. 1900 + */ 1901 + forward_timer_base(new_base); 1902 + 1897 1903 BUG_ON(old_base->running_timer); 1898 1904 1899 1905 for (i = 0; i < WHEEL_SIZE; i++)