i2c: rtl9300: split data_reg into read and write reg

In RTL9607C i2c controller, there are 2 separate registers for reads
and writes as opposed the combined 1 on rtl9300 and rtl9310.

In preparation for RTL9607C support, split it up into rd_reg and wd_reg
properties and change the i2c read and write functions accordingly.

Signed-off-by: Rustam Adilov <adilov@disroot.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20260401180648.337834-2-adilov@disroot.org

authored by

Rustam Adilov and committed by

Andi Shyti 2 months ago 4c53b2eb 879766b5

+15 -10

1 changed file

expand all

drivers

i2c

busses

i2c-rtl9300.c

+15 -10

drivers/i2c/busses/i2c-rtl9300.c

··· 61 61 struct rtl9300_i2c_drv_data { 62 62 struct rtl9300_i2c_reg_field field_desc[F_NUM_FIELDS]; 63 63 int (*select_scl)(struct rtl9300_i2c *i2c, u8 scl); 64 - u32 data_reg; 64 + u32 rd_reg; 65 + u32 wd_reg; 65 66 u8 max_nchan; 66 67 }; 67 68 ··· 75 74 struct rtl9300_i2c_chan chans[RTL9310_I2C_MUX_NCHAN]; 76 75 struct regmap_field *fields[F_NUM_FIELDS]; 77 76 u32 reg_base; 78 - u32 data_reg; 77 + u32 rd_reg; 78 + u32 wd_reg; 79 79 u8 scl_num; 80 80 u8 sda_num; 81 81 struct mutex lock; ··· 173 171 if (len > 16) 174 172 return -EIO; 175 173 176 - ret = regmap_bulk_read(i2c->regmap, i2c->data_reg, vals, ARRAY_SIZE(vals)); 174 + ret = regmap_bulk_read(i2c->regmap, i2c->rd_reg, vals, ARRAY_SIZE(vals)); 177 175 if (ret) 178 176 return ret; 179 177 ··· 200 198 vals[reg] |= buf[i] << shift; 201 199 } 202 200 203 - return regmap_bulk_write(i2c->regmap, i2c->data_reg, vals, ARRAY_SIZE(vals)); 201 + return regmap_bulk_write(i2c->regmap, i2c->wd_reg, vals, ARRAY_SIZE(vals)); 204 202 } 205 203 206 204 static int rtl9300_i2c_writel(struct rtl9300_i2c *i2c, u32 data) 207 205 { 208 - return regmap_write(i2c->regmap, i2c->data_reg, data); 206 + return regmap_write(i2c->regmap, i2c->wd_reg, data); 209 207 } 210 208 211 209 static int rtl9300_i2c_prepare_xfer(struct rtl9300_i2c *i2c, struct rtl9300_i2c_xfer *xfer) ··· 270 268 if (!xfer->write) { 271 269 switch (xfer->type) { 272 270 case RTL9300_I2C_XFER_BYTE: 273 - ret = regmap_read(i2c->regmap, i2c->data_reg, &val); 271 + ret = regmap_read(i2c->regmap, i2c->rd_reg, &val); 274 272 if (ret) 275 273 return ret; 276 274 277 275 *xfer->data = val & 0xff; 278 276 break; 279 277 case RTL9300_I2C_XFER_WORD: 280 - ret = regmap_read(i2c->regmap, i2c->data_reg, &val); 278 + ret = regmap_read(i2c->regmap, i2c->rd_reg, &val); 281 279 if (ret) 282 280 return ret; 283 281 ··· 410 408 if (device_get_child_node_count(dev) > drv_data->max_nchan) 411 409 return dev_err_probe(dev, -EINVAL, "Too many channels\n"); 412 410 413 - i2c->data_reg = i2c->reg_base + drv_data->data_reg; 411 + i2c->rd_reg = i2c->reg_base + drv_data->rd_reg; 412 + i2c->wd_reg = i2c->reg_base + drv_data->wd_reg; 414 413 for (i = 0; i < F_NUM_FIELDS; i++) { 415 414 fields[i] = drv_data->field_desc[i].field; 416 415 if (drv_data->field_desc[i].scope == REG_SCOPE_MASTER) ··· 502 499 [F_SDA_SEL] = GLB_REG_FIELD(RTL9300_I2C_MST_GLB_CTRL, 0, 7), 503 500 }, 504 501 .select_scl = rtl9300_i2c_select_scl, 505 - .data_reg = RTL9300_I2C_MST_DATA_WORD0, 502 + .rd_reg = RTL9300_I2C_MST_DATA_WORD0, 503 + .wd_reg = RTL9300_I2C_MST_DATA_WORD0, 506 504 .max_nchan = RTL9300_I2C_MUX_NCHAN, 507 505 }; 508 506 ··· 523 519 [F_MEM_ADDR] = MST_REG_FIELD(RTL9310_I2C_MST_MEMADDR_CTRL, 0, 23), 524 520 }, 525 521 .select_scl = rtl9310_i2c_select_scl, 526 - .data_reg = RTL9310_I2C_MST_DATA_CTRL, 522 + .rd_reg = RTL9310_I2C_MST_DATA_CTRL, 523 + .wd_reg = RTL9310_I2C_MST_DATA_CTRL, 527 524 .max_nchan = RTL9310_I2C_MUX_NCHAN, 528 525 }; 529 526

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