Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'fixes' of git://git.linaro.org/people/arnd/arm-soc:
ARM: CSR: add missing sentinels to of_device_id tables
ARM: cns3xxx: Fix newly introduced warnings in the PCIe code
ARM: cns3xxx: Fix compile error caused by hardware.h removed
ARM: davinci: fix cache flush build error
ARM: davinci: correct MDSTAT_STATE_MASK
ARM: davinci: da850 EVM: read mac address from SPI flash
OMAP: omap_device: fix !CONFIG_SUSPEND case in _noirq handlers
OMAP2430: hwmod: musb: add missing terminator to omap2430_usbhsotg_addrs[]
OMAP3: clock: indicate that gpt12_fck and wdt1_fck are in the WKUP clockdomain
OMAP4: clock: fix compile warning
OMAP4: clock: re-enable previous clockdomain enable/disable sequence
OMAP: clockdomain: Wait for powerdomain to be ON when using clockdomain force wakeup
OMAP: powerdomains: Make all powerdomain target states as ON at init
+72
-18
-1
arch/arm/mach-cns3xxx/include/mach/entry-macro.S
-1
arch/arm/mach-cns3xxx/include/mach/entry-macro.S
-1
arch/arm/mach-cns3xxx/include/mach/system.h
-1
arch/arm/mach-cns3xxx/include/mach/system.h
-1
arch/arm/mach-cns3xxx/include/mach/uncompress.h
-1
arch/arm/mach-cns3xxx/include/mach/uncompress.h
+1
-1
arch/arm/mach-cns3xxx/pcie.c
+1
-1
arch/arm/mach-cns3xxx/pcie.c
+28
arch/arm/mach-davinci/board-da850-evm.c
+28
arch/arm/mach-davinci/board-da850-evm.c
···
115
115
},
116
116
};
117
117
118
+
#ifdef CONFIG_MTD
119
+
static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
120
+
{
121
+
char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
122
+
size_t retlen;
123
+
124
+
if (!strcmp(mtd->name, "MAC-Address")) {
125
+
mtd->read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
126
+
if (retlen == ETH_ALEN)
127
+
pr_info("Read MAC addr from SPI Flash: %pM\n",
128
+
mac_addr);
129
+
}
130
+
}
131
+
132
+
static struct mtd_notifier da850evm_spi_notifier = {
133
+
.add = da850_evm_m25p80_notify_add,
134
+
};
135
+
136
+
static void da850_evm_setup_mac_addr(void)
137
+
{
138
+
register_mtd_user(&da850evm_spi_notifier);
139
+
}
140
+
#else
141
+
static void da850_evm_setup_mac_addr(void) { }
142
+
#endif
143
+
118
144
static struct mtd_partition da850_evm_norflash_partition[] = {
119
145
{
120
146
.name = "bootloaders + env",
···
1270
1244
if (ret)
1271
1245
pr_warning("da850_evm_init: sata registration failed: %d\n",
1272
1246
ret);
1247
+
1248
+
da850_evm_setup_mac_addr();
1273
1249
}
1274
1250
1275
1251
#ifdef CONFIG_SERIAL_8250_CONSOLE
+1
-1
arch/arm/mach-davinci/include/mach/psc.h
+1
-1
arch/arm/mach-davinci/include/mach/psc.h
+5
-1
arch/arm/mach-davinci/sleep.S
+5
-1
arch/arm/mach-davinci/sleep.S
···
217
217
ENDPROC(davinci_ddr_psc_config)
218
218
219
219
CACHE_FLUSH:
220
-
.word arm926_flush_kern_cache_all
220
+
#ifdef CONFIG_CPU_V6
221
+
.word v6_flush_kern_cache_all
222
+
#else
223
+
.word arm926_flush_kern_cache_all
224
+
#endif
221
225
222
226
ENTRY(davinci_cpu_suspend_sz)
223
227
.word . - davinci_cpu_suspend
+2
arch/arm/mach-omap2/clock3xxx_data.c
+2
arch/arm/mach-omap2/clock3xxx_data.c
···
3078
3078
.name = "gpt12_fck",
3079
3079
.ops = &clkops_null,
3080
3080
.parent = &secure_32k_fck,
3081
+
.clkdm_name = "wkup_clkdm",
3081
3082
.recalc = &followparent_recalc,
3082
3083
};
3083
3084
···
3086
3085
.name = "wdt1_fck",
3087
3086
.ops = &clkops_null,
3088
3087
.parent = &secure_32k_fck,
3088
+
.clkdm_name = "wkup_clkdm",
3089
3089
.recalc = &followparent_recalc,
3090
3090
};
3091
3091
+9
-1
arch/arm/mach-omap2/clock44xx_data.c
+9
-1
arch/arm/mach-omap2/clock44xx_data.c
···
3376
3376
} else if (cpu_is_omap446x()) {
3377
3377
cpu_mask = RATE_IN_4460;
3378
3378
cpu_clkflg = CK_446X;
3379
+
} else {
3380
+
return 0;
3379
3381
}
3380
3382
3381
3383
clk_init(&omap2_clk_functions);
3382
-
omap2_clk_disable_clkdm_control();
3384
+
3385
+
/*
3386
+
* Must stay commented until all OMAP SoC drivers are
3387
+
* converted to runtime PM, or drivers may start crashing
3388
+
*
3389
+
* omap2_clk_disable_clkdm_control();
3390
+
*/
3383
3391
3384
3392
for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
3385
3393
c++)
+2
arch/arm/mach-omap2/clockdomain.c
+2
arch/arm/mach-omap2/clockdomain.c
···
747
747
spin_lock_irqsave(&clkdm->lock, flags);
748
748
clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
749
749
ret = arch_clkdm->clkdm_wakeup(clkdm);
750
+
ret |= pwrdm_state_switch(clkdm->pwrdm.ptr);
750
751
spin_unlock_irqrestore(&clkdm->lock, flags);
751
752
return ret;
752
753
}
···
819
818
spin_lock_irqsave(&clkdm->lock, flags);
820
819
clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
821
820
arch_clkdm->clkdm_deny_idle(clkdm);
821
+
pwrdm_state_switch(clkdm->pwrdm.ptr);
822
822
spin_unlock_irqrestore(&clkdm->lock, flags);
823
823
}
824
824
+1
arch/arm/mach-omap2/omap_hwmod_2430_data.c
+1
arch/arm/mach-omap2/omap_hwmod_2430_data.c
-2
arch/arm/mach-omap2/pm.c
-2
arch/arm/mach-omap2/pm.c
···
130
130
} else {
131
131
hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
132
132
clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
133
-
pwrdm_wait_transition(pwrdm);
134
133
sleep_switch = FORCEWAKEUP_SWITCH;
135
134
}
136
135
}
···
155
156
return ret;
156
157
}
157
158
158
-
pwrdm_wait_transition(pwrdm);
159
159
pwrdm_state_switch(pwrdm);
160
160
err:
161
161
return ret;
+16
-9
arch/arm/mach-omap2/powerdomain.c
+16
-9
arch/arm/mach-omap2/powerdomain.c
···
195
195
196
196
/**
197
197
* pwrdm_init - set up the powerdomain layer
198
-
* @pwrdm_list: array of struct powerdomain pointers to register
198
+
* @pwrdms: array of struct powerdomain pointers to register
199
199
* @custom_funcs: func pointers for arch specific implementations
200
200
*
201
-
* Loop through the array of powerdomains @pwrdm_list, registering all
202
-
* that are available on the current CPU. If pwrdm_list is supplied
203
-
* and not null, all of the referenced powerdomains will be
204
-
* registered. No return value. XXX pwrdm_list is not really a
205
-
* "list"; it is an array. Rename appropriately.
201
+
* Loop through the array of powerdomains @pwrdms, registering all
202
+
* that are available on the current CPU. Also, program all
203
+
* powerdomain target state as ON; this is to prevent domains from
204
+
* hitting low power states (if bootloader has target states set to
205
+
* something other than ON) and potentially even losing context while
206
+
* PM is not fully initialized. The PM late init code can then program
207
+
* the desired target state for all the power domains. No return
208
+
* value.
206
209
*/
207
-
void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs)
210
+
void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs)
208
211
{
209
212
struct powerdomain **p = NULL;
213
+
struct powerdomain *temp_p;
210
214
211
215
if (!custom_funcs)
212
216
WARN(1, "powerdomain: No custom pwrdm functions registered\n");
213
217
else
214
218
arch_pwrdm = custom_funcs;
215
219
216
-
if (pwrdm_list) {
217
-
for (p = pwrdm_list; *p; p++)
220
+
if (pwrdms) {
221
+
for (p = pwrdms; *p; p++)
218
222
_pwrdm_register(*p);
219
223
}
224
+
225
+
list_for_each_entry(temp_p, &pwrdm_list, node)
226
+
pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON);
220
227
}
221
228
222
229
/**
+1
arch/arm/mach-prima2/clock.c
+1
arch/arm/mach-prima2/clock.c
+1
arch/arm/mach-prima2/irq.c
+1
arch/arm/mach-prima2/irq.c
+1
arch/arm/mach-prima2/rstc.c
+1
arch/arm/mach-prima2/rstc.c
+1
arch/arm/mach-prima2/timer.c
+1
arch/arm/mach-prima2/timer.c