Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
"Bug fixes for all architectures. Nothing really stands out"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (21 commits)
KVM: nVMX: remove incorrect vpid check in nested invvpid emulation
arm64: kvm: report original PAR_EL1 upon panic
arm64: kvm: avoid %p in __kvm_hyp_panic
KVM: arm/arm64: vgic: Trust the LR state for HW IRQs
KVM: arm/arm64: arch_timer: Preserve physical dist. active state on LR.active
KVM: arm/arm64: Fix preemptible timer active state crazyness
arm64: KVM: Add workaround for Cortex-A57 erratum 834220
arm64: KVM: Fix AArch32 to AArch64 register mapping
ARM/arm64: KVM: test properly for a PTE's uncachedness
KVM: s390: fix wrong lookup of VCPUs by array index
KVM: s390: avoid memory overwrites on emergency signal injection
KVM: Provide function for VCPU lookup by id
KVM: s390: fix pfmf intercept handler
KVM: s390: enable SIMD only when no VCPUs were created
KVM: x86: request interrupt window when IRQ chip is split
KVM: x86: set KVM_REQ_EVENT on local interrupt request from user space
KVM: x86: split kvm_vcpu_ready_for_interrupt_injection out of dm_request_for_irq_injection
KVM: x86: fix interrupt window handling in split IRQ chip case
MIPS: KVM: Uninit VCPU in vcpu_create error path
MIPS: KVM: Fix CACHE immediate offset sign extension
...
+171
-111
+1
-6
arch/arm/kvm/arm.c
+1
-6
arch/arm/kvm/arm.c
···
564
564
vcpu_sleep(vcpu);
565
565
566
566
/*
567
-
* Disarming the background timer must be done in a
568
-
* preemptible context, as this call may sleep.
569
-
*/
570
-
kvm_timer_flush_hwstate(vcpu);
571
-
572
-
/*
573
567
* Preparing the interrupts to be injected also
574
568
* involves poking the GIC, which must be done in a
575
569
* non-preemptible context.
576
570
*/
577
571
preempt_disable();
572
+
kvm_timer_flush_hwstate(vcpu);
578
573
kvm_vgic_flush_hwstate(vcpu);
579
574
580
575
local_irq_disable();
+7
-8
arch/arm/kvm/mmu.c
+7
-8
arch/arm/kvm/mmu.c
···
98
98
__kvm_flush_dcache_pud(pud);
99
99
}
100
100
101
+
static bool kvm_is_device_pfn(unsigned long pfn)
102
+
{
103
+
return !pfn_valid(pfn);
104
+
}
105
+
101
106
/**
102
107
* stage2_dissolve_pmd() - clear and flush huge PMD entry
103
108
* @kvm: pointer to kvm structure.
···
218
213
kvm_tlb_flush_vmid_ipa(kvm, addr);
219
214
220
215
/* No need to invalidate the cache for device mappings */
221
-
if ((pte_val(old_pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
216
+
if (!kvm_is_device_pfn(__phys_to_pfn(addr)))
222
217
kvm_flush_dcache_pte(old_pte);
223
218
224
219
put_page(virt_to_page(pte));
···
310
305
311
306
pte = pte_offset_kernel(pmd, addr);
312
307
do {
313
-
if (!pte_none(*pte) &&
314
-
(pte_val(*pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
308
+
if (!pte_none(*pte) && !kvm_is_device_pfn(__phys_to_pfn(addr)))
315
309
kvm_flush_dcache_pte(*pte);
316
310
} while (pte++, addr += PAGE_SIZE, addr != end);
317
311
}
···
1039
1035
return false;
1040
1036
1041
1037
return kvm_vcpu_dabt_iswrite(vcpu);
1042
-
}
1043
-
1044
-
static bool kvm_is_device_pfn(unsigned long pfn)
1045
-
{
1046
-
return !pfn_valid(pfn);
1047
1038
}
1048
1039
1049
1040
/**
+21
arch/arm64/Kconfig
+21
arch/arm64/Kconfig
···
316
316
317
317
If unsure, say Y.
318
318
319
+
config ARM64_ERRATUM_834220
320
+
bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a Stage 1 fault"
321
+
depends on KVM
322
+
default y
323
+
help
324
+
This option adds an alternative code sequence to work around ARM
325
+
erratum 834220 on Cortex-A57 parts up to r1p2.
326
+
327
+
Affected Cortex-A57 parts might report a Stage 2 translation
328
+
fault as the result of a Stage 1 fault for load crossing a
329
+
page boundary when there is a permission or device memory
330
+
alignment fault at Stage 1 and a translation fault at Stage 2.
331
+
332
+
The workaround is to verify that the Stage 1 translation
333
+
doesn't generate a fault before handling the Stage 2 fault.
334
+
Please note that this does not necessarily enable the workaround,
335
+
as it depends on the alternative framework, which will only patch
336
+
the kernel if an affected CPU is detected.
337
+
338
+
If unsure, say Y.
339
+
319
340
config ARM64_ERRATUM_845719
320
341
bool "Cortex-A53: 845719: a load might read incorrect data"
321
342
depends on COMPAT
+2
-1
arch/arm64/include/asm/cpufeature.h
+2
-1
arch/arm64/include/asm/cpufeature.h
+5
-3
arch/arm64/include/asm/kvm_emulate.h
+5
-3
arch/arm64/include/asm/kvm_emulate.h
···
99
99
*vcpu_cpsr(vcpu) |= COMPAT_PSR_T_BIT;
100
100
}
101
101
102
+
/*
103
+
* vcpu_reg should always be passed a register number coming from a
104
+
* read of ESR_EL2. Otherwise, it may give the wrong result on AArch32
105
+
* with banked registers.
106
+
*/
102
107
static inline unsigned long *vcpu_reg(const struct kvm_vcpu *vcpu, u8 reg_num)
103
108
{
104
-
if (vcpu_mode_is_32bit(vcpu))
105
-
return vcpu_reg32(vcpu, reg_num);
106
-
107
109
return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.regs[reg_num];
108
110
}
109
111
+9
arch/arm64/kernel/cpu_errata.c
+9
arch/arm64/kernel/cpu_errata.c
···
75
75
(1 << MIDR_VARIANT_SHIFT) | 2),
76
76
},
77
77
#endif
78
+
#ifdef CONFIG_ARM64_ERRATUM_834220
79
+
{
80
+
/* Cortex-A57 r0p0 - r1p2 */
81
+
.desc = "ARM erratum 834220",
82
+
.capability = ARM64_WORKAROUND_834220,
83
+
MIDR_RANGE(MIDR_CORTEX_A57, 0x00,
84
+
(1 << MIDR_VARIANT_SHIFT) | 2),
85
+
},
86
+
#endif
78
87
#ifdef CONFIG_ARM64_ERRATUM_845719
79
88
{
80
89
/* Cortex-A53 r0p[01234] */
+12
-2
arch/arm64/kvm/hyp.S
+12
-2
arch/arm64/kvm/hyp.S
···
864
864
ENDPROC(__kvm_flush_vm_context)
865
865
866
866
__kvm_hyp_panic:
867
+
// Stash PAR_EL1 before corrupting it in __restore_sysregs
868
+
mrs x0, par_el1
869
+
push x0, xzr
870
+
867
871
// Guess the context by looking at VTTBR:
868
872
// If zero, then we're already a host.
869
873
// Otherwise restore a minimal host context before panicing.
···
902
898
mrs x3, esr_el2
903
899
mrs x4, far_el2
904
900
mrs x5, hpfar_el2
905
-
mrs x6, par_el1
901
+
pop x6, xzr // active context PAR_EL1
906
902
mrs x7, tpidr_el2
907
903
908
904
mov lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
···
918
914
ENDPROC(__kvm_hyp_panic)
919
915
920
916
__hyp_panic_str:
921
-
.ascii "HYP panic:\nPS:%08x PC:%p ESR:%p\nFAR:%p HPFAR:%p PAR:%p\nVCPU:%p\n\0"
917
+
.ascii "HYP panic:\nPS:%08x PC:%016x ESR:%08x\nFAR:%016x HPFAR:%016x PAR:%016x\nVCPU:%p\n\0"
922
918
923
919
.align 2
924
920
···
1019
1015
b.ne 1f // Not an abort we care about
1020
1016
1021
1017
/* This is an abort. Check for permission fault */
1018
+
alternative_if_not ARM64_WORKAROUND_834220
1022
1019
and x2, x1, #ESR_ELx_FSC_TYPE
1023
1020
cmp x2, #FSC_PERM
1024
1021
b.ne 1f // Not a permission fault
1022
+
alternative_else
1023
+
nop // Use the permission fault path to
1024
+
nop // check for a valid S1 translation,
1025
+
nop // regardless of the ESR value.
1026
+
alternative_endif
1025
1027
1026
1028
/*
1027
1029
* Check for Stage-1 page table walk, which is guaranteed
+1
-1
arch/arm64/kvm/inject_fault.c
+1
-1
arch/arm64/kvm/inject_fault.c
+1
-1
arch/mips/kvm/emulate.c
+1
-1
arch/mips/kvm/emulate.c
+10
-6
arch/mips/kvm/locore.S
+10
-6
arch/mips/kvm/locore.S
···
157
157
158
158
FEXPORT(__kvm_mips_load_asid)
159
159
/* Set the ASID for the Guest Kernel */
160
-
INT_SLL t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */
161
-
/* addresses shift to 0x80000000 */
162
-
bltz t0, 1f /* If kernel */
160
+
PTR_L t0, VCPU_COP0(k1)
161
+
LONG_L t0, COP0_STATUS(t0)
162
+
andi t0, KSU_USER | ST0_ERL | ST0_EXL
163
+
xori t0, KSU_USER
164
+
bnez t0, 1f /* If kernel */
163
165
INT_ADDIU t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */
164
166
INT_ADDIU t1, k1, VCPU_GUEST_USER_ASID /* else user */
165
167
1:
···
476
474
mtc0 t0, CP0_EPC
477
475
478
476
/* Set the ASID for the Guest Kernel */
479
-
INT_SLL t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */
480
-
/* addresses shift to 0x80000000 */
481
-
bltz t0, 1f /* If kernel */
477
+
PTR_L t0, VCPU_COP0(k1)
478
+
LONG_L t0, COP0_STATUS(t0)
479
+
andi t0, KSU_USER | ST0_ERL | ST0_EXL
480
+
xori t0, KSU_USER
481
+
bnez t0, 1f /* If kernel */
482
482
INT_ADDIU t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */
483
483
INT_ADDIU t1, k1, VCPU_GUEST_USER_ASID /* else user */
484
484
1:
+4
-1
arch/mips/kvm/mips.c
+4
-1
arch/mips/kvm/mips.c
···
279
279
280
280
if (!gebase) {
281
281
err = -ENOMEM;
282
-
goto out_free_cpu;
282
+
goto out_uninit_cpu;
283
283
}
284
284
kvm_debug("Allocated %d bytes for KVM Exception Handlers @ %p\n",
285
285
ALIGN(size, PAGE_SIZE), gebase);
···
342
342
343
343
out_free_gebase:
344
344
kfree(gebase);
345
+
346
+
out_uninit_cpu:
347
+
kvm_vcpu_uninit(vcpu);
345
348
346
349
out_free_cpu:
347
350
kfree(vcpu);
+5
-2
arch/s390/kvm/interrupt.c
+5
-2
arch/s390/kvm/interrupt.c
···
1030
1030
src_id, 0);
1031
1031
1032
1032
/* sending vcpu invalid */
1033
-
if (src_id >= KVM_MAX_VCPUS ||
1034
-
kvm_get_vcpu(vcpu->kvm, src_id) == NULL)
1033
+
if (kvm_get_vcpu_by_id(vcpu->kvm, src_id) == NULL)
1035
1034
return -EINVAL;
1036
1035
1037
1036
if (sclp.has_sigpif)
···
1108
1109
irq->u.emerg.code);
1109
1110
trace_kvm_s390_inject_vcpu(vcpu->vcpu_id, KVM_S390_INT_EMERGENCY,
1110
1111
irq->u.emerg.code, 0);
1112
+
1113
+
/* sending vcpu invalid */
1114
+
if (kvm_get_vcpu_by_id(vcpu->kvm, irq->u.emerg.code) == NULL)
1115
+
return -EINVAL;
1111
1116
1112
1117
set_bit(irq->u.emerg.code, li->sigp_emerg_pending);
1113
1118
set_bit(IRQ_PEND_EXT_EMERGENCY, &li->pending_irqs);
+5
-1
arch/s390/kvm/kvm-s390.c
+5
-1
arch/s390/kvm/kvm-s390.c
···
342
342
r = 0;
343
343
break;
344
344
case KVM_CAP_S390_VECTOR_REGISTERS:
345
-
if (MACHINE_HAS_VX) {
345
+
mutex_lock(&kvm->lock);
346
+
if (atomic_read(&kvm->online_vcpus)) {
347
+
r = -EBUSY;
348
+
} else if (MACHINE_HAS_VX) {
346
349
set_kvm_facility(kvm->arch.model.fac->mask, 129);
347
350
set_kvm_facility(kvm->arch.model.fac->list, 129);
348
351
r = 0;
349
352
} else
350
353
r = -EINVAL;
354
+
mutex_unlock(&kvm->lock);
351
355
VM_EVENT(kvm, 3, "ENABLE: CAP_S390_VECTOR_REGISTERS %s",
352
356
r ? "(not available)" : "(success)");
353
357
break;
+1
-1
arch/s390/kvm/priv.c
+1
-1
arch/s390/kvm/priv.c
+2
-6
arch/s390/kvm/sigp.c
+2
-6
arch/s390/kvm/sigp.c
···
291
291
u16 cpu_addr, u32 parameter, u64 *status_reg)
292
292
{
293
293
int rc;
294
-
struct kvm_vcpu *dst_vcpu;
294
+
struct kvm_vcpu *dst_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
295
295
296
-
if (cpu_addr >= KVM_MAX_VCPUS)
297
-
return SIGP_CC_NOT_OPERATIONAL;
298
-
299
-
dst_vcpu = kvm_get_vcpu(vcpu->kvm, cpu_addr);
300
296
if (!dst_vcpu)
301
297
return SIGP_CC_NOT_OPERATIONAL;
302
298
···
474
478
trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr);
475
479
476
480
if (order_code == SIGP_EXTERNAL_CALL) {
477
-
dest_vcpu = kvm_get_vcpu(vcpu->kvm, cpu_addr);
481
+
dest_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
478
482
BUG_ON(dest_vcpu == NULL);
479
483
480
484
kvm_s390_vcpu_wakeup(dest_vcpu);
-5
arch/x86/kvm/vmx.c
-5
arch/x86/kvm/vmx.c
···
7394
7394
7395
7395
switch (type) {
7396
7396
case VMX_VPID_EXTENT_ALL_CONTEXT:
7397
-
if (get_vmcs12(vcpu)->virtual_processor_id == 0) {
7398
-
nested_vmx_failValid(vcpu,
7399
-
VMXERR_INVALID_OPERAND_TO_INVEPT_INVVPID);
7400
-
return 1;
7401
-
}
7402
7397
__vmx_flush_tlb(vcpu, to_vmx(vcpu)->nested.vpid02);
7403
7398
nested_vmx_succeed(vcpu);
7404
7399
break;
+32
-29
arch/x86/kvm/x86.c
+32
-29
arch/x86/kvm/x86.c
···
2763
2763
return 0;
2764
2764
}
2765
2765
2766
+
static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
2767
+
{
2768
+
return (!lapic_in_kernel(vcpu) ||
2769
+
kvm_apic_accept_pic_intr(vcpu));
2770
+
}
2771
+
2772
+
/*
2773
+
* if userspace requested an interrupt window, check that the
2774
+
* interrupt window is open.
2775
+
*
2776
+
* No need to exit to userspace if we already have an interrupt queued.
2777
+
*/
2778
+
static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
2779
+
{
2780
+
return kvm_arch_interrupt_allowed(vcpu) &&
2781
+
!kvm_cpu_has_interrupt(vcpu) &&
2782
+
!kvm_event_needs_reinjection(vcpu) &&
2783
+
kvm_cpu_accept_dm_intr(vcpu);
2784
+
}
2785
+
2766
2786
static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2767
2787
struct kvm_interrupt *irq)
2768
2788
{
···
2806
2786
return -EEXIST;
2807
2787
2808
2788
vcpu->arch.pending_external_vector = irq->irq;
2789
+
kvm_make_request(KVM_REQ_EVENT, vcpu);
2809
2790
return 0;
2810
2791
}
2811
2792
···
5931
5910
return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5932
5911
}
5933
5912
5934
-
/*
5935
-
* Check if userspace requested an interrupt window, and that the
5936
-
* interrupt window is open.
5937
-
*
5938
-
* No need to exit to userspace if we already have an interrupt queued.
5939
-
*/
5940
5913
static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5941
5914
{
5942
-
if (!vcpu->run->request_interrupt_window || pic_in_kernel(vcpu->kvm))
5943
-
return false;
5944
-
5945
-
if (kvm_cpu_has_interrupt(vcpu))
5946
-
return false;
5947
-
5948
-
return (irqchip_split(vcpu->kvm)
5949
-
? kvm_apic_accept_pic_intr(vcpu)
5950
-
: kvm_arch_interrupt_allowed(vcpu));
5915
+
return vcpu->run->request_interrupt_window &&
5916
+
likely(!pic_in_kernel(vcpu->kvm));
5951
5917
}
5952
5918
5953
5919
static void post_kvm_run_save(struct kvm_vcpu *vcpu)
···
5945
5937
kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5946
5938
kvm_run->cr8 = kvm_get_cr8(vcpu);
5947
5939
kvm_run->apic_base = kvm_get_apic_base(vcpu);
5948
-
if (!irqchip_in_kernel(vcpu->kvm))
5949
-
kvm_run->ready_for_interrupt_injection =
5950
-
kvm_arch_interrupt_allowed(vcpu) &&
5951
-
!kvm_cpu_has_interrupt(vcpu) &&
5952
-
!kvm_event_needs_reinjection(vcpu);
5953
-
else if (!pic_in_kernel(vcpu->kvm))
5954
-
kvm_run->ready_for_interrupt_injection =
5955
-
kvm_apic_accept_pic_intr(vcpu) &&
5956
-
!kvm_cpu_has_interrupt(vcpu);
5957
-
else
5958
-
kvm_run->ready_for_interrupt_injection = 1;
5940
+
kvm_run->ready_for_interrupt_injection =
5941
+
pic_in_kernel(vcpu->kvm) ||
5942
+
kvm_vcpu_ready_for_interrupt_injection(vcpu);
5959
5943
}
5960
5944
5961
5945
static void update_cr8_intercept(struct kvm_vcpu *vcpu)
···
6360
6360
static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6361
6361
{
6362
6362
int r;
6363
-
bool req_int_win = !lapic_in_kernel(vcpu) &&
6364
-
vcpu->run->request_interrupt_window;
6363
+
bool req_int_win =
6364
+
dm_request_for_irq_injection(vcpu) &&
6365
+
kvm_cpu_accept_dm_intr(vcpu);
6366
+
6365
6367
bool req_immediate_exit = false;
6366
6368
6367
6369
if (vcpu->requests) {
···
6665
6663
if (kvm_cpu_has_pending_timer(vcpu))
6666
6664
kvm_inject_pending_timer_irqs(vcpu);
6667
6665
6668
-
if (dm_request_for_irq_injection(vcpu)) {
6666
+
if (dm_request_for_irq_injection(vcpu) &&
6667
+
kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
6669
6668
r = 0;
6670
6669
vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6671
6670
++vcpu->stat.request_irq_exits;
+1
-1
include/kvm/arm_vgic.h
+1
-1
include/kvm/arm_vgic.h
···
342
342
struct irq_phys_map *map, bool level);
343
343
void vgic_v3_dispatch_sgi(struct kvm_vcpu *vcpu, u64 reg);
344
344
int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu);
345
-
int kvm_vgic_vcpu_active_irq(struct kvm_vcpu *vcpu);
346
345
struct irq_phys_map *kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu,
347
346
int virt_irq, int irq);
348
347
int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, struct irq_phys_map *map);
348
+
bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, struct irq_phys_map *map);
349
349
350
350
#define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel))
351
351
#define vgic_initialized(k) (!!((k)->arch.vgic.nr_cpus))
+11
include/linux/kvm_host.h
+11
include/linux/kvm_host.h
···
460
460
(vcpup = kvm_get_vcpu(kvm, idx)) != NULL; \
461
461
idx++)
462
462
463
+
static inline struct kvm_vcpu *kvm_get_vcpu_by_id(struct kvm *kvm, int id)
464
+
{
465
+
struct kvm_vcpu *vcpu;
466
+
int i;
467
+
468
+
kvm_for_each_vcpu(i, vcpu, kvm)
469
+
if (vcpu->vcpu_id == id)
470
+
return vcpu;
471
+
return NULL;
472
+
}
473
+
463
474
#define kvm_for_each_memslot(memslot, slots) \
464
475
for (memslot = &slots->memslots[0]; \
465
476
memslot < slots->memslots + KVM_MEM_SLOTS_NUM && memslot->npages;\
+17
-11
virt/kvm/arm/arch_timer.c
+17
-11
virt/kvm/arm/arch_timer.c
···
221
221
kvm_timer_update_state(vcpu);
222
222
223
223
/*
224
-
* If we enter the guest with the virtual input level to the VGIC
225
-
* asserted, then we have already told the VGIC what we need to, and
226
-
* we don't need to exit from the guest until the guest deactivates
227
-
* the already injected interrupt, so therefore we should set the
228
-
* hardware active state to prevent unnecessary exits from the guest.
229
-
*
230
-
* Conversely, if the virtual input level is deasserted, then always
231
-
* clear the hardware active state to ensure that hardware interrupts
232
-
* from the timer triggers a guest exit.
233
-
*/
234
-
if (timer->irq.level)
224
+
* If we enter the guest with the virtual input level to the VGIC
225
+
* asserted, then we have already told the VGIC what we need to, and
226
+
* we don't need to exit from the guest until the guest deactivates
227
+
* the already injected interrupt, so therefore we should set the
228
+
* hardware active state to prevent unnecessary exits from the guest.
229
+
*
230
+
* Also, if we enter the guest with the virtual timer interrupt active,
231
+
* then it must be active on the physical distributor, because we set
232
+
* the HW bit and the guest must be able to deactivate the virtual and
233
+
* physical interrupt at the same time.
234
+
*
235
+
* Conversely, if the virtual input level is deasserted and the virtual
236
+
* interrupt is not active, then always clear the hardware active state
237
+
* to ensure that hardware interrupts from the timer triggers a guest
238
+
* exit.
239
+
*/
240
+
if (timer->irq.level || kvm_vgic_map_is_active(vcpu, timer->map))
235
241
phys_active = true;
236
242
else
237
243
phys_active = false;
+24
-26
virt/kvm/arm/vgic.c
+24
-26
virt/kvm/arm/vgic.c
···
1096
1096
vgic_set_lr(vcpu, lr_nr, vlr);
1097
1097
}
1098
1098
1099
+
static bool dist_active_irq(struct kvm_vcpu *vcpu)
1100
+
{
1101
+
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
1102
+
1103
+
return test_bit(vcpu->vcpu_id, dist->irq_active_on_cpu);
1104
+
}
1105
+
1106
+
bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, struct irq_phys_map *map)
1107
+
{
1108
+
int i;
1109
+
1110
+
for (i = 0; i < vcpu->arch.vgic_cpu.nr_lr; i++) {
1111
+
struct vgic_lr vlr = vgic_get_lr(vcpu, i);
1112
+
1113
+
if (vlr.irq == map->virt_irq && vlr.state & LR_STATE_ACTIVE)
1114
+
return true;
1115
+
}
1116
+
1117
+
return dist_active_irq(vcpu);
1118
+
}
1119
+
1099
1120
/*
1100
1121
* An interrupt may have been disabled after being made pending on the
1101
1122
* CPU interface (the classic case is a timer running while we're
···
1269
1248
* may have been serviced from another vcpu. In all cases,
1270
1249
* move along.
1271
1250
*/
1272
-
if (!kvm_vgic_vcpu_pending_irq(vcpu) && !kvm_vgic_vcpu_active_irq(vcpu))
1251
+
if (!kvm_vgic_vcpu_pending_irq(vcpu) && !dist_active_irq(vcpu))
1273
1252
goto epilog;
1274
1253
1275
1254
/* SGIs */
···
1417
1396
static bool vgic_sync_hwirq(struct kvm_vcpu *vcpu, int lr, struct vgic_lr vlr)
1418
1397
{
1419
1398
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
1420
-
struct irq_phys_map *map;
1421
-
bool phys_active;
1422
1399
bool level_pending;
1423
-
int ret;
1424
1400
1425
1401
if (!(vlr.state & LR_HW))
1426
1402
return false;
1427
1403
1428
-
map = vgic_irq_map_search(vcpu, vlr.irq);
1429
-
BUG_ON(!map);
1430
-
1431
-
ret = irq_get_irqchip_state(map->irq,
1432
-
IRQCHIP_STATE_ACTIVE,
1433
-
&phys_active);
1434
-
1435
-
WARN_ON(ret);
1436
-
1437
-
if (phys_active)
1438
-
return 0;
1404
+
if (vlr.state & LR_STATE_ACTIVE)
1405
+
return false;
1439
1406
1440
1407
spin_lock(&dist->lock);
1441
1408
level_pending = process_queued_irq(vcpu, lr, vlr);
···
1487
1478
1488
1479
return test_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu);
1489
1480
}
1490
-
1491
-
int kvm_vgic_vcpu_active_irq(struct kvm_vcpu *vcpu)
1492
-
{
1493
-
struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
1494
-
1495
-
if (!irqchip_in_kernel(vcpu->kvm))
1496
-
return 0;
1497
-
1498
-
return test_bit(vcpu->vcpu_id, dist->irq_active_on_cpu);
1499
-
}
1500
-
1501
1481
1502
1482
void vgic_kick_vcpus(struct kvm *kvm)
1503
1483
{