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drm/amdgpu: Setup PCIe atomics bit in PTE on GFX 12.1.0

To enable atomic access to memory, setup the new PCIe atomics bit
in PTE on GFX 12.1.0.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Mukul Joshi and committed by
Alex Deucher 4da49903 e08a675f

+8
+3
drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c
··· 308 308 309 309 if (bo && bo->flags & AMDGPU_GEM_CREATE_UNCACHED) 310 310 *flags = AMDGPU_PTE_MTYPE_GFX12(*flags, MTYPE_UC); 311 + 312 + if (adev->have_atomics_support) 313 + *flags |= AMDGPU_PTE_BUS_ATOMICS; 311 314 } 312 315 313 316 static const struct amdgpu_gmc_funcs gmc_v12_1_gmc_funcs = {
+5
drivers/gpu/drm/amd/amdkfd/kfd_svm.c
··· 1305 1305 pte_flags |= AMDGPU_PTE_READABLE; 1306 1306 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1307 1307 pte_flags |= AMDGPU_PTE_WRITEABLE; 1308 + 1309 + if ((gc_ip_version == IP_VERSION(12, 1, 0)) && 1310 + node->adev->have_atomics_support) 1311 + pte_flags |= AMDGPU_PTE_BUS_ATOMICS; 1312 + 1308 1313 return pte_flags; 1309 1314 } 1310 1315