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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: ti: phy-j721e-wiz: use OF data for device specific data
Move device specific data into OF data structure so it
is easier to maintain and we can get rid of if statements.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Matt Ranostay <mranostay@ti.com>
Link: https://lore.kernel.org/r/20220526064121.27625-1-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Roger Quadros
and committed by
Vinod Koul
4daa43e9
5cda442d
+50
-25
+50
-25
drivers/phy/ti/phy-j721e-wiz.c
+50
-25
drivers/phy/ti/phy-j721e-wiz.c
···
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AM64_WIZ_10G,
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};
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+
struct wiz_data {
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+
enum wiz_type type;
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+
const struct reg_field *refclk_dig_sel;
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+
const struct reg_field *pma_cmn_refclk1_dig_div;
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const struct wiz_clk_mux_sel *clk_mux_sel;
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unsigned int clk_div_sel_num;
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+
};
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+
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#define WIZ_TYPEC_DIR_DEBOUNCE_MIN 100 /* ms */
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#define WIZ_TYPEC_DIR_DEBOUNCE_MAX 1000
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···
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struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS];
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struct clk *output_clks[WIZ_MAX_OUTPUT_CLOCKS];
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struct clk_onecell_data clk_data;
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+
const struct wiz_data *data;
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};
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static int wiz_reset(struct wiz *wiz)
···
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struct regmap *regmap = wiz->regmap;
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int num_lanes = wiz->num_lanes;
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struct device *dev = wiz->dev;
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+
const struct wiz_data *data = wiz->data;
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int i;
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wiz->por_en = devm_regmap_field_alloc(dev, regmap, por_en);
···
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return PTR_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV]);
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}
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-
if (wiz->type == J721E_WIZ_16G) {
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+
if (data->pma_cmn_refclk1_dig_div) {
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wiz->div_sel_field[CMN_REFCLK1_DIG_DIV] =
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devm_regmap_field_alloc(dev, regmap,
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-
pma_cmn_refclk1_dig_div);
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+
*data->pma_cmn_refclk1_dig_div);
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if (IS_ERR(wiz->div_sel_field[CMN_REFCLK1_DIG_DIV])) {
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dev_err(dev, "PMA_CMN_REFCLK1_DIG_DIV reg field init failed\n");
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return PTR_ERR(wiz->div_sel_field[CMN_REFCLK1_DIG_DIV]);
···
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return PTR_ERR(wiz->mux_sel_field[PLL1_REFCLK]);
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}
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-
if (wiz->type == J721E_WIZ_10G || wiz->type == AM64_WIZ_10G)
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-
wiz->mux_sel_field[REFCLK_DIG] =
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devm_regmap_field_alloc(dev, regmap,
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-
refclk_dig_sel_10g);
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-
else
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wiz->mux_sel_field[REFCLK_DIG] =
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devm_regmap_field_alloc(dev, regmap,
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-
refclk_dig_sel_16g);
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-
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wiz->mux_sel_field[REFCLK_DIG] = devm_regmap_field_alloc(dev, regmap,
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+
*data->refclk_dig_sel);
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if (IS_ERR(wiz->mux_sel_field[REFCLK_DIG])) {
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dev_err(dev, "REFCLK_DIG_SEL reg field init failed\n");
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return PTR_ERR(wiz->mux_sel_field[REFCLK_DIG]);
···
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.fast_io = true,
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};
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+
static struct wiz_data j721e_16g_data = {
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.type = J721E_WIZ_16G,
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.refclk_dig_sel = &refclk_dig_sel_16g,
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+
.pma_cmn_refclk1_dig_div = &pma_cmn_refclk1_dig_div,
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+
.clk_mux_sel = clk_mux_sel_16g,
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+
.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_16G,
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+
};
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+
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+
static struct wiz_data j721e_10g_data = {
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.type = J721E_WIZ_10G,
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+
.refclk_dig_sel = &refclk_dig_sel_10g,
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+
.clk_mux_sel = clk_mux_sel_10g,
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.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
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+
};
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+
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+
static struct wiz_data am64_10g_data = {
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.type = AM64_WIZ_10G,
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+
.refclk_dig_sel = &refclk_dig_sel_10g,
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+
.clk_mux_sel = clk_mux_sel_10g,
1100
+
.clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G,
1101
+
};
1102
+
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static const struct of_device_id wiz_id_table[] = {
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{
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-
.compatible = "ti,j721e-wiz-16g", .data = (void *)J721E_WIZ_16G
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+
.compatible = "ti,j721e-wiz-16g", .data = &j721e_16g_data,
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},
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{
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.compatible = "ti,j721e-wiz-10g", .data = (void *)J721E_WIZ_10G
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+
.compatible = "ti,j721e-wiz-10g", .data = &j721e_10g_data,
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},
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{
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-
.compatible = "ti,am64-wiz-10g", .data = (void *)AM64_WIZ_10G
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+
.compatible = "ti,am64-wiz-10g", .data = &am64_10g_data,
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},
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{}
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};
···
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struct wiz *wiz;
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int ret, val, i;
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u32 num_lanes;
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const struct wiz_data *data;
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wiz = devm_kzalloc(dev, sizeof(*wiz), GFP_KERNEL);
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if (!wiz)
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return -ENOMEM;
1177
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-
wiz->type = (enum wiz_type)of_device_get_match_data(dev);
1154
+
data = of_device_get_match_data(dev);
1155
+
if (!data) {
1156
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dev_err(dev, "NULL device data\n");
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+
return -EINVAL;
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+
}
1159
+
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+
wiz->data = data;
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+
wiz->type = data->type;
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child_node = of_get_child_by_name(node, "serdes");
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if (!child_node) {
···
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wiz->dev = dev;
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wiz->regmap = regmap;
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wiz->num_lanes = num_lanes;
1262
-
if (wiz->type == J721E_WIZ_10G || wiz->type == AM64_WIZ_10G)
1263
-
wiz->clk_mux_sel = clk_mux_sel_10g;
1264
-
else
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-
wiz->clk_mux_sel = clk_mux_sel_16g;
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-
1229
+
wiz->clk_mux_sel = data->clk_mux_sel;
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wiz->clk_div_sel = clk_div_sel;
1268
-
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-
if (wiz->type == J721E_WIZ_10G || wiz->type == AM64_WIZ_10G)
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wiz->clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_10G;
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-
else
1272
-
wiz->clk_div_sel_num = WIZ_DIV_NUM_CLOCKS_16G;
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+
wiz->clk_div_sel_num = data->clk_div_sel_num;
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platform_set_drvdata(pdev, wiz);
1275
1234