Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'irq-urgent-2022-08-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Ingo Molnar:
"Misc irqchip fixes: LoongArch driver fixes and a Hyper-V IOMMU fix"
* tag 'irq-urgent-2022-08-21' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/loongson-liointc: Fix an error handling path in liointc_init()
irqchip/loongarch: Fix irq_domain_alloc_fwnode() abuse
irqchip/loongson-pch-pic: Move find_pch_pic() into CONFIG_ACPI
irqchip/loongson-eiointc: Fix a build warning
irqchip/loongson-eiointc: Fix irq affinity setting
iommu/hyper-v: Use helper instead of directly accessing affinity
+34
-32
-1
arch/loongarch/include/asm/irq.h
-1
arch/loongarch/include/asm/irq.h
+1
-3
drivers/iommu/hyperv-iommu.c
+1
-3
drivers/iommu/hyperv-iommu.c
···
68
68
{
69
69
struct irq_alloc_info *info = arg;
70
70
struct irq_data *irq_data;
71
-
struct irq_desc *desc;
72
71
int ret = 0;
73
72
74
73
if (!info || info->type != X86_IRQ_ALLOC_TYPE_IOAPIC || nr_irqs > 1)
···
89
90
* Hypver-V IO APIC irq affinity should be in the scope of
90
91
* ioapic_max_cpumask because no irq remapping support.
91
92
*/
92
-
desc = irq_data_to_desc(irq_data);
93
-
cpumask_copy(desc->irq_common_data.affinity, &ioapic_max_cpumask);
93
+
irq_data_update_affinity(irq_data, &ioapic_max_cpumask);
94
94
95
95
return 0;
96
96
}
+1
-1
drivers/irqchip/irq-loongarch-cpu.c
+1
-1
drivers/irqchip/irq-loongarch-cpu.c
···
129
129
clear_csr_ecfg(ECFG0_IM);
130
130
clear_csr_estat(ESTATF_IP);
131
131
132
-
cpuintc_handle = irq_domain_alloc_fwnode(NULL);
132
+
cpuintc_handle = irq_domain_alloc_named_fwnode("CPUINTC");
133
133
irq_domain = irq_domain_create_linear(cpuintc_handle, EXCCODE_INT_NUM,
134
134
&loongarch_cpu_intc_irq_domain_ops, NULL);
135
135
+9
-4
drivers/irqchip/irq-loongson-eiointc.c
+9
-4
drivers/irqchip/irq-loongson-eiointc.c
···
111
111
regaddr = EIOINTC_REG_ENABLE + ((vector >> 5) << 2);
112
112
113
113
/* Mask target vector */
114
-
csr_any_send(regaddr, EIOINTC_ALL_ENABLE & (~BIT(vector & 0x1F)), 0x0, 0);
114
+
csr_any_send(regaddr, EIOINTC_ALL_ENABLE & (~BIT(vector & 0x1F)),
115
+
0x0, priv->node * CORES_PER_EIO_NODE);
116
+
115
117
/* Set route for target vector */
116
118
eiointc_set_irq_route(vector, cpu, priv->node, &priv->node_map);
119
+
117
120
/* Unmask target vector */
118
-
csr_any_send(regaddr, EIOINTC_ALL_ENABLE, 0x0, 0);
121
+
csr_any_send(regaddr, EIOINTC_ALL_ENABLE,
122
+
0x0, priv->node * CORES_PER_EIO_NODE);
119
123
120
124
irq_data_update_effective_affinity(d, cpumask_of(cpu));
121
125
···
290
286
}
291
287
}
292
288
293
-
struct irq_domain *acpi_get_vec_parent(int node, struct acpi_vector_group *vec_group)
289
+
static struct irq_domain *acpi_get_vec_parent(int node, struct acpi_vector_group *vec_group)
294
290
{
295
291
int i;
296
292
···
348
344
if (!priv)
349
345
return -ENOMEM;
350
346
351
-
priv->domain_handle = irq_domain_alloc_fwnode((phys_addr_t *)acpi_eiointc);
347
+
priv->domain_handle = irq_domain_alloc_named_id_fwnode("EIOPIC",
348
+
acpi_eiointc->node);
352
349
if (!priv->domain_handle) {
353
350
pr_err("Unable to allocate domain handle\n");
354
351
goto out_free_priv;
+2
-2
drivers/irqchip/irq-loongson-liointc.c
+2
-2
drivers/irqchip/irq-loongson-liointc.c
···
207
207
"reg-names", core_reg_names[i]);
208
208
209
209
if (index < 0)
210
-
return -EINVAL;
210
+
goto out_iounmap;
211
211
212
212
priv->core_isr[i] = of_iomap(node, index);
213
213
}
···
360
360
parent_irq[0] = irq_create_mapping(parent, acpi_liointc->cascade[0]);
361
361
parent_irq[1] = irq_create_mapping(parent, acpi_liointc->cascade[1]);
362
362
363
-
domain_handle = irq_domain_alloc_fwnode((phys_addr_t *)acpi_liointc);
363
+
domain_handle = irq_domain_alloc_fwnode(&acpi_liointc->address);
364
364
if (!domain_handle) {
365
365
pr_err("Unable to allocate domain handle\n");
366
366
return -ENOMEM;
+1
-1
drivers/irqchip/irq-loongson-pch-msi.c
+1
-1
drivers/irqchip/irq-loongson-pch-msi.c
···
282
282
int ret;
283
283
struct fwnode_handle *domain_handle;
284
284
285
-
domain_handle = irq_domain_alloc_fwnode((phys_addr_t *)acpi_pchmsi);
285
+
domain_handle = irq_domain_alloc_fwnode(&acpi_pchmsi->msg_address);
286
286
ret = pch_msi_init(acpi_pchmsi->msg_address, acpi_pchmsi->start,
287
287
acpi_pchmsi->count, parent, domain_handle);
288
288
if (ret < 0)
+20
-20
drivers/irqchip/irq-loongson-pch-pic.c
+20
-20
drivers/irqchip/irq-loongson-pch-pic.c
···
48
48
49
49
struct fwnode_handle *pch_pic_handle[MAX_IO_PICS];
50
50
51
-
int find_pch_pic(u32 gsi)
52
-
{
53
-
int i;
54
-
55
-
/* Find the PCH_PIC that manages this GSI. */
56
-
for (i = 0; i < MAX_IO_PICS; i++) {
57
-
struct pch_pic *priv = pch_pic_priv[i];
58
-
59
-
if (!priv)
60
-
return -1;
61
-
62
-
if (gsi >= priv->gsi_base && gsi < (priv->gsi_base + priv->vec_count))
63
-
return i;
64
-
}
65
-
66
-
pr_err("ERROR: Unable to locate PCH_PIC for GSI %d\n", gsi);
67
-
return -1;
68
-
}
69
-
70
51
static void pch_pic_bitset(struct pch_pic *priv, int offset, int bit)
71
52
{
72
53
u32 reg;
···
306
325
#endif
307
326
308
327
#ifdef CONFIG_ACPI
328
+
int find_pch_pic(u32 gsi)
329
+
{
330
+
int i;
331
+
332
+
/* Find the PCH_PIC that manages this GSI. */
333
+
for (i = 0; i < MAX_IO_PICS; i++) {
334
+
struct pch_pic *priv = pch_pic_priv[i];
335
+
336
+
if (!priv)
337
+
return -1;
338
+
339
+
if (gsi >= priv->gsi_base && gsi < (priv->gsi_base + priv->vec_count))
340
+
return i;
341
+
}
342
+
343
+
pr_err("ERROR: Unable to locate PCH_PIC for GSI %d\n", gsi);
344
+
return -1;
345
+
}
346
+
309
347
static int __init
310
348
pch_lpc_parse_madt(union acpi_subtable_headers *header,
311
349
const unsigned long end)
···
349
349
350
350
vec_base = acpi_pchpic->gsi_base - GSI_MIN_PCH_IRQ;
351
351
352
-
domain_handle = irq_domain_alloc_fwnode((phys_addr_t *)acpi_pchpic);
352
+
domain_handle = irq_domain_alloc_fwnode(&acpi_pchpic->address);
353
353
if (!domain_handle) {
354
354
pr_err("Unable to allocate domain handle\n");
355
355
return -ENOMEM;