Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'pci-v4.9-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:
"PCI fixes:
- Fix Read Completion Boundary setting, which fixes a boot failure on
IBM x3850 with Mellanox MT27500 ConnectX-3
- Update some MAINTAINERS entries and email addresses"
* tag 'pci-v4.9-fixes-4' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
PCI: Set Read Completion Boundary to 128 iff Root Port supports it (_HPX)
PCI: Export pcie_find_root_port
PCI: designware-plat: Update author email
PCI: designware: Change maintainer to Joao Pinto
MAINTAINERS: Add devicetree binding to PCI i.MX6 entry
MAINTAINERS: Update Richard Zhu's email address
+46
-25
+4
-9
MAINTAINERS
+4
-9
MAINTAINERS
···
9257
9257
F: drivers/pci/host/*layerscape*
9258
9258
9259
9259
PCI DRIVER FOR IMX6
9260
-
M: Richard Zhu <Richard.Zhu@freescale.com>
9260
+
M: Richard Zhu <hongxing.zhu@nxp.com>
9261
9261
M: Lucas Stach <l.stach@pengutronix.de>
9262
9262
L: linux-pci@vger.kernel.org
9263
9263
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
9264
9264
S: Maintained
9265
+
F: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
9265
9266
F: drivers/pci/host/*imx6*
9266
9267
9267
9268
PCI DRIVER FOR TI KEYSTONE
···
9321
9320
9322
9321
PCI DRIVER FOR SYNOPSIS DESIGNWARE
9323
9322
M: Jingoo Han <jingoohan1@gmail.com>
9324
-
M: Pratyush Anand <pratyush.anand@gmail.com>
9325
-
L: linux-pci@vger.kernel.org
9326
-
S: Maintained
9327
-
F: drivers/pci/host/*designware*
9328
-
9329
-
PCI DRIVER FOR SYNOPSYS PROTOTYPING DEVICE
9330
-
M: Jose Abreu <Jose.Abreu@synopsys.com>
9323
+
M: Joao Pinto <Joao.Pinto@synopsys.com>
9331
9324
L: linux-pci@vger.kernel.org
9332
9325
S: Maintained
9333
9326
F: Documentation/devicetree/bindings/pci/designware-pcie.txt
9334
-
F: drivers/pci/host/pcie-designware-plat.c
9327
+
F: drivers/pci/host/*designware*
9335
9328
9336
9329
PCI DRIVER FOR GENERIC OF HOSTS
9337
9330
M: Will Deacon <will.deacon@arm.com>
+1
-1
drivers/pci/host/pcie-designware-plat.c
+1
-1
drivers/pci/host/pcie-designware-plat.c
···
3
3
*
4
4
* Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
5
5
*
6
-
* Authors: Joao Pinto <jpmpinto@gmail.com>
6
+
* Authors: Joao Pinto <Joao.Pinto@synopsys.com>
7
7
*
8
8
* This program is free software; you can redistribute it and/or modify
9
9
* it under the terms of the GNU General Public License version 2 as
-14
drivers/pci/pcie/aer/aer_inject.c
-14
drivers/pci/pcie/aer/aer_inject.c
···
307
307
return 0;
308
308
}
309
309
310
-
static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
311
-
{
312
-
while (1) {
313
-
if (!pci_is_pcie(dev))
314
-
break;
315
-
if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
316
-
return dev;
317
-
if (!dev->bus->self)
318
-
break;
319
-
dev = dev->bus->self;
320
-
}
321
-
return NULL;
322
-
}
323
-
324
310
static int find_aer_device_iter(struct device *device, void *data)
325
311
{
326
312
struct pcie_device **result = data;
+27
-1
drivers/pci/probe.c
+27
-1
drivers/pci/probe.c
···
1439
1439
dev_warn(&dev->dev, "PCI-X settings not supported\n");
1440
1440
}
1441
1441
1442
+
static bool pcie_root_rcb_set(struct pci_dev *dev)
1443
+
{
1444
+
struct pci_dev *rp = pcie_find_root_port(dev);
1445
+
u16 lnkctl;
1446
+
1447
+
if (!rp)
1448
+
return false;
1449
+
1450
+
pcie_capability_read_word(rp, PCI_EXP_LNKCTL, &lnkctl);
1451
+
if (lnkctl & PCI_EXP_LNKCTL_RCB)
1452
+
return true;
1453
+
1454
+
return false;
1455
+
}
1456
+
1442
1457
static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
1443
1458
{
1444
1459
int pos;
···
1483
1468
~hpp->pci_exp_devctl_and, hpp->pci_exp_devctl_or);
1484
1469
1485
1470
/* Initialize Link Control Register */
1486
-
if (pcie_cap_has_lnkctl(dev))
1471
+
if (pcie_cap_has_lnkctl(dev)) {
1472
+
1473
+
/*
1474
+
* If the Root Port supports Read Completion Boundary of
1475
+
* 128, set RCB to 128. Otherwise, clear it.
1476
+
*/
1477
+
hpp->pci_exp_lnkctl_and |= PCI_EXP_LNKCTL_RCB;
1478
+
hpp->pci_exp_lnkctl_or &= ~PCI_EXP_LNKCTL_RCB;
1479
+
if (pcie_root_rcb_set(dev))
1480
+
hpp->pci_exp_lnkctl_or |= PCI_EXP_LNKCTL_RCB;
1481
+
1487
1482
pcie_capability_clear_and_set_word(dev, PCI_EXP_LNKCTL,
1488
1483
~hpp->pci_exp_lnkctl_and, hpp->pci_exp_lnkctl_or);
1484
+
}
1489
1485
1490
1486
/* Find Advanced Error Reporting Enhanced Capability */
1491
1487
pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
+14
include/linux/pci.h
+14
include/linux/pci.h
···
1928
1928
return (pcie_caps_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
1929
1929
}
1930
1930
1931
+
static inline struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
1932
+
{
1933
+
while (1) {
1934
+
if (!pci_is_pcie(dev))
1935
+
break;
1936
+
if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
1937
+
return dev;
1938
+
if (!dev->bus->self)
1939
+
break;
1940
+
dev = dev->bus->self;
1941
+
}
1942
+
return NULL;
1943
+
}
1944
+
1931
1945
void pci_request_acs(void);
1932
1946
bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags);
1933
1947
bool pci_acs_path_enabled(struct pci_dev *start,