tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

ARM: Switch to irq_domain_create_*()

irq_domain_add_*() interfaces are going away as being obsolete now.
Switch to the preferred irq_domain_create_*() ones. Those differ in the
node parameter: They take more generic struct fwnode_handle instead of
struct device_node. Therefore, of_fwnode_handle() is added around the
original parameter.

Note some of the users can likely use dev->fwnode directly instead of
indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not
guaranteed to be set for all, so this has to be investigated on case to
case basis (by people who can actually test with the HW).

[ tglx: Fix up subject prefix ]

Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20250319092951.37667-15-jirislaby@kernel.org


authored by

Jiri Slaby (SUSE) and committed by
Thomas Gleixner 4dcb0045 80f2405b

+22 -27
+3 -3
arch/arm/common/sa1111.c
··· 416 416 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR0); 417 417 writel_relaxed(~0, irqbase + SA1111_INTSTATCLR1); 418 418 419 - sachip->irqdomain = irq_domain_add_linear(NULL, SA1111_IRQ_NR, 420 - &sa1111_irqdomain_ops, 421 - sachip); 419 + sachip->irqdomain = irq_domain_create_linear(NULL, SA1111_IRQ_NR, 420 + &sa1111_irqdomain_ops, 421 + sachip); 422 422 if (!sachip->irqdomain) { 423 423 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR); 424 424 return -ENOMEM;
+2 -3
arch/arm/mach-exynos/suspend.c
··· 209 209 return -ENOMEM; 210 210 } 211 211 212 - domain = irq_domain_add_hierarchy(parent_domain, 0, 0, 213 - node, &exynos_pmu_domain_ops, 214 - NULL); 212 + domain = irq_domain_create_hierarchy(parent_domain, 0, 0, of_fwnode_handle(node), 213 + &exynos_pmu_domain_ops, NULL); 215 214 if (!domain) { 216 215 iounmap(pmu_base_addr); 217 216 pmu_base_addr = NULL;
+2 -2
arch/arm/mach-imx/avic.c
··· 201 201 WARN_ON(irq_base < 0); 202 202 203 203 np = of_find_compatible_node(NULL, NULL, "fsl,avic"); 204 - domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0, 205 - &irq_domain_simple_ops, NULL); 204 + domain = irq_domain_create_legacy(of_fwnode_handle(np), AVIC_NUM_IRQS, irq_base, 0, 205 + &irq_domain_simple_ops, NULL); 206 206 WARN_ON(!domain); 207 207 208 208 for (i = 0; i < AVIC_NUM_IRQS / 32; i++, irq_base += 32)
+2 -3
arch/arm/mach-imx/gpc.c
··· 245 245 if (WARN_ON(!gpc_base)) 246 246 return -ENOMEM; 247 247 248 - domain = irq_domain_add_hierarchy(parent_domain, 0, GPC_MAX_IRQS, 249 - node, &imx_gpc_domain_ops, 250 - NULL); 248 + domain = irq_domain_create_hierarchy(parent_domain, 0, GPC_MAX_IRQS, of_fwnode_handle(node), 249 + &imx_gpc_domain_ops, NULL); 251 250 if (!domain) { 252 251 iounmap(gpc_base); 253 252 return -ENOMEM;
+2 -2
arch/arm/mach-imx/tzic.c
··· 175 175 irq_base = irq_alloc_descs(-1, 0, TZIC_NUM_IRQS, numa_node_id()); 176 176 WARN_ON(irq_base < 0); 177 177 178 - domain = irq_domain_add_legacy(np, TZIC_NUM_IRQS, irq_base, 0, 179 - &irq_domain_simple_ops, NULL); 178 + domain = irq_domain_create_legacy(of_fwnode_handle(np), TZIC_NUM_IRQS, irq_base, 0, 179 + &irq_domain_simple_ops, NULL); 180 180 WARN_ON(!domain); 181 181 182 182 for (i = 0; i < 4; i++, irq_base += 32)
+1 -2
arch/arm/mach-omap1/irq.c
··· 220 220 omap_l2_irq = irq_base; 221 221 omap_l2_irq -= NR_IRQS_LEGACY; 222 222 223 - domain = irq_domain_add_legacy(NULL, nr_irqs, irq_base, 0, 224 - &irq_domain_simple_ops, NULL); 223 + domain = irq_domain_create_legacy(NULL, nr_irqs, irq_base, 0, &irq_domain_simple_ops, NULL); 225 224 226 225 pr_info("Total of %lu interrupts in %i interrupt banks\n", 227 226 nr_irqs, irq_bank_count);
+2 -3
arch/arm/mach-omap2/omap-wakeupgen.c
··· 585 585 wakeupgen_ops = &am43xx_wakeupgen_ops; 586 586 } 587 587 588 - domain = irq_domain_add_hierarchy(parent_domain, 0, max_irqs, 589 - node, &wakeupgen_domain_ops, 590 - NULL); 588 + domain = irq_domain_create_hierarchy(parent_domain, 0, max_irqs, of_fwnode_handle(node), 589 + &wakeupgen_domain_ops, NULL); 591 590 if (!domain) { 592 591 iounmap(wakeupgen_base); 593 592 return -ENOMEM;
+2 -3
arch/arm/mach-pxa/irq.c
··· 147 147 int n; 148 148 149 149 pxa_internal_irq_nr = irq_nr; 150 - pxa_irq_domain = irq_domain_add_legacy(node, irq_nr, 151 - PXA_IRQ(0), 0, 152 - &pxa_irq_ops, NULL); 150 + pxa_irq_domain = irq_domain_create_legacy(of_fwnode_handle(node), irq_nr, PXA_IRQ(0), 0, 151 + &pxa_irq_ops, NULL); 153 152 if (!pxa_irq_domain) 154 153 panic("Unable to add PXA IRQ domain\n"); 155 154 irq_set_default_domain(pxa_irq_domain);
+6 -6
arch/arm/plat-orion/gpio.c
··· 602 602 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 603 603 604 604 /* Setup irq domain on top of the generic chip. */ 605 - ochip->domain = irq_domain_add_legacy(NULL, 606 - ochip->chip.ngpio, 607 - ochip->secondary_irq_base, 608 - ochip->secondary_irq_base, 609 - &irq_domain_simple_ops, 610 - ochip); 605 + ochip->domain = irq_domain_create_legacy(NULL, 606 + ochip->chip.ngpio, 607 + ochip->secondary_irq_base, 608 + ochip->secondary_irq_base, 609 + &irq_domain_simple_ops, 610 + ochip); 611 611 if (!ochip->domain) 612 612 panic("%s: couldn't allocate irq domain (DT).\n", 613 613 ochip->chip.label);