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net/mlx5: Expose MLX5_UMR_ALIGN definition

Expose HW constant value in a shared header, to be used by core/EN
drivers.

Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260309093435.1850724-10-tariqt@nvidia.com
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>

authored by

Tariq Toukan and committed by
Leon Romanovsky
4dd2115f d6c9b4de

+1 -1
-1
drivers/infiniband/hw/mlx5/mr.c
··· 51 51 }; 52 52 53 53 #define MLX5_MR_CACHE_PERSISTENT_ENTRY_MIN_DESCS 4 54 - #define MLX5_UMR_ALIGN 2048 55 54 56 55 static void 57 56 create_mkey_callback(int status, struct mlx5_async_work *context);
+1
include/linux/mlx5/device.h
··· 293 293 MLX5_UMR_INLINE = (1 << 7), 294 294 }; 295 295 296 + #define MLX5_UMR_ALIGN (2048) 296 297 #define MLX5_UMR_FLEX_ALIGNMENT 0x40 297 298 #define MLX5_UMR_MTT_NUM_ENTRIES_ALIGNMENT (MLX5_UMR_FLEX_ALIGNMENT / sizeof(struct mlx5_mtt)) 298 299 #define MLX5_UMR_KLM_NUM_ENTRIES_ALIGNMENT (MLX5_UMR_FLEX_ALIGNMENT / sizeof(struct mlx5_klm))