Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm/radeon: add GET_PARAM/INFO support for Z pipes
drm/radeon/kms: add r100/r200 OQ support.
drm: Fix sysfs device confusion.
drm/radeon/kms: implement the bo busy ioctl properly.
+83
-25
+27
-20
drivers/gpu/drm/drm_sysfs.c
+27
-20
drivers/gpu/drm/drm_sysfs.c
···
22
22
#define to_drm_minor(d) container_of(d, struct drm_minor, kdev)
23
23
#define to_drm_connector(d) container_of(d, struct drm_connector, kdev)
24
24
25
+
static struct device_type drm_sysfs_device_minor = {
26
+
.name = "drm_minor"
27
+
};
28
+
25
29
/**
26
-
* drm_sysfs_suspend - DRM class suspend hook
30
+
* drm_class_suspend - DRM class suspend hook
27
31
* @dev: Linux device to suspend
28
32
* @state: power state to enter
29
33
*
30
34
* Just figures out what the actual struct drm_device associated with
31
35
* @dev is and calls its suspend hook, if present.
32
36
*/
33
-
static int drm_sysfs_suspend(struct device *dev, pm_message_t state)
37
+
static int drm_class_suspend(struct device *dev, pm_message_t state)
34
38
{
35
-
struct drm_minor *drm_minor = to_drm_minor(dev);
36
-
struct drm_device *drm_dev = drm_minor->dev;
39
+
if (dev->type == &drm_sysfs_device_minor) {
40
+
struct drm_minor *drm_minor = to_drm_minor(dev);
41
+
struct drm_device *drm_dev = drm_minor->dev;
37
42
38
-
if (drm_minor->type == DRM_MINOR_LEGACY &&
39
-
!drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
40
-
drm_dev->driver->suspend)
41
-
return drm_dev->driver->suspend(drm_dev, state);
42
-
43
+
if (drm_minor->type == DRM_MINOR_LEGACY &&
44
+
!drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
45
+
drm_dev->driver->suspend)
46
+
return drm_dev->driver->suspend(drm_dev, state);
47
+
}
43
48
return 0;
44
49
}
45
50
46
51
/**
47
-
* drm_sysfs_resume - DRM class resume hook
52
+
* drm_class_resume - DRM class resume hook
48
53
* @dev: Linux device to resume
49
54
*
50
55
* Just figures out what the actual struct drm_device associated with
51
56
* @dev is and calls its resume hook, if present.
52
57
*/
53
-
static int drm_sysfs_resume(struct device *dev)
58
+
static int drm_class_resume(struct device *dev)
54
59
{
55
-
struct drm_minor *drm_minor = to_drm_minor(dev);
56
-
struct drm_device *drm_dev = drm_minor->dev;
60
+
if (dev->type == &drm_sysfs_device_minor) {
61
+
struct drm_minor *drm_minor = to_drm_minor(dev);
62
+
struct drm_device *drm_dev = drm_minor->dev;
57
63
58
-
if (drm_minor->type == DRM_MINOR_LEGACY &&
59
-
!drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
60
-
drm_dev->driver->resume)
61
-
return drm_dev->driver->resume(drm_dev);
62
-
64
+
if (drm_minor->type == DRM_MINOR_LEGACY &&
65
+
!drm_core_check_feature(drm_dev, DRIVER_MODESET) &&
66
+
drm_dev->driver->resume)
67
+
return drm_dev->driver->resume(drm_dev);
68
+
}
63
69
return 0;
64
70
}
65
71
···
105
99
goto err_out;
106
100
}
107
101
108
-
class->suspend = drm_sysfs_suspend;
109
-
class->resume = drm_sysfs_resume;
102
+
class->suspend = drm_class_suspend;
103
+
class->resume = drm_class_resume;
110
104
111
105
err = class_create_file(class, &class_attr_version);
112
106
if (err)
···
486
480
minor->kdev.class = drm_class;
487
481
minor->kdev.release = drm_sysfs_device_release;
488
482
minor->kdev.devt = minor->device;
483
+
minor->kdev.type = &drm_sysfs_device_minor;
489
484
if (minor->type == DRM_MINOR_CONTROL)
490
485
minor_str = "controlD%d";
491
486
else if (minor->type == DRM_MINOR_RENDER)
+10
drivers/gpu/drm/radeon/r100.c
+10
drivers/gpu/drm/radeon/r100.c
···
1091
1091
tmp |= tile_flags;
1092
1092
ib[idx] = tmp;
1093
1093
break;
1094
+
case RADEON_RB3D_ZPASS_ADDR:
1095
+
r = r100_cs_packet_next_reloc(p, &reloc);
1096
+
if (r) {
1097
+
DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1098
+
idx, reg);
1099
+
r100_cs_dump_packet(p, pkt);
1100
+
return r;
1101
+
}
1102
+
ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
1103
+
break;
1094
1104
default:
1095
1105
/* FIXME: we don't want to allow anyothers packet */
1096
1106
break;
+3
-1
drivers/gpu/drm/radeon/r300.c
+3
-1
drivers/gpu/drm/radeon/r300.c
···
448
448
/* rv350,rv370,rv380 */
449
449
rdev->num_gb_pipes = 1;
450
450
}
451
+
rdev->num_z_pipes = 1;
451
452
gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16);
452
453
switch (rdev->num_gb_pipes) {
453
454
case 2:
···
487
486
printk(KERN_WARNING "Failed to wait MC idle while "
488
487
"programming pipes. Bad things might happen.\n");
489
488
}
490
-
DRM_INFO("radeon: %d pipes initialized.\n", rdev->num_gb_pipes);
489
+
DRM_INFO("radeon: %d quad pipes, %d Z pipes initialized.\n",
490
+
rdev->num_gb_pipes, rdev->num_z_pipes);
491
491
}
492
492
493
493
int r300_ga_reset(struct radeon_device *rdev)
+12
-1
drivers/gpu/drm/radeon/r420.c
+12
-1
drivers/gpu/drm/radeon/r420.c
···
165
165
printk(KERN_WARNING "Failed to wait GUI idle while "
166
166
"programming pipes. Bad things might happen.\n");
167
167
}
168
-
DRM_INFO("radeon: %d pipes initialized.\n", rdev->num_gb_pipes);
168
+
169
+
if (rdev->family == CHIP_RV530) {
170
+
tmp = RREG32(RV530_GB_PIPE_SELECT2);
171
+
if ((tmp & 3) == 3)
172
+
rdev->num_z_pipes = 2;
173
+
else
174
+
rdev->num_z_pipes = 1;
175
+
} else
176
+
rdev->num_z_pipes = 1;
177
+
178
+
DRM_INFO("radeon: %d quad pipes, %d z pipes initialized.\n",
179
+
rdev->num_gb_pipes, rdev->num_z_pipes);
169
180
}
170
181
171
182
void r420_gpu_init(struct radeon_device *rdev)
-1
drivers/gpu/drm/radeon/r520.c
-1
drivers/gpu/drm/radeon/r520.c
+1
drivers/gpu/drm/radeon/radeon.h
+1
drivers/gpu/drm/radeon/radeon.h
+9
drivers/gpu/drm/radeon/radeon_cp.c
+9
drivers/gpu/drm/radeon/radeon_cp.c
···
406
406
{
407
407
uint32_t gb_tile_config, gb_pipe_sel = 0;
408
408
409
+
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) {
410
+
uint32_t z_pipe_sel = RADEON_READ(RV530_GB_PIPE_SELECT2);
411
+
if ((z_pipe_sel & 3) == 3)
412
+
dev_priv->num_z_pipes = 2;
413
+
else
414
+
dev_priv->num_z_pipes = 1;
415
+
} else
416
+
dev_priv->num_z_pipes = 1;
417
+
409
418
/* RS4xx/RS6xx/R4xx/R5xx */
410
419
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) {
411
420
gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT);
+4
-1
drivers/gpu/drm/radeon/radeon_drv.h
+4
-1
drivers/gpu/drm/radeon/radeon_drv.h
···
100
100
* 1.28- Add support for VBL on CRTC2
101
101
* 1.29- R500 3D cmd buffer support
102
102
* 1.30- Add support for occlusion queries
103
+
* 1.31- Add support for num Z pipes from GET_PARAM
103
104
*/
104
105
#define DRIVER_MAJOR 1
105
-
#define DRIVER_MINOR 30
106
+
#define DRIVER_MINOR 31
106
107
#define DRIVER_PATCHLEVEL 0
107
108
108
109
/*
···
330
329
resource_size_t fb_aper_offset;
331
330
332
331
int num_gb_pipes;
332
+
int num_z_pipes;
333
333
int track_flush;
334
334
drm_local_map_t *mmio;
335
335
···
691
689
692
690
/* pipe config regs */
693
691
#define R400_GB_PIPE_SELECT 0x402c
692
+
#define RV530_GB_PIPE_SELECT2 0x4124
694
693
#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
695
694
#define R300_GB_TILE_CONFIG 0x4018
696
695
# define R300_ENABLE_TILING (1 << 0)
+1
-1
drivers/gpu/drm/radeon/radeon_gem.c
+1
-1
drivers/gpu/drm/radeon/radeon_gem.c
+4
drivers/gpu/drm/radeon/radeon_kms.c
+4
drivers/gpu/drm/radeon/radeon_kms.c
···
95
95
case RADEON_INFO_NUM_GB_PIPES:
96
96
value = rdev->num_gb_pipes;
97
97
break;
98
+
case RADEON_INFO_NUM_Z_PIPES:
99
+
value = rdev->num_z_pipes;
100
+
break;
98
101
default:
99
102
DRM_DEBUG("Invalid request %d\n", info->request);
100
103
return -EINVAL;
···
321
318
DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH),
322
319
DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH),
323
320
DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH),
321
+
DRM_IOCTL_DEF(DRM_RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH),
324
322
};
325
323
int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);
+5
drivers/gpu/drm/radeon/radeon_reg.h
+5
drivers/gpu/drm/radeon/radeon_reg.h
···
2337
2337
# define RADEON_RE_WIDTH_SHIFT 0
2338
2338
# define RADEON_RE_HEIGHT_SHIFT 16
2339
2339
2340
+
#define RADEON_RB3D_ZPASS_DATA 0x3290
2341
+
#define RADEON_RB3D_ZPASS_ADDR 0x3294
2342
+
2340
2343
#define RADEON_SE_CNTL 0x1c4c
2341
2344
# define RADEON_FFACE_CULL_CW (0 << 0)
2342
2345
# define RADEON_FFACE_CULL_CCW (1 << 0)
···
3573
3570
#define RADEON_SCRATCH_REG3 0x15ec
3574
3571
#define RADEON_SCRATCH_REG4 0x15f0
3575
3572
#define RADEON_SCRATCH_REG5 0x15f4
3573
+
3574
+
#define RV530_GB_PIPE_SELECT2 0x4124
3576
3575
3577
3576
#endif
+3
drivers/gpu/drm/radeon/radeon_state.c
+3
drivers/gpu/drm/radeon/radeon_state.c
···
3081
3081
case RADEON_PARAM_NUM_GB_PIPES:
3082
3082
value = dev_priv->num_gb_pipes;
3083
3083
break;
3084
+
case RADEON_PARAM_NUM_Z_PIPES:
3085
+
value = dev_priv->num_z_pipes;
3086
+
break;
3084
3087
default:
3085
3088
DRM_DEBUG("Invalid parameter %d\n", param->param);
3086
3089
return -EINVAL;
+4
include/drm/radeon_drm.h
+4
include/drm/radeon_drm.h
···
508
508
#define DRM_RADEON_INFO 0x27
509
509
#define DRM_RADEON_GEM_SET_TILING 0x28
510
510
#define DRM_RADEON_GEM_GET_TILING 0x29
511
+
#define DRM_RADEON_GEM_BUSY 0x2a
511
512
512
513
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
513
514
#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
···
549
548
#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
550
549
#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
551
550
#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
551
+
#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy)
552
552
553
553
typedef struct drm_radeon_init {
554
554
enum {
···
709
707
#define RADEON_PARAM_FB_LOCATION 14 /* FB location */
710
708
#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */
711
709
#define RADEON_PARAM_DEVICE_ID 16
710
+
#define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */
712
711
713
712
typedef struct drm_radeon_getparam {
714
713
int param;
···
898
895
899
896
#define RADEON_INFO_DEVICE_ID 0x00
900
897
#define RADEON_INFO_NUM_GB_PIPES 0x01
898
+
#define RADEON_INFO_NUM_Z_PIPES 0x02
901
899
902
900
struct drm_radeon_info {
903
901
uint32_t request;