Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue
Tony Nguyen says:
====================
ixgbe: Add basic devlink support
Jedrzej Jagielski says:
Create devlink specific directory for more convenient future feature
development.
Flashing and reloading are supported only by E610 devices.
Introduce basic FW/NVM validation since devlink reload introduces
possibility of runtime NVM update. Check FW API version, FW recovery
mode and FW rollback mode. Introduce minimal recovery probe to let
user to reload the faulty FW when recovery mode is detected.
* '10GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue:
ixgbe: add support for FW rollback mode
ixgbe: add E610 implementation of FW recovery mode
ixgbe: add FW API version check
ixgbe: add support for devlink reload
ixgbe: add device flash update via devlink
ixgbe: extend .info_get() with stored versions
ixgbe: add E610 functions getting PBA and FW ver info
ixgbe: add .info_get extension specific for E610 devices
ixgbe: read the netlist version information
ixgbe: read the OROM version information
ixgbe: add E610 functions for acquiring flash data
ixgbe: add handler for devlink .info_get()
ixgbe: add initial devlink support
ixgbe: wrap netdev_priv() usage
devlink: add value check to devlink_info_version_put()
====================
Link: https://patch.msgid.link/20250415221301.1633933-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+3249
-142
+4
Documentation/networking/devlink/devlink-info.rst
+4
Documentation/networking/devlink/devlink-info.rst
···
86
86
``/lib/firmware``) only the running version should be reported via
87
87
the kernel API.
88
88
89
+
Please note that any security versions reported via devlink are purely
90
+
informational. Devlink does not use a secure channel to communicate with
91
+
the device.
92
+
89
93
Generic Versions
90
94
================
91
95
+1
Documentation/networking/devlink/index.rst
+1
Documentation/networking/devlink/index.rst
+122
Documentation/networking/devlink/ixgbe.rst
+122
Documentation/networking/devlink/ixgbe.rst
···
1
+
.. SPDX-License-Identifier: GPL-2.0
2
+
3
+
=====================
4
+
ixgbe devlink support
5
+
=====================
6
+
7
+
This document describes the devlink features implemented by the ``ixgbe``
8
+
device driver.
9
+
10
+
Info versions
11
+
=============
12
+
13
+
Any of the versions dealing with the security presented by ``devlink-info``
14
+
is purely informational. Devlink does not use a secure channel to communicate
15
+
with the device.
16
+
17
+
The ``ixgbe`` driver reports the following versions
18
+
19
+
.. list-table:: devlink info versions implemented
20
+
:widths: 5 5 5 90
21
+
22
+
* - Name
23
+
- Type
24
+
- Example
25
+
- Description
26
+
* - ``board.id``
27
+
- fixed
28
+
- H49289-000
29
+
- The Product Board Assembly (PBA) identifier of the board.
30
+
* - ``fw.undi``
31
+
- running
32
+
- 1.1937.0
33
+
- Version of the Option ROM containing the UEFI driver. The version is
34
+
reported in ``major.minor.patch`` format. The major version is
35
+
incremented whenever a major breaking change occurs, or when the
36
+
minor version would overflow. The minor version is incremented for
37
+
non-breaking changes and reset to 1 when the major version is
38
+
incremented. The patch version is normally 0 but is incremented when
39
+
a fix is delivered as a patch against an older base Option ROM.
40
+
* - ``fw.undi.srev``
41
+
- running
42
+
- 4
43
+
- Number indicating the security revision of the Option ROM.
44
+
* - ``fw.bundle_id``
45
+
- running
46
+
- 0x80000d0d
47
+
- Unique identifier of the firmware image file that was loaded onto
48
+
the device. Also referred to as the EETRACK identifier of the NVM.
49
+
* - ``fw.mgmt.api``
50
+
- running
51
+
- 1.5.1
52
+
- 3-digit version number (major.minor.patch) of the API exported over
53
+
the AdminQ by the management firmware. Used by the driver to
54
+
identify what commands are supported. Historical versions of the
55
+
kernel only displayed a 2-digit version number (major.minor).
56
+
* - ``fw.mgmt.build``
57
+
- running
58
+
- 0x305d955f
59
+
- Unique identifier of the source for the management firmware.
60
+
* - ``fw.mgmt.srev``
61
+
- running
62
+
- 3
63
+
- Number indicating the security revision of the firmware.
64
+
* - ``fw.psid.api``
65
+
- running
66
+
- 0.80
67
+
- Version defining the format of the flash contents.
68
+
* - ``fw.netlist``
69
+
- running
70
+
- 1.1.2000-6.7.0
71
+
- The version of the netlist module. This module defines the device's
72
+
Ethernet capabilities and default settings, and is used by the
73
+
management firmware as part of managing link and device
74
+
connectivity.
75
+
* - ``fw.netlist.build``
76
+
- running
77
+
- 0xee16ced7
78
+
- The first 4 bytes of the hash of the netlist module contents.
79
+
80
+
Flash Update
81
+
============
82
+
83
+
The ``ixgbe`` driver implements support for flash update using the
84
+
``devlink-flash`` interface. It supports updating the device flash using a
85
+
combined flash image that contains the ``fw.mgmt``, ``fw.undi``, and
86
+
``fw.netlist`` components.
87
+
88
+
.. list-table:: List of supported overwrite modes
89
+
:widths: 5 95
90
+
91
+
* - Bits
92
+
- Behavior
93
+
* - ``DEVLINK_FLASH_OVERWRITE_SETTINGS``
94
+
- Do not preserve settings stored in the flash components being
95
+
updated. This includes overwriting the port configuration that
96
+
determines the number of physical functions the device will
97
+
initialize with.
98
+
* - ``DEVLINK_FLASH_OVERWRITE_SETTINGS`` and ``DEVLINK_FLASH_OVERWRITE_IDENTIFIERS``
99
+
- Do not preserve either settings or identifiers. Overwrite everything
100
+
in the flash with the contents from the provided image, without
101
+
performing any preservation. This includes overwriting device
102
+
identifying fields such as the MAC address, Vital product Data (VPD) area,
103
+
and device serial number. It is expected that this combination be used with an
104
+
image customized for the specific device.
105
+
106
+
Reload
107
+
======
108
+
109
+
The ``ixgbe`` driver supports activating new firmware after a flash update
110
+
using ``DEVLINK_CMD_RELOAD`` with the ``DEVLINK_RELOAD_ACTION_FW_ACTIVATE``
111
+
action.
112
+
113
+
.. code:: shell
114
+
115
+
$ devlink dev reload pci/0000:01:00.0 reload action fw_activate
116
+
117
+
The new firmware is activated by issuing a device specific Embedded
118
+
Management Processor reset which requests the device to reset and reload the
119
+
EMP firmware image.
120
+
121
+
The driver does not currently support reloading the driver via
122
+
``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``.
+2
drivers/net/ethernet/intel/Kconfig
+2
drivers/net/ethernet/intel/Kconfig
+2
-1
drivers/net/ethernet/intel/ixgbe/Makefile
+2
-1
drivers/net/ethernet/intel/ixgbe/Makefile
···
4
4
# Makefile for the Intel(R) 10GbE PCI Express ethernet driver
5
5
#
6
6
7
+
subdir-ccflags-y += -I$(src)
7
8
obj-$(CONFIG_IXGBE) += ixgbe.o
8
9
9
10
ixgbe-y := ixgbe_main.o ixgbe_common.o ixgbe_ethtool.o \
10
11
ixgbe_82599.o ixgbe_82598.o ixgbe_phy.o ixgbe_sriov.o \
11
12
ixgbe_mbx.o ixgbe_x540.o ixgbe_x550.o ixgbe_lib.o ixgbe_ptp.o \
12
-
ixgbe_xsk.o ixgbe_e610.o
13
+
ixgbe_xsk.o ixgbe_e610.o devlink/devlink.o ixgbe_fw_update.o
13
14
14
15
ixgbe-$(CONFIG_IXGBE_DCB) += ixgbe_dcb.o ixgbe_dcb_82598.o \
15
16
ixgbe_dcb_82599.o ixgbe_dcb_nl.o
+557
drivers/net/ethernet/intel/ixgbe/devlink/devlink.c
+557
drivers/net/ethernet/intel/ixgbe/devlink/devlink.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/* Copyright (c) 2025, Intel Corporation. */
3
+
4
+
#include "ixgbe.h"
5
+
#include "devlink.h"
6
+
#include "ixgbe_fw_update.h"
7
+
8
+
struct ixgbe_info_ctx {
9
+
char buf[128];
10
+
struct ixgbe_orom_info pending_orom;
11
+
struct ixgbe_nvm_info pending_nvm;
12
+
struct ixgbe_netlist_info pending_netlist;
13
+
struct ixgbe_hw_dev_caps dev_caps;
14
+
};
15
+
16
+
enum ixgbe_devlink_version_type {
17
+
IXGBE_DL_VERSION_RUNNING,
18
+
IXGBE_DL_VERSION_STORED
19
+
};
20
+
21
+
static void ixgbe_info_get_dsn(struct ixgbe_adapter *adapter,
22
+
struct ixgbe_info_ctx *ctx)
23
+
{
24
+
u8 dsn[8];
25
+
26
+
/* Copy the DSN into an array in Big Endian format */
27
+
put_unaligned_be64(pci_get_dsn(adapter->pdev), dsn);
28
+
29
+
snprintf(ctx->buf, sizeof(ctx->buf), "%8phD", dsn);
30
+
}
31
+
32
+
static void ixgbe_info_orom_ver(struct ixgbe_adapter *adapter,
33
+
struct ixgbe_info_ctx *ctx,
34
+
enum ixgbe_devlink_version_type type)
35
+
{
36
+
struct ixgbe_hw *hw = &adapter->hw;
37
+
struct ixgbe_nvm_version nvm_ver;
38
+
39
+
ctx->buf[0] = '\0';
40
+
41
+
if (hw->mac.type == ixgbe_mac_e610) {
42
+
struct ixgbe_orom_info *orom = &adapter->hw.flash.orom;
43
+
44
+
if (type == IXGBE_DL_VERSION_STORED &&
45
+
ctx->dev_caps.common_cap.nvm_update_pending_orom)
46
+
orom = &ctx->pending_orom;
47
+
48
+
snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u",
49
+
orom->major, orom->build, orom->patch);
50
+
return;
51
+
}
52
+
53
+
ixgbe_get_oem_prod_version(hw, &nvm_ver);
54
+
if (nvm_ver.oem_valid) {
55
+
snprintf(ctx->buf, sizeof(ctx->buf), "%x.%x.%x",
56
+
nvm_ver.oem_major, nvm_ver.oem_minor,
57
+
nvm_ver.oem_release);
58
+
59
+
return;
60
+
}
61
+
62
+
ixgbe_get_orom_version(hw, &nvm_ver);
63
+
if (nvm_ver.or_valid)
64
+
snprintf(ctx->buf, sizeof(ctx->buf), "%d.%d.%d",
65
+
nvm_ver.or_major, nvm_ver.or_build, nvm_ver.or_patch);
66
+
}
67
+
68
+
static void ixgbe_info_eetrack(struct ixgbe_adapter *adapter,
69
+
struct ixgbe_info_ctx *ctx,
70
+
enum ixgbe_devlink_version_type type)
71
+
{
72
+
struct ixgbe_hw *hw = &adapter->hw;
73
+
struct ixgbe_nvm_version nvm_ver;
74
+
75
+
if (hw->mac.type == ixgbe_mac_e610) {
76
+
u32 eetrack = hw->flash.nvm.eetrack;
77
+
78
+
if (type == IXGBE_DL_VERSION_STORED &&
79
+
ctx->dev_caps.common_cap.nvm_update_pending_nvm)
80
+
eetrack = ctx->pending_nvm.eetrack;
81
+
82
+
snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", eetrack);
83
+
return;
84
+
}
85
+
86
+
ixgbe_get_oem_prod_version(hw, &nvm_ver);
87
+
88
+
/* No ETRACK version for OEM */
89
+
if (nvm_ver.oem_valid) {
90
+
ctx->buf[0] = '\0';
91
+
return;
92
+
}
93
+
94
+
ixgbe_get_etk_id(hw, &nvm_ver);
95
+
snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", nvm_ver.etk_id);
96
+
}
97
+
98
+
static void ixgbe_info_fw_api(struct ixgbe_adapter *adapter,
99
+
struct ixgbe_info_ctx *ctx)
100
+
{
101
+
struct ixgbe_hw *hw = &adapter->hw;
102
+
103
+
snprintf(ctx->buf, sizeof(ctx->buf), "%u.%u.%u",
104
+
hw->api_maj_ver, hw->api_min_ver, hw->api_patch);
105
+
}
106
+
107
+
static void ixgbe_info_fw_build(struct ixgbe_adapter *adapter,
108
+
struct ixgbe_info_ctx *ctx)
109
+
{
110
+
struct ixgbe_hw *hw = &adapter->hw;
111
+
112
+
snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", hw->fw_build);
113
+
}
114
+
115
+
static void ixgbe_info_fw_srev(struct ixgbe_adapter *adapter,
116
+
struct ixgbe_info_ctx *ctx,
117
+
enum ixgbe_devlink_version_type type)
118
+
{
119
+
struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm;
120
+
121
+
if (type == IXGBE_DL_VERSION_STORED &&
122
+
ctx->dev_caps.common_cap.nvm_update_pending_nvm)
123
+
nvm = &ctx->pending_nvm;
124
+
125
+
snprintf(ctx->buf, sizeof(ctx->buf), "%u", nvm->srev);
126
+
}
127
+
128
+
static void ixgbe_info_orom_srev(struct ixgbe_adapter *adapter,
129
+
struct ixgbe_info_ctx *ctx,
130
+
enum ixgbe_devlink_version_type type)
131
+
{
132
+
struct ixgbe_orom_info *orom = &adapter->hw.flash.orom;
133
+
134
+
if (type == IXGBE_DL_VERSION_STORED &&
135
+
ctx->dev_caps.common_cap.nvm_update_pending_orom)
136
+
orom = &ctx->pending_orom;
137
+
138
+
snprintf(ctx->buf, sizeof(ctx->buf), "%u", orom->srev);
139
+
}
140
+
141
+
static void ixgbe_info_nvm_ver(struct ixgbe_adapter *adapter,
142
+
struct ixgbe_info_ctx *ctx,
143
+
enum ixgbe_devlink_version_type type)
144
+
{
145
+
struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm;
146
+
147
+
if (type == IXGBE_DL_VERSION_STORED &&
148
+
ctx->dev_caps.common_cap.nvm_update_pending_nvm)
149
+
nvm = &ctx->pending_nvm;
150
+
151
+
snprintf(ctx->buf, sizeof(ctx->buf), "%x.%02x", nvm->major, nvm->minor);
152
+
}
153
+
154
+
static void ixgbe_info_netlist_ver(struct ixgbe_adapter *adapter,
155
+
struct ixgbe_info_ctx *ctx,
156
+
enum ixgbe_devlink_version_type type)
157
+
{
158
+
struct ixgbe_netlist_info *netlist = &adapter->hw.flash.netlist;
159
+
160
+
if (type == IXGBE_DL_VERSION_STORED &&
161
+
ctx->dev_caps.common_cap.nvm_update_pending_netlist)
162
+
netlist = &ctx->pending_netlist;
163
+
164
+
/* The netlist version fields are BCD formatted */
165
+
snprintf(ctx->buf, sizeof(ctx->buf), "%x.%x.%x-%x.%x.%x",
166
+
netlist->major, netlist->minor,
167
+
netlist->type >> 16, netlist->type & 0xFFFF,
168
+
netlist->rev, netlist->cust_ver);
169
+
}
170
+
171
+
static void ixgbe_info_netlist_build(struct ixgbe_adapter *adapter,
172
+
struct ixgbe_info_ctx *ctx,
173
+
enum ixgbe_devlink_version_type type)
174
+
{
175
+
struct ixgbe_netlist_info *netlist = &adapter->hw.flash.netlist;
176
+
177
+
if (type == IXGBE_DL_VERSION_STORED &&
178
+
ctx->dev_caps.common_cap.nvm_update_pending_netlist)
179
+
netlist = &ctx->pending_netlist;
180
+
181
+
snprintf(ctx->buf, sizeof(ctx->buf), "0x%08x", netlist->hash);
182
+
}
183
+
184
+
static int ixgbe_set_ctx_dev_caps(struct ixgbe_hw *hw,
185
+
struct ixgbe_info_ctx *ctx,
186
+
struct netlink_ext_ack *extack)
187
+
{
188
+
bool *pending_orom, *pending_nvm, *pending_netlist;
189
+
int err;
190
+
191
+
err = ixgbe_discover_dev_caps(hw, &ctx->dev_caps);
192
+
if (err) {
193
+
NL_SET_ERR_MSG_MOD(extack,
194
+
"Unable to discover device capabilities");
195
+
return err;
196
+
}
197
+
198
+
pending_orom = &ctx->dev_caps.common_cap.nvm_update_pending_orom;
199
+
pending_nvm = &ctx->dev_caps.common_cap.nvm_update_pending_nvm;
200
+
pending_netlist = &ctx->dev_caps.common_cap.nvm_update_pending_netlist;
201
+
202
+
if (*pending_orom) {
203
+
err = ixgbe_get_inactive_orom_ver(hw, &ctx->pending_orom);
204
+
if (err)
205
+
*pending_orom = false;
206
+
}
207
+
208
+
if (*pending_nvm) {
209
+
err = ixgbe_get_inactive_nvm_ver(hw, &ctx->pending_nvm);
210
+
if (err)
211
+
*pending_nvm = false;
212
+
}
213
+
214
+
if (*pending_netlist) {
215
+
err = ixgbe_get_inactive_netlist_ver(hw, &ctx->pending_netlist);
216
+
if (err)
217
+
*pending_netlist = false;
218
+
}
219
+
220
+
return 0;
221
+
}
222
+
223
+
static int ixgbe_devlink_info_get_e610(struct ixgbe_adapter *adapter,
224
+
struct devlink_info_req *req,
225
+
struct ixgbe_info_ctx *ctx)
226
+
{
227
+
int err;
228
+
229
+
ixgbe_info_fw_api(adapter, ctx);
230
+
err = devlink_info_version_running_put(req,
231
+
DEVLINK_INFO_VERSION_GENERIC_FW_MGMT_API,
232
+
ctx->buf);
233
+
if (err)
234
+
return err;
235
+
236
+
ixgbe_info_fw_build(adapter, ctx);
237
+
err = devlink_info_version_running_put(req, "fw.mgmt.build", ctx->buf);
238
+
if (err)
239
+
return err;
240
+
241
+
ixgbe_info_fw_srev(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
242
+
err = devlink_info_version_running_put(req, "fw.mgmt.srev", ctx->buf);
243
+
if (err)
244
+
return err;
245
+
246
+
ixgbe_info_orom_srev(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
247
+
err = devlink_info_version_running_put(req, "fw.undi.srev", ctx->buf);
248
+
if (err)
249
+
return err;
250
+
251
+
ixgbe_info_nvm_ver(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
252
+
err = devlink_info_version_running_put(req, "fw.psid.api", ctx->buf);
253
+
if (err)
254
+
return err;
255
+
256
+
ixgbe_info_netlist_ver(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
257
+
err = devlink_info_version_running_put(req, "fw.netlist", ctx->buf);
258
+
if (err)
259
+
return err;
260
+
261
+
ixgbe_info_netlist_build(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
262
+
return devlink_info_version_running_put(req, "fw.netlist.build",
263
+
ctx->buf);
264
+
}
265
+
266
+
static int
267
+
ixgbe_devlink_pending_info_get_e610(struct ixgbe_adapter *adapter,
268
+
struct devlink_info_req *req,
269
+
struct ixgbe_info_ctx *ctx)
270
+
{
271
+
int err;
272
+
273
+
ixgbe_info_orom_ver(adapter, ctx, IXGBE_DL_VERSION_STORED);
274
+
err = devlink_info_version_stored_put(req,
275
+
DEVLINK_INFO_VERSION_GENERIC_FW_UNDI,
276
+
ctx->buf);
277
+
if (err)
278
+
return err;
279
+
280
+
ixgbe_info_eetrack(adapter, ctx, IXGBE_DL_VERSION_STORED);
281
+
err = devlink_info_version_stored_put(req,
282
+
DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID,
283
+
ctx->buf);
284
+
if (err)
285
+
return err;
286
+
287
+
ixgbe_info_fw_srev(adapter, ctx, IXGBE_DL_VERSION_STORED);
288
+
err = devlink_info_version_stored_put(req, "fw.mgmt.srev", ctx->buf);
289
+
if (err)
290
+
return err;
291
+
292
+
ixgbe_info_orom_srev(adapter, ctx, IXGBE_DL_VERSION_STORED);
293
+
err = devlink_info_version_stored_put(req, "fw.undi.srev", ctx->buf);
294
+
if (err)
295
+
return err;
296
+
297
+
ixgbe_info_nvm_ver(adapter, ctx, IXGBE_DL_VERSION_STORED);
298
+
err = devlink_info_version_stored_put(req, "fw.psid.api", ctx->buf);
299
+
if (err)
300
+
return err;
301
+
302
+
ixgbe_info_netlist_ver(adapter, ctx, IXGBE_DL_VERSION_STORED);
303
+
err = devlink_info_version_stored_put(req, "fw.netlist", ctx->buf);
304
+
if (err)
305
+
return err;
306
+
307
+
ixgbe_info_netlist_build(adapter, ctx, IXGBE_DL_VERSION_STORED);
308
+
return devlink_info_version_stored_put(req, "fw.netlist.build",
309
+
ctx->buf);
310
+
}
311
+
312
+
static int ixgbe_devlink_info_get(struct devlink *devlink,
313
+
struct devlink_info_req *req,
314
+
struct netlink_ext_ack *extack)
315
+
{
316
+
struct ixgbe_adapter *adapter = devlink_priv(devlink);
317
+
struct ixgbe_hw *hw = &adapter->hw;
318
+
struct ixgbe_info_ctx *ctx;
319
+
int err;
320
+
321
+
ctx = kmalloc(sizeof(*ctx), GFP_KERNEL);
322
+
if (!ctx)
323
+
return -ENOMEM;
324
+
325
+
if (hw->mac.type == ixgbe_mac_e610)
326
+
ixgbe_refresh_fw_version(adapter);
327
+
328
+
ixgbe_info_get_dsn(adapter, ctx);
329
+
err = devlink_info_serial_number_put(req, ctx->buf);
330
+
if (err)
331
+
goto free_ctx;
332
+
333
+
err = hw->eeprom.ops.read_pba_string(hw, ctx->buf, sizeof(ctx->buf));
334
+
if (err)
335
+
goto free_ctx;
336
+
337
+
err = devlink_info_version_fixed_put(req,
338
+
DEVLINK_INFO_VERSION_GENERIC_BOARD_ID,
339
+
ctx->buf);
340
+
if (err)
341
+
goto free_ctx;
342
+
343
+
ixgbe_info_orom_ver(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
344
+
err = devlink_info_version_running_put(req,
345
+
DEVLINK_INFO_VERSION_GENERIC_FW_UNDI,
346
+
ctx->buf);
347
+
if (err)
348
+
goto free_ctx;
349
+
350
+
ixgbe_info_eetrack(adapter, ctx, IXGBE_DL_VERSION_RUNNING);
351
+
err = devlink_info_version_running_put(req,
352
+
DEVLINK_INFO_VERSION_GENERIC_FW_BUNDLE_ID,
353
+
ctx->buf);
354
+
if (err || hw->mac.type != ixgbe_mac_e610)
355
+
goto free_ctx;
356
+
357
+
err = ixgbe_set_ctx_dev_caps(hw, ctx, extack);
358
+
if (err)
359
+
goto free_ctx;
360
+
361
+
err = ixgbe_devlink_info_get_e610(adapter, req, ctx);
362
+
if (err)
363
+
goto free_ctx;
364
+
365
+
err = ixgbe_devlink_pending_info_get_e610(adapter, req, ctx);
366
+
free_ctx:
367
+
kfree(ctx);
368
+
return err;
369
+
}
370
+
371
+
/**
372
+
* ixgbe_devlink_reload_empr_start - Start EMP reset to activate new firmware
373
+
* @devlink: pointer to the devlink instance to reload
374
+
* @netns_change: if true, the network namespace is changing
375
+
* @action: the action to perform. Must be DEVLINK_RELOAD_ACTION_FW_ACTIVATE
376
+
* @limit: limits on what reload should do, such as not resetting
377
+
* @extack: netlink extended ACK structure
378
+
*
379
+
* Allow user to activate new Embedded Management Processor firmware by
380
+
* issuing device specific EMP reset. Called in response to
381
+
* a DEVLINK_CMD_RELOAD with the DEVLINK_RELOAD_ACTION_FW_ACTIVATE.
382
+
*
383
+
* Note that teardown and rebuild of the driver state happens automatically as
384
+
* part of an interrupt and watchdog task. This is because all physical
385
+
* functions on the device must be able to reset when an EMP reset occurs from
386
+
* any source.
387
+
*
388
+
* Return: the exit code of the operation.
389
+
*/
390
+
static int ixgbe_devlink_reload_empr_start(struct devlink *devlink,
391
+
bool netns_change,
392
+
enum devlink_reload_action action,
393
+
enum devlink_reload_limit limit,
394
+
struct netlink_ext_ack *extack)
395
+
{
396
+
struct ixgbe_adapter *adapter = devlink_priv(devlink);
397
+
struct ixgbe_hw *hw = &adapter->hw;
398
+
u8 pending;
399
+
int err;
400
+
401
+
if (hw->mac.type != ixgbe_mac_e610)
402
+
return -EOPNOTSUPP;
403
+
404
+
err = ixgbe_get_pending_updates(adapter, &pending, extack);
405
+
if (err)
406
+
return err;
407
+
408
+
/* Pending is a bitmask of which flash banks have a pending update,
409
+
* including the main NVM bank, the Option ROM bank, and the netlist
410
+
* bank. If any of these bits are set, then there is a pending update
411
+
* waiting to be activated.
412
+
*/
413
+
if (!pending) {
414
+
NL_SET_ERR_MSG_MOD(extack, "No pending firmware update");
415
+
return -ECANCELED;
416
+
}
417
+
418
+
if (adapter->fw_emp_reset_disabled) {
419
+
NL_SET_ERR_MSG_MOD(extack,
420
+
"EMP reset is not available. To activate firmware, a reboot or power cycle is needed");
421
+
return -ECANCELED;
422
+
}
423
+
424
+
err = ixgbe_aci_nvm_update_empr(hw);
425
+
if (err)
426
+
NL_SET_ERR_MSG_MOD(extack,
427
+
"Failed to trigger EMP device reset to reload firmware");
428
+
429
+
return err;
430
+
}
431
+
432
+
/*Wait for 10 sec with 0.5 sec tic. EMPR takes no less than half of a sec */
433
+
#define IXGBE_DEVLINK_RELOAD_TIMEOUT_SEC 20
434
+
435
+
/**
436
+
* ixgbe_devlink_reload_empr_finish - finishes EMP reset
437
+
* @devlink: pointer to the devlink instance
438
+
* @action: the action to perform.
439
+
* @limit: limits on what reload should do
440
+
* @actions_performed: actions performed
441
+
* @extack: netlink extended ACK structure
442
+
*
443
+
* Wait for new NVM to be loaded during EMP reset.
444
+
*
445
+
* Return: -ETIME when timer is exceeded, 0 on success.
446
+
*/
447
+
static int ixgbe_devlink_reload_empr_finish(struct devlink *devlink,
448
+
enum devlink_reload_action action,
449
+
enum devlink_reload_limit limit,
450
+
u32 *actions_performed,
451
+
struct netlink_ext_ack *extack)
452
+
{
453
+
struct ixgbe_adapter *adapter = devlink_priv(devlink);
454
+
struct ixgbe_hw *hw = &adapter->hw;
455
+
int i = 0;
456
+
u32 fwsm;
457
+
458
+
do {
459
+
/* Just right away after triggering EMP reset the FWSM register
460
+
* may be not cleared yet, so begin the loop with the delay
461
+
* in order to not check the not updated register.
462
+
*/
463
+
mdelay(500);
464
+
465
+
fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
466
+
467
+
if (i++ >= IXGBE_DEVLINK_RELOAD_TIMEOUT_SEC)
468
+
return -ETIME;
469
+
470
+
} while (!(fwsm & IXGBE_FWSM_FW_VAL_BIT));
471
+
472
+
*actions_performed = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE);
473
+
474
+
adapter->flags2 &= ~(IXGBE_FLAG2_API_MISMATCH |
475
+
IXGBE_FLAG2_FW_ROLLBACK);
476
+
477
+
return 0;
478
+
}
479
+
480
+
static const struct devlink_ops ixgbe_devlink_ops = {
481
+
.info_get = ixgbe_devlink_info_get,
482
+
.supported_flash_update_params =
483
+
DEVLINK_SUPPORT_FLASH_UPDATE_OVERWRITE_MASK,
484
+
.flash_update = ixgbe_flash_pldm_image,
485
+
.reload_actions = BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
486
+
.reload_down = ixgbe_devlink_reload_empr_start,
487
+
.reload_up = ixgbe_devlink_reload_empr_finish,
488
+
};
489
+
490
+
/**
491
+
* ixgbe_allocate_devlink - Allocate devlink instance
492
+
* @dev: device to allocate devlink for
493
+
*
494
+
* Allocate a devlink instance for this physical function.
495
+
*
496
+
* Return: pointer to the device adapter structure on success,
497
+
* ERR_PTR(-ENOMEM) when allocation failed.
498
+
*/
499
+
struct ixgbe_adapter *ixgbe_allocate_devlink(struct device *dev)
500
+
{
501
+
struct ixgbe_adapter *adapter;
502
+
struct devlink *devlink;
503
+
504
+
devlink = devlink_alloc(&ixgbe_devlink_ops, sizeof(*adapter), dev);
505
+
if (!devlink)
506
+
return ERR_PTR(-ENOMEM);
507
+
508
+
adapter = devlink_priv(devlink);
509
+
adapter->devlink = devlink;
510
+
511
+
return adapter;
512
+
}
513
+
514
+
/**
515
+
* ixgbe_devlink_set_switch_id - Set unique switch ID based on PCI DSN
516
+
* @adapter: pointer to the device adapter structure
517
+
* @ppid: struct with switch id information
518
+
*/
519
+
static void ixgbe_devlink_set_switch_id(struct ixgbe_adapter *adapter,
520
+
struct netdev_phys_item_id *ppid)
521
+
{
522
+
u64 id = pci_get_dsn(adapter->pdev);
523
+
524
+
ppid->id_len = sizeof(id);
525
+
put_unaligned_be64(id, &ppid->id);
526
+
}
527
+
528
+
/**
529
+
* ixgbe_devlink_register_port - Register devlink port
530
+
* @adapter: pointer to the device adapter structure
531
+
*
532
+
* Create and register a devlink_port for this physical function.
533
+
*
534
+
* Return: 0 on success, error code on failure.
535
+
*/
536
+
int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter)
537
+
{
538
+
struct devlink_port *devlink_port = &adapter->devlink_port;
539
+
struct devlink *devlink = adapter->devlink;
540
+
struct device *dev = &adapter->pdev->dev;
541
+
struct devlink_port_attrs attrs = {};
542
+
int err;
543
+
544
+
attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
545
+
attrs.phys.port_number = adapter->hw.bus.func;
546
+
ixgbe_devlink_set_switch_id(adapter, &attrs.switch_id);
547
+
548
+
devlink_port_attrs_set(devlink_port, &attrs);
549
+
550
+
err = devl_port_register(devlink, devlink_port, 0);
551
+
if (err) {
552
+
dev_err(dev,
553
+
"devlink port registration failed, err %d\n", err);
554
+
}
555
+
556
+
return err;
557
+
}
+10
drivers/net/ethernet/intel/ixgbe/devlink/devlink.h
+10
drivers/net/ethernet/intel/ixgbe/devlink/devlink.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/* Copyright (c) 2025, Intel Corporation. */
3
+
4
+
#ifndef _IXGBE_DEVLINK_H_
5
+
#define _IXGBE_DEVLINK_H_
6
+
7
+
struct ixgbe_adapter *ixgbe_allocate_devlink(struct device *dev);
8
+
int ixgbe_devlink_register_port(struct ixgbe_adapter *adapter);
9
+
10
+
#endif /* _IXGBE_DEVLINK_H_ */
+21
drivers/net/ethernet/intel/ixgbe/ixgbe.h
+21
drivers/net/ethernet/intel/ixgbe/ixgbe.h
···
17
17
#include <linux/net_tstamp.h>
18
18
#include <linux/ptp_clock_kernel.h>
19
19
20
+
#include <net/devlink.h>
21
+
20
22
#include "ixgbe_type.h"
21
23
#include "ixgbe_common.h"
22
24
#include "ixgbe_dcb.h"
···
614
612
struct bpf_prog *xdp_prog;
615
613
struct pci_dev *pdev;
616
614
struct mii_bus *mii_bus;
615
+
struct devlink *devlink;
616
+
struct devlink_port devlink_port;
617
617
618
618
unsigned long state;
619
619
···
671
667
#define IXGBE_FLAG2_PHY_FW_LOAD_FAILED BIT(20)
672
668
#define IXGBE_FLAG2_NO_MEDIA BIT(21)
673
669
#define IXGBE_FLAG2_MOD_POWER_UNSUPPORTED BIT(22)
670
+
#define IXGBE_FLAG2_API_MISMATCH BIT(23)
671
+
#define IXGBE_FLAG2_FW_ROLLBACK BIT(24)
674
672
675
673
/* Tx fast path data */
676
674
int num_tx_queues;
···
761
755
u32 atr_sample_rate;
762
756
spinlock_t fdir_perfect_lock;
763
757
758
+
bool fw_emp_reset_disabled;
759
+
764
760
#ifdef IXGBE_FCOE
765
761
struct ixgbe_fcoe fcoe;
766
762
#endif /* IXGBE_FCOE */
···
837
829
#endif /* CONFIG_IXGBE_IPSEC */
838
830
spinlock_t vfs_lock;
839
831
};
832
+
833
+
struct ixgbe_netdevice_priv {
834
+
struct ixgbe_adapter *adapter;
835
+
};
836
+
837
+
static inline struct ixgbe_adapter *ixgbe_from_netdev(struct net_device *netdev)
838
+
{
839
+
struct ixgbe_netdevice_priv *priv = netdev_priv(netdev);
840
+
841
+
return priv->adapter;
842
+
}
840
843
841
844
static inline int ixgbe_determine_xdp_q_idx(int cpu)
842
845
{
···
964
945
int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);
965
946
bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
966
947
u16 subdevice_id);
948
+
void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter);
949
+
void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter);
967
950
#ifdef CONFIG_PCI_IOV
968
951
void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter);
969
952
#endif
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_82598.c
···
1169
1169
.calc_checksum = &ixgbe_calc_eeprom_checksum_generic,
1170
1170
.validate_checksum = &ixgbe_validate_eeprom_checksum_generic,
1171
1171
.update_checksum = &ixgbe_update_eeprom_checksum_generic,
1172
+
.read_pba_string = &ixgbe_read_pba_string_generic,
1172
1173
};
1173
1174
1174
1175
static const struct ixgbe_phy_operations phy_ops_82598 = {
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
···
2230
2230
.calc_checksum = &ixgbe_calc_eeprom_checksum_generic,
2231
2231
.validate_checksum = &ixgbe_validate_eeprom_checksum_generic,
2232
2232
.update_checksum = &ixgbe_update_eeprom_checksum_generic,
2233
+
.read_pba_string = &ixgbe_read_pba_string_generic,
2233
2234
};
2234
2235
2235
2236
static const struct ixgbe_phy_operations phy_ops_82599 = {
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+28
-28
drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
+28
-28
drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.c
···
118
118
119
119
static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
120
120
{
121
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
121
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
122
122
123
123
return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
124
124
}
125
125
126
126
static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
127
127
{
128
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
128
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
129
129
130
130
/* Fail command if not in CEE mode */
131
131
if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE))
···
142
142
static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
143
143
u8 *perm_addr)
144
144
{
145
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
145
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
146
146
int i, j;
147
147
148
148
memset(perm_addr, 0xff, MAX_ADDR_LEN);
···
167
167
u8 prio, u8 bwg_id, u8 bw_pct,
168
168
u8 up_map)
169
169
{
170
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
170
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
171
171
172
172
if (prio != DCB_ATTR_VALUE_UNDEFINED)
173
173
adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
···
184
184
static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
185
185
u8 bw_pct)
186
186
{
187
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
187
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
188
188
189
189
adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
190
190
}
···
193
193
u8 prio, u8 bwg_id, u8 bw_pct,
194
194
u8 up_map)
195
195
{
196
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
196
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
197
197
198
198
if (prio != DCB_ATTR_VALUE_UNDEFINED)
199
199
adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
···
210
210
static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
211
211
u8 bw_pct)
212
212
{
213
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
213
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
214
214
215
215
adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
216
216
}
···
219
219
u8 *prio, u8 *bwg_id, u8 *bw_pct,
220
220
u8 *up_map)
221
221
{
222
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
222
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
223
223
224
224
*prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
225
225
*bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
···
230
230
static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
231
231
u8 *bw_pct)
232
232
{
233
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
233
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
234
234
235
235
*bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
236
236
}
···
239
239
u8 *prio, u8 *bwg_id, u8 *bw_pct,
240
240
u8 *up_map)
241
241
{
242
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
242
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
243
243
244
244
*prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
245
245
*bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
···
250
250
static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
251
251
u8 *bw_pct)
252
252
{
253
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
253
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
254
254
255
255
*bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
256
256
}
···
258
258
static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
259
259
u8 setting)
260
260
{
261
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
261
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
262
262
263
263
adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
264
264
if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
···
269
269
static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
270
270
u8 *setting)
271
271
{
272
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
272
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
273
273
274
274
*setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
275
275
}
276
276
277
277
static void ixgbe_dcbnl_devreset(struct net_device *dev)
278
278
{
279
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
279
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
280
280
281
281
while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
282
282
usleep_range(1000, 2000);
···
295
295
296
296
static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
297
297
{
298
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
298
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
299
299
struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
300
300
struct ixgbe_hw *hw = &adapter->hw;
301
301
int ret = DCB_NO_HW_CHG;
···
383
383
384
384
static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
385
385
{
386
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
386
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
387
387
388
388
switch (capid) {
389
389
case DCB_CAP_ATTR_PG:
···
420
420
421
421
static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
422
422
{
423
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
423
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
424
424
425
425
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
426
426
switch (tcid) {
···
447
447
448
448
static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
449
449
{
450
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
450
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
451
451
452
452
return adapter->dcb_cfg.pfc_mode_enable;
453
453
}
454
454
455
455
static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
456
456
{
457
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
457
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
458
458
459
459
adapter->temp_dcb_cfg.pfc_mode_enable = state;
460
460
}
···
471
471
*/
472
472
static int ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
473
473
{
474
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
474
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
475
475
struct dcb_app app = {
476
476
.selector = idtype,
477
477
.protocol = id,
···
486
486
static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
487
487
struct ieee_ets *ets)
488
488
{
489
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
489
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
490
490
struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
491
491
492
492
ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs;
···
506
506
static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
507
507
struct ieee_ets *ets)
508
508
{
509
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
509
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
510
510
int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
511
511
int i, err;
512
512
__u8 max_tc = 0;
···
559
559
static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
560
560
struct ieee_pfc *pfc)
561
561
{
562
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
562
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
563
563
struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
564
564
int i;
565
565
···
584
584
static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
585
585
struct ieee_pfc *pfc)
586
586
{
587
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
587
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
588
588
struct ixgbe_hw *hw = &adapter->hw;
589
589
u8 *prio_tc;
590
590
int err;
···
616
616
static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev,
617
617
struct dcb_app *app)
618
618
{
619
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
619
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
620
620
int err;
621
621
622
622
if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
···
661
661
static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev,
662
662
struct dcb_app *app)
663
663
{
664
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
664
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
665
665
int err;
666
666
667
667
if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
···
705
705
706
706
static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev)
707
707
{
708
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
708
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
709
709
return adapter->dcbx_cap;
710
710
}
711
711
712
712
static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode)
713
713
{
714
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
714
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
715
715
struct ieee_ets ets = {0};
716
716
struct ieee_pfc pfc = {0};
717
717
int err = 0;
+1308
-2
drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
+1308
-2
drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c
···
344
344
}
345
345
346
346
/**
347
+
* ixgbe_aci_get_fw_ver - Get the firmware version
348
+
* @hw: pointer to the HW struct
349
+
*
350
+
* Get the firmware version using ACI command (0x0001).
351
+
*
352
+
* Return: the exit code of the operation.
353
+
*/
354
+
static int ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw)
355
+
{
356
+
struct ixgbe_aci_cmd_get_ver *resp;
357
+
struct ixgbe_aci_desc desc;
358
+
int err;
359
+
360
+
resp = &desc.params.get_ver;
361
+
362
+
ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_get_ver);
363
+
364
+
err = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);
365
+
if (!err) {
366
+
hw->fw_branch = resp->fw_branch;
367
+
hw->fw_maj_ver = resp->fw_major;
368
+
hw->fw_min_ver = resp->fw_minor;
369
+
hw->fw_patch = resp->fw_patch;
370
+
hw->fw_build = le32_to_cpu(resp->fw_build);
371
+
hw->api_branch = resp->api_branch;
372
+
hw->api_maj_ver = resp->api_major;
373
+
hw->api_min_ver = resp->api_minor;
374
+
hw->api_patch = resp->api_patch;
375
+
}
376
+
377
+
return err;
378
+
}
379
+
380
+
/**
347
381
* ixgbe_aci_req_res - request a common resource
348
382
* @hw: pointer to the HW struct
349
383
* @res: resource ID
···
587
553
caps->msix_vector_first_id = phys_id;
588
554
break;
589
555
case IXGBE_ACI_CAPS_NVM_VER:
556
+
break;
557
+
case IXGBE_ACI_CAPS_PENDING_NVM_VER:
558
+
caps->nvm_update_pending_nvm = true;
559
+
break;
560
+
case IXGBE_ACI_CAPS_PENDING_OROM_VER:
561
+
caps->nvm_update_pending_orom = true;
562
+
break;
563
+
case IXGBE_ACI_CAPS_PENDING_NET_VER:
564
+
caps->nvm_update_pending_netlist = true;
565
+
break;
566
+
case IXGBE_ACI_CAPS_NVM_MGMT:
567
+
caps->nvm_unified_update =
568
+
(number & IXGBE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ?
569
+
true : false;
590
570
break;
591
571
case IXGBE_ACI_CAPS_MAX_MTU:
592
572
caps->max_mtu = number;
···
1459
1411
}
1460
1412
1461
1413
/**
1414
+
* ixgbe_start_hw_e610 - Prepare hardware for Tx/Rx
1415
+
* @hw: pointer to hardware structure
1416
+
*
1417
+
* Get firmware version and start the hardware using the generic
1418
+
* start_hw() and ixgbe_start_hw_gen2() functions.
1419
+
*
1420
+
* Return: the exit code of the operation.
1421
+
*/
1422
+
static int ixgbe_start_hw_e610(struct ixgbe_hw *hw)
1423
+
{
1424
+
int err;
1425
+
1426
+
err = ixgbe_aci_get_fw_ver(hw);
1427
+
if (err)
1428
+
return err;
1429
+
1430
+
err = ixgbe_start_hw_generic(hw);
1431
+
if (err)
1432
+
return err;
1433
+
1434
+
ixgbe_start_hw_gen2(hw);
1435
+
1436
+
return 0;
1437
+
}
1438
+
1439
+
/**
1462
1440
* ixgbe_get_media_type_e610 - Gets media type
1463
1441
* @hw: pointer to the HW struct
1464
1442
*
···
1814
1740
IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1815
1741
}
1816
1742
}
1743
+
}
1744
+
1745
+
/**
1746
+
* ixgbe_fw_recovery_mode_e610 - Check FW NVM recovery mode
1747
+
* @hw: pointer to hardware structure
1748
+
*
1749
+
* Check FW NVM recovery mode by reading the value of
1750
+
* the dedicated register.
1751
+
*
1752
+
* Return: true if FW is in recovery mode, otherwise false.
1753
+
*/
1754
+
static bool ixgbe_fw_recovery_mode_e610(struct ixgbe_hw *hw)
1755
+
{
1756
+
u32 fwsm = IXGBE_READ_REG(hw, IXGBE_GL_MNG_FWSM);
1757
+
1758
+
return !!(fwsm & IXGBE_GL_MNG_FWSM_RECOVERY_M);
1759
+
}
1760
+
1761
+
/**
1762
+
* ixgbe_fw_rollback_mode_e610 - Check FW NVM rollback mode
1763
+
* @hw: pointer to hardware structure
1764
+
*
1765
+
* Check FW NVM rollback mode by reading the value of
1766
+
* the dedicated register.
1767
+
*
1768
+
* Return: true if FW is in rollback mode, otherwise false.
1769
+
*/
1770
+
static bool ixgbe_fw_rollback_mode_e610(struct ixgbe_hw *hw)
1771
+
{
1772
+
u32 fwsm = IXGBE_READ_REG(hw, IXGBE_GL_MNG_FWSM);
1773
+
1774
+
return !!(fwsm & IXGBE_GL_MNG_FWSM_ROLLBACK_M);
1817
1775
}
1818
1776
1819
1777
/**
···
2332
2226
}
2333
2227
2334
2228
/**
2229
+
* ixgbe_aci_erase_nvm - erase NVM sector
2230
+
* @hw: pointer to the HW struct
2231
+
* @module_typeid: module pointer location in words from the NVM beginning
2232
+
*
2233
+
* Erase the NVM sector using the ACI command (0x0702).
2234
+
*
2235
+
* Return: the exit code of the operation.
2236
+
*/
2237
+
int ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid)
2238
+
{
2239
+
struct ixgbe_aci_cmd_nvm *cmd;
2240
+
struct ixgbe_aci_desc desc;
2241
+
__le16 len;
2242
+
int err;
2243
+
2244
+
/* Read a length value from SR, so module_typeid is equal to 0,
2245
+
* calculate offset where module size is placed from bytes to words
2246
+
* set last command and read from SR values to true.
2247
+
*/
2248
+
err = ixgbe_aci_read_nvm(hw, 0, 2 * module_typeid + 2, 2, &len, true,
2249
+
true);
2250
+
if (err)
2251
+
return err;
2252
+
2253
+
cmd = &desc.params.nvm;
2254
+
2255
+
ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_erase);
2256
+
2257
+
cmd->module_typeid = cpu_to_le16(module_typeid);
2258
+
cmd->length = len;
2259
+
cmd->offset_low = 0;
2260
+
cmd->offset_high = 0;
2261
+
2262
+
return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);
2263
+
}
2264
+
2265
+
/**
2266
+
* ixgbe_aci_update_nvm - update NVM
2267
+
* @hw: pointer to the HW struct
2268
+
* @module_typeid: module pointer location in words from the NVM beginning
2269
+
* @offset: byte offset from the module beginning
2270
+
* @length: length of the section to be written (in bytes from the offset)
2271
+
* @data: command buffer (size [bytes] = length)
2272
+
* @last_command: tells if this is the last command in a series
2273
+
* @command_flags: command parameters
2274
+
*
2275
+
* Update the NVM using the ACI command (0x0703).
2276
+
*
2277
+
* Return: the exit code of the operation.
2278
+
*/
2279
+
int ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,
2280
+
u32 offset, u16 length, void *data,
2281
+
bool last_command, u8 command_flags)
2282
+
{
2283
+
struct ixgbe_aci_cmd_nvm *cmd;
2284
+
struct ixgbe_aci_desc desc;
2285
+
2286
+
cmd = &desc.params.nvm;
2287
+
2288
+
/* In offset the highest byte must be zeroed. */
2289
+
if (offset & 0xFF000000)
2290
+
return -EINVAL;
2291
+
2292
+
ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_write);
2293
+
2294
+
cmd->cmd_flags |= command_flags;
2295
+
2296
+
/* If this is the last command in a series, set the proper flag. */
2297
+
if (last_command)
2298
+
cmd->cmd_flags |= IXGBE_ACI_NVM_LAST_CMD;
2299
+
cmd->module_typeid = cpu_to_le16(module_typeid);
2300
+
cmd->offset_low = cpu_to_le16(offset & 0xFFFF);
2301
+
cmd->offset_high = FIELD_GET(IXGBE_ACI_NVM_OFFSET_HI_U_MASK, offset);
2302
+
cmd->length = cpu_to_le16(length);
2303
+
2304
+
desc.flags |= cpu_to_le16(IXGBE_ACI_FLAG_RD);
2305
+
2306
+
return ixgbe_aci_send_cmd(hw, &desc, data, length);
2307
+
}
2308
+
2309
+
/**
2310
+
* ixgbe_nvm_write_activate - NVM activate write
2311
+
* @hw: pointer to the HW struct
2312
+
* @cmd_flags: flags for write activate command
2313
+
* @response_flags: response indicators from firmware
2314
+
*
2315
+
* Update the control word with the required banks' validity bits
2316
+
* and dumps the Shadow RAM to flash using ACI command (0x0707).
2317
+
*
2318
+
* cmd_flags controls which banks to activate, the preservation level to use
2319
+
* when activating the NVM bank, and whether an EMP reset is required for
2320
+
* activation.
2321
+
*
2322
+
* Note that the 16bit cmd_flags value is split between two separate 1 byte
2323
+
* flag values in the descriptor.
2324
+
*
2325
+
* On successful return of the firmware command, the response_flags variable
2326
+
* is updated with the flags reported by firmware indicating certain status,
2327
+
* such as whether EMP reset is enabled.
2328
+
*
2329
+
* Return: the exit code of the operation.
2330
+
*/
2331
+
int ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,
2332
+
u8 *response_flags)
2333
+
{
2334
+
struct ixgbe_aci_cmd_nvm *cmd;
2335
+
struct ixgbe_aci_desc desc;
2336
+
s32 err;
2337
+
2338
+
cmd = &desc.params.nvm;
2339
+
ixgbe_fill_dflt_direct_cmd_desc(&desc,
2340
+
ixgbe_aci_opc_nvm_write_activate);
2341
+
2342
+
cmd->cmd_flags = (u8)(cmd_flags & 0xFF);
2343
+
cmd->offset_high = (u8)FIELD_GET(IXGBE_ACI_NVM_OFFSET_HI_A_MASK,
2344
+
cmd_flags);
2345
+
2346
+
err = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);
2347
+
if (!err && response_flags)
2348
+
*response_flags = cmd->cmd_flags;
2349
+
2350
+
return err;
2351
+
}
2352
+
2353
+
/**
2335
2354
* ixgbe_nvm_validate_checksum - validate checksum
2336
2355
* @hw: pointer to the HW struct
2337
2356
*
···
2492
2261
2493
2262
err = -EIO;
2494
2263
netdev_err(adapter->netdev, "Invalid Shadow Ram checksum");
2264
+
}
2265
+
2266
+
return err;
2267
+
}
2268
+
2269
+
/**
2270
+
* ixgbe_discover_flash_size - Discover the available flash size
2271
+
* @hw: pointer to the HW struct
2272
+
*
2273
+
* The device flash could be up to 16MB in size. However, it is possible that
2274
+
* the actual size is smaller. Use bisection to determine the accessible size
2275
+
* of flash memory.
2276
+
*
2277
+
* Return: the exit code of the operation.
2278
+
*/
2279
+
static int ixgbe_discover_flash_size(struct ixgbe_hw *hw)
2280
+
{
2281
+
u32 min_size = 0, max_size = IXGBE_ACI_NVM_MAX_OFFSET + 1;
2282
+
int err;
2283
+
2284
+
err = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);
2285
+
if (err)
2286
+
return err;
2287
+
2288
+
while ((max_size - min_size) > 1) {
2289
+
u32 offset = (max_size + min_size) / 2;
2290
+
u32 len = 1;
2291
+
u8 data;
2292
+
2293
+
err = ixgbe_read_flat_nvm(hw, offset, &len, &data, false);
2294
+
if (err == -EIO &&
2295
+
hw->aci.last_status == IXGBE_ACI_RC_EINVAL) {
2296
+
err = 0;
2297
+
max_size = offset;
2298
+
} else if (!err) {
2299
+
min_size = offset;
2300
+
} else {
2301
+
/* an unexpected error occurred */
2302
+
goto err_read_flat_nvm;
2303
+
}
2304
+
}
2305
+
2306
+
hw->flash.flash_size = max_size;
2307
+
2308
+
err_read_flat_nvm:
2309
+
ixgbe_release_nvm(hw);
2310
+
2311
+
return err;
2312
+
}
2313
+
2314
+
/**
2315
+
* ixgbe_read_sr_base_address - Read the value of a Shadow RAM pointer word
2316
+
* @hw: pointer to the HW structure
2317
+
* @offset: the word offset of the Shadow RAM word to read
2318
+
* @pointer: pointer value read from Shadow RAM
2319
+
*
2320
+
* Read the given Shadow RAM word, and convert it to a pointer value specified
2321
+
* in bytes. This function assumes the specified offset is a valid pointer
2322
+
* word.
2323
+
*
2324
+
* Each pointer word specifies whether it is stored in word size or 4KB
2325
+
* sector size by using the highest bit. The reported pointer value will be in
2326
+
* bytes, intended for flat NVM reads.
2327
+
*
2328
+
* Return: the exit code of the operation.
2329
+
*/
2330
+
static int ixgbe_read_sr_base_address(struct ixgbe_hw *hw, u16 offset,
2331
+
u32 *pointer)
2332
+
{
2333
+
u16 value;
2334
+
int err;
2335
+
2336
+
err = ixgbe_read_ee_aci_e610(hw, offset, &value);
2337
+
if (err)
2338
+
return err;
2339
+
2340
+
/* Determine if the pointer is in 4KB or word units */
2341
+
if (value & IXGBE_SR_NVM_PTR_4KB_UNITS)
2342
+
*pointer = (value & ~IXGBE_SR_NVM_PTR_4KB_UNITS) * SZ_4K;
2343
+
else
2344
+
*pointer = value * sizeof(u16);
2345
+
2346
+
return 0;
2347
+
}
2348
+
2349
+
/**
2350
+
* ixgbe_read_sr_area_size - Read an area size from a Shadow RAM word
2351
+
* @hw: pointer to the HW structure
2352
+
* @offset: the word offset of the Shadow RAM to read
2353
+
* @size: size value read from the Shadow RAM
2354
+
*
2355
+
* Read the given Shadow RAM word, and convert it to an area size value
2356
+
* specified in bytes. This function assumes the specified offset is a valid
2357
+
* area size word.
2358
+
*
2359
+
* Each area size word is specified in 4KB sector units. This function reports
2360
+
* the size in bytes, intended for flat NVM reads.
2361
+
*
2362
+
* Return: the exit code of the operation.
2363
+
*/
2364
+
static int ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size)
2365
+
{
2366
+
u16 value;
2367
+
int err;
2368
+
2369
+
err = ixgbe_read_ee_aci_e610(hw, offset, &value);
2370
+
if (err)
2371
+
return err;
2372
+
2373
+
/* Area sizes are always specified in 4KB units */
2374
+
*size = value * SZ_4K;
2375
+
2376
+
return 0;
2377
+
}
2378
+
2379
+
/**
2380
+
* ixgbe_determine_active_flash_banks - Discover active bank for each module
2381
+
* @hw: pointer to the HW struct
2382
+
*
2383
+
* Read the Shadow RAM control word and determine which banks are active for
2384
+
* the NVM, OROM, and Netlist modules. Also read and calculate the associated
2385
+
* pointer and size. These values are then cached into the ixgbe_flash_info
2386
+
* structure for later use in order to calculate the correct offset to read
2387
+
* from the active module.
2388
+
*
2389
+
* Return: the exit code of the operation.
2390
+
*/
2391
+
static int ixgbe_determine_active_flash_banks(struct ixgbe_hw *hw)
2392
+
{
2393
+
struct ixgbe_bank_info *banks = &hw->flash.banks;
2394
+
u16 ctrl_word;
2395
+
int err;
2396
+
2397
+
err = ixgbe_read_ee_aci_e610(hw, IXGBE_E610_SR_NVM_CTRL_WORD,
2398
+
&ctrl_word);
2399
+
if (err)
2400
+
return err;
2401
+
2402
+
if (FIELD_GET(IXGBE_SR_CTRL_WORD_1_M, ctrl_word) !=
2403
+
IXGBE_SR_CTRL_WORD_VALID)
2404
+
return -ENODATA;
2405
+
2406
+
if (!(ctrl_word & IXGBE_SR_CTRL_WORD_NVM_BANK))
2407
+
banks->nvm_bank = IXGBE_1ST_FLASH_BANK;
2408
+
else
2409
+
banks->nvm_bank = IXGBE_2ND_FLASH_BANK;
2410
+
2411
+
if (!(ctrl_word & IXGBE_SR_CTRL_WORD_OROM_BANK))
2412
+
banks->orom_bank = IXGBE_1ST_FLASH_BANK;
2413
+
else
2414
+
banks->orom_bank = IXGBE_2ND_FLASH_BANK;
2415
+
2416
+
if (!(ctrl_word & IXGBE_SR_CTRL_WORD_NETLIST_BANK))
2417
+
banks->netlist_bank = IXGBE_1ST_FLASH_BANK;
2418
+
else
2419
+
banks->netlist_bank = IXGBE_2ND_FLASH_BANK;
2420
+
2421
+
err = ixgbe_read_sr_base_address(hw, IXGBE_E610_SR_1ST_NVM_BANK_PTR,
2422
+
&banks->nvm_ptr);
2423
+
if (err)
2424
+
return err;
2425
+
2426
+
err = ixgbe_read_sr_area_size(hw, IXGBE_E610_SR_NVM_BANK_SIZE,
2427
+
&banks->nvm_size);
2428
+
if (err)
2429
+
return err;
2430
+
2431
+
err = ixgbe_read_sr_base_address(hw, IXGBE_E610_SR_1ST_OROM_BANK_PTR,
2432
+
&banks->orom_ptr);
2433
+
if (err)
2434
+
return err;
2435
+
2436
+
err = ixgbe_read_sr_area_size(hw, IXGBE_E610_SR_OROM_BANK_SIZE,
2437
+
&banks->orom_size);
2438
+
if (err)
2439
+
return err;
2440
+
2441
+
err = ixgbe_read_sr_base_address(hw, IXGBE_E610_SR_NETLIST_BANK_PTR,
2442
+
&banks->netlist_ptr);
2443
+
if (err)
2444
+
return err;
2445
+
2446
+
err = ixgbe_read_sr_area_size(hw, IXGBE_E610_SR_NETLIST_BANK_SIZE,
2447
+
&banks->netlist_size);
2448
+
2449
+
return err;
2450
+
}
2451
+
2452
+
/**
2453
+
* ixgbe_get_flash_bank_offset - Get offset into requested flash bank
2454
+
* @hw: pointer to the HW structure
2455
+
* @bank: whether to read from the active or inactive flash bank
2456
+
* @module: the module to read from
2457
+
*
2458
+
* Based on the module, lookup the module offset from the beginning of the
2459
+
* flash.
2460
+
*
2461
+
* Return: the flash offset. Note that a value of zero is invalid and must be
2462
+
* treated as an error.
2463
+
*/
2464
+
static int ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw,
2465
+
enum ixgbe_bank_select bank,
2466
+
u16 module)
2467
+
{
2468
+
struct ixgbe_bank_info *banks = &hw->flash.banks;
2469
+
enum ixgbe_flash_bank active_bank;
2470
+
bool second_bank_active;
2471
+
u32 offset, size;
2472
+
2473
+
switch (module) {
2474
+
case IXGBE_E610_SR_1ST_NVM_BANK_PTR:
2475
+
offset = banks->nvm_ptr;
2476
+
size = banks->nvm_size;
2477
+
active_bank = banks->nvm_bank;
2478
+
break;
2479
+
case IXGBE_E610_SR_1ST_OROM_BANK_PTR:
2480
+
offset = banks->orom_ptr;
2481
+
size = banks->orom_size;
2482
+
active_bank = banks->orom_bank;
2483
+
break;
2484
+
case IXGBE_E610_SR_NETLIST_BANK_PTR:
2485
+
offset = banks->netlist_ptr;
2486
+
size = banks->netlist_size;
2487
+
active_bank = banks->netlist_bank;
2488
+
break;
2489
+
default:
2490
+
return 0;
2491
+
}
2492
+
2493
+
switch (active_bank) {
2494
+
case IXGBE_1ST_FLASH_BANK:
2495
+
second_bank_active = false;
2496
+
break;
2497
+
case IXGBE_2ND_FLASH_BANK:
2498
+
second_bank_active = true;
2499
+
break;
2500
+
default:
2501
+
return 0;
2502
+
}
2503
+
2504
+
/* The second flash bank is stored immediately following the first
2505
+
* bank. Based on whether the 1st or 2nd bank is active, and whether
2506
+
* we want the active or inactive bank, calculate the desired offset.
2507
+
*/
2508
+
switch (bank) {
2509
+
case IXGBE_ACTIVE_FLASH_BANK:
2510
+
return offset + (second_bank_active ? size : 0);
2511
+
case IXGBE_INACTIVE_FLASH_BANK:
2512
+
return offset + (second_bank_active ? 0 : size);
2513
+
}
2514
+
2515
+
return 0;
2516
+
}
2517
+
2518
+
/**
2519
+
* ixgbe_read_flash_module - Read a word from one of the main NVM modules
2520
+
* @hw: pointer to the HW structure
2521
+
* @bank: which bank of the module to read
2522
+
* @module: the module to read
2523
+
* @offset: the offset into the module in bytes
2524
+
* @data: storage for the word read from the flash
2525
+
* @length: bytes of data to read
2526
+
*
2527
+
* Read data from the specified flash module. The bank parameter indicates
2528
+
* whether or not to read from the active bank or the inactive bank of that
2529
+
* module.
2530
+
*
2531
+
* The word will be read using flat NVM access, and relies on the
2532
+
* hw->flash.banks data being setup by ixgbe_determine_active_flash_banks()
2533
+
* during initialization.
2534
+
*
2535
+
* Return: the exit code of the operation.
2536
+
*/
2537
+
static int ixgbe_read_flash_module(struct ixgbe_hw *hw,
2538
+
enum ixgbe_bank_select bank,
2539
+
u16 module, u32 offset, u8 *data, u32 length)
2540
+
{
2541
+
u32 start;
2542
+
int err;
2543
+
2544
+
start = ixgbe_get_flash_bank_offset(hw, bank, module);
2545
+
if (!start)
2546
+
return -EINVAL;
2547
+
2548
+
err = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);
2549
+
if (err)
2550
+
return err;
2551
+
2552
+
err = ixgbe_read_flat_nvm(hw, start + offset, &length, data, false);
2553
+
2554
+
ixgbe_release_nvm(hw);
2555
+
2556
+
return err;
2557
+
}
2558
+
2559
+
/**
2560
+
* ixgbe_read_nvm_module - Read from the active main NVM module
2561
+
* @hw: pointer to the HW structure
2562
+
* @bank: whether to read from active or inactive NVM module
2563
+
* @offset: offset into the NVM module to read, in words
2564
+
* @data: storage for returned word value
2565
+
*
2566
+
* Read the specified word from the active NVM module. This includes the CSS
2567
+
* header at the start of the NVM module.
2568
+
*
2569
+
* Return: the exit code of the operation.
2570
+
*/
2571
+
static int ixgbe_read_nvm_module(struct ixgbe_hw *hw,
2572
+
enum ixgbe_bank_select bank,
2573
+
u32 offset, u16 *data)
2574
+
{
2575
+
__le16 data_local;
2576
+
int err;
2577
+
2578
+
err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_1ST_NVM_BANK_PTR,
2579
+
offset * sizeof(data_local),
2580
+
(u8 *)&data_local,
2581
+
sizeof(data_local));
2582
+
if (!err)
2583
+
*data = le16_to_cpu(data_local);
2584
+
2585
+
return err;
2586
+
}
2587
+
2588
+
/**
2589
+
* ixgbe_read_netlist_module - Read data from the netlist module area
2590
+
* @hw: pointer to the HW structure
2591
+
* @bank: whether to read from the active or inactive module
2592
+
* @offset: offset into the netlist to read from
2593
+
* @data: storage for returned word value
2594
+
*
2595
+
* Read a word from the specified netlist bank.
2596
+
*
2597
+
* Return: the exit code of the operation.
2598
+
*/
2599
+
static int ixgbe_read_netlist_module(struct ixgbe_hw *hw,
2600
+
enum ixgbe_bank_select bank,
2601
+
u32 offset, u16 *data)
2602
+
{
2603
+
__le16 data_local;
2604
+
int err;
2605
+
2606
+
err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_NETLIST_BANK_PTR,
2607
+
offset * sizeof(data_local),
2608
+
(u8 *)&data_local, sizeof(data_local));
2609
+
if (!err)
2610
+
*data = le16_to_cpu(data_local);
2611
+
2612
+
return err;
2613
+
}
2614
+
2615
+
/**
2616
+
* ixgbe_read_orom_module - Read from the active Option ROM module
2617
+
* @hw: pointer to the HW structure
2618
+
* @bank: whether to read from active or inactive OROM module
2619
+
* @offset: offset into the OROM module to read, in words
2620
+
* @data: storage for returned word value
2621
+
*
2622
+
* Read the specified word from the active Option ROM module of the flash.
2623
+
* Note that unlike the NVM module, the CSS data is stored at the end of the
2624
+
* module instead of at the beginning.
2625
+
*
2626
+
* Return: the exit code of the operation.
2627
+
*/
2628
+
static int ixgbe_read_orom_module(struct ixgbe_hw *hw,
2629
+
enum ixgbe_bank_select bank,
2630
+
u32 offset, u16 *data)
2631
+
{
2632
+
__le16 data_local;
2633
+
int err;
2634
+
2635
+
err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_1ST_OROM_BANK_PTR,
2636
+
offset * sizeof(data_local),
2637
+
(u8 *)&data_local, sizeof(data_local));
2638
+
if (!err)
2639
+
*data = le16_to_cpu(data_local);
2640
+
2641
+
return err;
2642
+
}
2643
+
2644
+
/**
2645
+
* ixgbe_get_nvm_css_hdr_len - Read the CSS header length
2646
+
* @hw: pointer to the HW struct
2647
+
* @bank: whether to read from the active or inactive flash bank
2648
+
* @hdr_len: storage for header length in words
2649
+
*
2650
+
* Read the CSS header length from the NVM CSS header and add the
2651
+
* Authentication header size, and then convert to words.
2652
+
*
2653
+
* Return: the exit code of the operation.
2654
+
*/
2655
+
static int ixgbe_get_nvm_css_hdr_len(struct ixgbe_hw *hw,
2656
+
enum ixgbe_bank_select bank,
2657
+
u32 *hdr_len)
2658
+
{
2659
+
u16 hdr_len_l, hdr_len_h;
2660
+
u32 hdr_len_dword;
2661
+
int err;
2662
+
2663
+
err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_L,
2664
+
&hdr_len_l);
2665
+
if (err)
2666
+
return err;
2667
+
2668
+
err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_H,
2669
+
&hdr_len_h);
2670
+
if (err)
2671
+
return err;
2672
+
2673
+
/* CSS header length is in DWORD, so convert to words and add
2674
+
* authentication header size.
2675
+
*/
2676
+
hdr_len_dword = (hdr_len_h << 16) | hdr_len_l;
2677
+
*hdr_len = hdr_len_dword * 2 + IXGBE_NVM_AUTH_HEADER_LEN;
2678
+
2679
+
return 0;
2680
+
}
2681
+
2682
+
/**
2683
+
* ixgbe_read_nvm_sr_copy - Read a word from the Shadow RAM copy
2684
+
* @hw: pointer to the HW structure
2685
+
* @bank: whether to read from the active or inactive NVM module
2686
+
* @offset: offset into the Shadow RAM copy to read, in words
2687
+
* @data: storage for returned word value
2688
+
*
2689
+
* Read the specified word from the copy of the Shadow RAM found in the
2690
+
* specified NVM module.
2691
+
*
2692
+
* Return: the exit code of the operation.
2693
+
*/
2694
+
static int ixgbe_read_nvm_sr_copy(struct ixgbe_hw *hw,
2695
+
enum ixgbe_bank_select bank,
2696
+
u32 offset, u16 *data)
2697
+
{
2698
+
u32 hdr_len;
2699
+
int err;
2700
+
2701
+
err = ixgbe_get_nvm_css_hdr_len(hw, bank, &hdr_len);
2702
+
if (err)
2703
+
return err;
2704
+
2705
+
hdr_len = round_up(hdr_len, IXGBE_HDR_LEN_ROUNDUP);
2706
+
2707
+
return ixgbe_read_nvm_module(hw, bank, hdr_len + offset, data);
2708
+
}
2709
+
2710
+
/**
2711
+
* ixgbe_get_nvm_srev - Read the security revision from the NVM CSS header
2712
+
* @hw: pointer to the HW struct
2713
+
* @bank: whether to read from the active or inactive flash bank
2714
+
* @srev: storage for security revision
2715
+
*
2716
+
* Read the security revision out of the CSS header of the active NVM module
2717
+
* bank.
2718
+
*
2719
+
* Return: the exit code of the operation.
2720
+
*/
2721
+
static int ixgbe_get_nvm_srev(struct ixgbe_hw *hw,
2722
+
enum ixgbe_bank_select bank, u32 *srev)
2723
+
{
2724
+
u16 srev_l, srev_h;
2725
+
int err;
2726
+
2727
+
err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_L, &srev_l);
2728
+
if (err)
2729
+
return err;
2730
+
2731
+
err = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_H, &srev_h);
2732
+
if (err)
2733
+
return err;
2734
+
2735
+
*srev = (srev_h << 16) | srev_l;
2736
+
2737
+
return 0;
2738
+
}
2739
+
2740
+
/**
2741
+
* ixgbe_get_orom_civd_data - Get the combo version information from Option ROM
2742
+
* @hw: pointer to the HW struct
2743
+
* @bank: whether to read from the active or inactive flash module
2744
+
* @civd: storage for the Option ROM CIVD data.
2745
+
*
2746
+
* Searches through the Option ROM flash contents to locate the CIVD data for
2747
+
* the image.
2748
+
*
2749
+
* Return: the exit code of the operation.
2750
+
*/
2751
+
static int
2752
+
ixgbe_get_orom_civd_data(struct ixgbe_hw *hw, enum ixgbe_bank_select bank,
2753
+
struct ixgbe_orom_civd_info *civd)
2754
+
{
2755
+
struct ixgbe_orom_civd_info tmp;
2756
+
u32 offset;
2757
+
int err;
2758
+
2759
+
/* The CIVD section is located in the Option ROM aligned to 512 bytes.
2760
+
* The first 4 bytes must contain the ASCII characters "$CIV".
2761
+
* A simple modulo 256 sum of all of the bytes of the structure must
2762
+
* equal 0.
2763
+
*/
2764
+
for (offset = 0; (offset + SZ_512) <= hw->flash.banks.orom_size;
2765
+
offset += SZ_512) {
2766
+
u8 sum = 0;
2767
+
u32 i;
2768
+
2769
+
err = ixgbe_read_flash_module(hw, bank,
2770
+
IXGBE_E610_SR_1ST_OROM_BANK_PTR,
2771
+
offset,
2772
+
(u8 *)&tmp, sizeof(tmp));
2773
+
if (err)
2774
+
return err;
2775
+
2776
+
/* Skip forward until we find a matching signature */
2777
+
if (memcmp(IXGBE_OROM_CIV_SIGNATURE, tmp.signature,
2778
+
sizeof(tmp.signature)))
2779
+
continue;
2780
+
2781
+
/* Verify that the simple checksum is zero */
2782
+
for (i = 0; i < sizeof(tmp); i++)
2783
+
sum += ((u8 *)&tmp)[i];
2784
+
2785
+
if (sum)
2786
+
return -EDOM;
2787
+
2788
+
*civd = tmp;
2789
+
return 0;
2790
+
}
2791
+
2792
+
return -ENODATA;
2793
+
}
2794
+
2795
+
/**
2796
+
* ixgbe_get_orom_srev - Read the security revision from the OROM CSS header
2797
+
* @hw: pointer to the HW struct
2798
+
* @bank: whether to read from active or inactive flash module
2799
+
* @srev: storage for security revision
2800
+
*
2801
+
* Read the security revision out of the CSS header of the active OROM module
2802
+
* bank.
2803
+
*
2804
+
* Return: the exit code of the operation.
2805
+
*/
2806
+
static int ixgbe_get_orom_srev(struct ixgbe_hw *hw,
2807
+
enum ixgbe_bank_select bank,
2808
+
u32 *srev)
2809
+
{
2810
+
u32 orom_size_word = hw->flash.banks.orom_size / 2;
2811
+
u32 css_start, hdr_len;
2812
+
u16 srev_l, srev_h;
2813
+
int err;
2814
+
2815
+
err = ixgbe_get_nvm_css_hdr_len(hw, bank, &hdr_len);
2816
+
if (err)
2817
+
return err;
2818
+
2819
+
if (orom_size_word < hdr_len)
2820
+
return -EINVAL;
2821
+
2822
+
/* Calculate how far into the Option ROM the CSS header starts. Note
2823
+
* that ixgbe_read_orom_module takes a word offset.
2824
+
*/
2825
+
css_start = orom_size_word - hdr_len;
2826
+
err = ixgbe_read_orom_module(hw, bank,
2827
+
css_start + IXGBE_NVM_CSS_SREV_L,
2828
+
&srev_l);
2829
+
if (err)
2830
+
return err;
2831
+
2832
+
err = ixgbe_read_orom_module(hw, bank,
2833
+
css_start + IXGBE_NVM_CSS_SREV_H,
2834
+
&srev_h);
2835
+
if (err)
2836
+
return err;
2837
+
2838
+
*srev = srev_h << 16 | srev_l;
2839
+
2840
+
return 0;
2841
+
}
2842
+
2843
+
/**
2844
+
* ixgbe_get_orom_ver_info - Read Option ROM version information
2845
+
* @hw: pointer to the HW struct
2846
+
* @bank: whether to read from the active or inactive flash module
2847
+
* @orom: pointer to Option ROM info structure
2848
+
*
2849
+
* Read Option ROM version and security revision from the Option ROM flash
2850
+
* section.
2851
+
*
2852
+
* Return: the exit code of the operation.
2853
+
*/
2854
+
static int ixgbe_get_orom_ver_info(struct ixgbe_hw *hw,
2855
+
enum ixgbe_bank_select bank,
2856
+
struct ixgbe_orom_info *orom)
2857
+
{
2858
+
struct ixgbe_orom_civd_info civd;
2859
+
u32 combo_ver;
2860
+
int err;
2861
+
2862
+
err = ixgbe_get_orom_civd_data(hw, bank, &civd);
2863
+
if (err)
2864
+
return err;
2865
+
2866
+
combo_ver = le32_to_cpu(civd.combo_ver);
2867
+
2868
+
orom->major = (u8)FIELD_GET(IXGBE_OROM_VER_MASK, combo_ver);
2869
+
orom->patch = (u8)FIELD_GET(IXGBE_OROM_VER_PATCH_MASK, combo_ver);
2870
+
orom->build = (u16)FIELD_GET(IXGBE_OROM_VER_BUILD_MASK, combo_ver);
2871
+
2872
+
return ixgbe_get_orom_srev(hw, bank, &orom->srev);
2873
+
}
2874
+
2875
+
/**
2876
+
* ixgbe_get_inactive_orom_ver - Read Option ROM version from the inactive bank
2877
+
* @hw: pointer to the HW structure
2878
+
* @orom: storage for Option ROM version information
2879
+
*
2880
+
* Read the Option ROM version and security revision data for the inactive
2881
+
* section of flash. Used to access version data for a pending update that has
2882
+
* not yet been activated.
2883
+
*
2884
+
* Return: the exit code of the operation.
2885
+
*/
2886
+
int ixgbe_get_inactive_orom_ver(struct ixgbe_hw *hw,
2887
+
struct ixgbe_orom_info *orom)
2888
+
{
2889
+
return ixgbe_get_orom_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, orom);
2890
+
}
2891
+
2892
+
/**
2893
+
* ixgbe_get_nvm_ver_info - Read NVM version information
2894
+
* @hw: pointer to the HW struct
2895
+
* @bank: whether to read from the active or inactive flash bank
2896
+
* @nvm: pointer to NVM info structure
2897
+
*
2898
+
* Read the NVM EETRACK ID and map version of the main NVM image bank, filling
2899
+
* in the nvm info structure.
2900
+
*
2901
+
* Return: the exit code of the operation.
2902
+
*/
2903
+
static int ixgbe_get_nvm_ver_info(struct ixgbe_hw *hw,
2904
+
enum ixgbe_bank_select bank,
2905
+
struct ixgbe_nvm_info *nvm)
2906
+
{
2907
+
u16 eetrack_lo, eetrack_hi, ver;
2908
+
int err;
2909
+
2910
+
err = ixgbe_read_nvm_sr_copy(hw, bank,
2911
+
IXGBE_E610_SR_NVM_DEV_STARTER_VER, &ver);
2912
+
if (err)
2913
+
return err;
2914
+
2915
+
nvm->major = FIELD_GET(IXGBE_E610_NVM_VER_HI_MASK, ver);
2916
+
nvm->minor = FIELD_GET(IXGBE_E610_NVM_VER_LO_MASK, ver);
2917
+
2918
+
err = ixgbe_read_nvm_sr_copy(hw, bank, IXGBE_E610_SR_NVM_EETRACK_LO,
2919
+
&eetrack_lo);
2920
+
if (err)
2921
+
return err;
2922
+
2923
+
err = ixgbe_read_nvm_sr_copy(hw, bank, IXGBE_E610_SR_NVM_EETRACK_HI,
2924
+
&eetrack_hi);
2925
+
if (err)
2926
+
return err;
2927
+
2928
+
nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
2929
+
2930
+
ixgbe_get_nvm_srev(hw, bank, &nvm->srev);
2931
+
2932
+
return 0;
2933
+
}
2934
+
2935
+
/**
2936
+
* ixgbe_get_inactive_nvm_ver - Read Option ROM version from the inactive bank
2937
+
* @hw: pointer to the HW structure
2938
+
* @nvm: storage for Option ROM version information
2939
+
*
2940
+
* Read the NVM EETRACK ID, Map version, and security revision of the
2941
+
* inactive NVM bank. Used to access version data for a pending update that
2942
+
* has not yet been activated.
2943
+
*
2944
+
* Return: the exit code of the operation.
2945
+
*/
2946
+
int ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm)
2947
+
{
2948
+
return ixgbe_get_nvm_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, nvm);
2949
+
}
2950
+
2951
+
/**
2952
+
* ixgbe_get_active_nvm_ver - Read Option ROM version from the active bank
2953
+
* @hw: pointer to the HW structure
2954
+
* @nvm: storage for Option ROM version information
2955
+
*
2956
+
* Reads the NVM EETRACK ID, Map version, and security revision of the
2957
+
* active NVM bank.
2958
+
*
2959
+
* Return: the exit code of the operation.
2960
+
*/
2961
+
static int ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw,
2962
+
struct ixgbe_nvm_info *nvm)
2963
+
{
2964
+
return ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, nvm);
2965
+
}
2966
+
2967
+
/**
2968
+
* ixgbe_get_netlist_info - Read the netlist version information
2969
+
* @hw: pointer to the HW struct
2970
+
* @bank: whether to read from the active or inactive flash bank
2971
+
* @netlist: pointer to netlist version info structure
2972
+
*
2973
+
* Get the netlist version information from the requested bank. Reads the Link
2974
+
* Topology section to find the Netlist ID block and extract the relevant
2975
+
* information into the netlist version structure.
2976
+
*
2977
+
* Return: the exit code of the operation.
2978
+
*/
2979
+
static int ixgbe_get_netlist_info(struct ixgbe_hw *hw,
2980
+
enum ixgbe_bank_select bank,
2981
+
struct ixgbe_netlist_info *netlist)
2982
+
{
2983
+
u16 module_id, length, node_count, i;
2984
+
u16 *id_blk;
2985
+
int err;
2986
+
2987
+
err = ixgbe_read_netlist_module(hw, bank, IXGBE_NETLIST_TYPE_OFFSET,
2988
+
&module_id);
2989
+
if (err)
2990
+
return err;
2991
+
2992
+
if (module_id != IXGBE_NETLIST_LINK_TOPO_MOD_ID)
2993
+
return -EIO;
2994
+
2995
+
err = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_MODULE_LEN,
2996
+
&length);
2997
+
if (err)
2998
+
return err;
2999
+
3000
+
/* Sanity check that we have at least enough words to store the
3001
+
* netlist ID block.
3002
+
*/
3003
+
if (length < IXGBE_NETLIST_ID_BLK_SIZE)
3004
+
return -EIO;
3005
+
3006
+
err = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_NODE_COUNT,
3007
+
&node_count);
3008
+
if (err)
3009
+
return err;
3010
+
3011
+
node_count &= IXGBE_LINK_TOPO_NODE_COUNT_M;
3012
+
3013
+
id_blk = kcalloc(IXGBE_NETLIST_ID_BLK_SIZE, sizeof(*id_blk), GFP_KERNEL);
3014
+
if (!id_blk)
3015
+
return -ENOMEM;
3016
+
3017
+
/* Read out the entire Netlist ID Block at once. */
3018
+
err = ixgbe_read_flash_module(hw, bank, IXGBE_E610_SR_NETLIST_BANK_PTR,
3019
+
IXGBE_NETLIST_ID_BLK_OFFSET(node_count) *
3020
+
sizeof(*id_blk), (u8 *)id_blk,
3021
+
IXGBE_NETLIST_ID_BLK_SIZE *
3022
+
sizeof(*id_blk));
3023
+
if (err)
3024
+
goto free_id_blk;
3025
+
3026
+
for (i = 0; i < IXGBE_NETLIST_ID_BLK_SIZE; i++)
3027
+
id_blk[i] = le16_to_cpu(((__le16 *)id_blk)[i]);
3028
+
3029
+
netlist->major = id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH] << 16 |
3030
+
id_blk[IXGBE_NETLIST_ID_BLK_MAJOR_VER_LOW];
3031
+
netlist->minor = id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH] << 16 |
3032
+
id_blk[IXGBE_NETLIST_ID_BLK_MINOR_VER_LOW];
3033
+
netlist->type = id_blk[IXGBE_NETLIST_ID_BLK_TYPE_HIGH] << 16 |
3034
+
id_blk[IXGBE_NETLIST_ID_BLK_TYPE_LOW];
3035
+
netlist->rev = id_blk[IXGBE_NETLIST_ID_BLK_REV_HIGH] << 16 |
3036
+
id_blk[IXGBE_NETLIST_ID_BLK_REV_LOW];
3037
+
netlist->cust_ver = id_blk[IXGBE_NETLIST_ID_BLK_CUST_VER];
3038
+
/* Read the left most 4 bytes of SHA */
3039
+
netlist->hash = id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(15)] << 16 |
3040
+
id_blk[IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(14)];
3041
+
3042
+
free_id_blk:
3043
+
kfree(id_blk);
3044
+
return err;
3045
+
}
3046
+
3047
+
/**
3048
+
* ixgbe_get_inactive_netlist_ver - Read netlist version from the inactive bank
3049
+
* @hw: pointer to the HW struct
3050
+
* @netlist: pointer to netlist version info structure
3051
+
*
3052
+
* Read the netlist version data from the inactive netlist bank. Used to
3053
+
* extract version data of a pending flash update in order to display the
3054
+
* version data.
3055
+
*
3056
+
* Return: the exit code of the operation.
3057
+
*/
3058
+
int ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw,
3059
+
struct ixgbe_netlist_info *netlist)
3060
+
{
3061
+
return ixgbe_get_netlist_info(hw, IXGBE_INACTIVE_FLASH_BANK, netlist);
3062
+
}
3063
+
3064
+
/**
3065
+
* ixgbe_get_flash_data - get flash data
3066
+
* @hw: pointer to the HW struct
3067
+
*
3068
+
* Read and populate flash data such as Shadow RAM size,
3069
+
* max_timeout and blank_nvm_mode
3070
+
*
3071
+
* Return: the exit code of the operation.
3072
+
*/
3073
+
int ixgbe_get_flash_data(struct ixgbe_hw *hw)
3074
+
{
3075
+
struct ixgbe_flash_info *flash = &hw->flash;
3076
+
u32 fla, gens_stat;
3077
+
u8 sr_size;
3078
+
int err;
3079
+
3080
+
/* The SR size is stored regardless of the NVM programming mode
3081
+
* as the blank mode may be used in the factory line.
3082
+
*/
3083
+
gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS);
3084
+
sr_size = FIELD_GET(GLNVM_GENS_SR_SIZE_M, gens_stat);
3085
+
3086
+
/* Switching to words (sr_size contains power of 2) */
3087
+
flash->sr_words = BIT(sr_size) * (SZ_1K / sizeof(u16));
3088
+
3089
+
/* Check if we are in the normal or blank NVM programming mode */
3090
+
fla = IXGBE_READ_REG(hw, IXGBE_GLNVM_FLA);
3091
+
if (fla & IXGBE_GLNVM_FLA_LOCKED_M) {
3092
+
flash->blank_nvm_mode = false;
3093
+
} else {
3094
+
flash->blank_nvm_mode = true;
3095
+
return -EIO;
3096
+
}
3097
+
3098
+
err = ixgbe_discover_flash_size(hw);
3099
+
if (err)
3100
+
return err;
3101
+
3102
+
err = ixgbe_determine_active_flash_banks(hw);
3103
+
if (err)
3104
+
return err;
3105
+
3106
+
err = ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK,
3107
+
&flash->nvm);
3108
+
if (err)
3109
+
return err;
3110
+
3111
+
err = ixgbe_get_orom_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK,
3112
+
&flash->orom);
3113
+
if (err)
3114
+
return err;
3115
+
3116
+
err = ixgbe_get_netlist_info(hw, IXGBE_ACTIVE_FLASH_BANK,
3117
+
&flash->netlist);
3118
+
return err;
3119
+
}
3120
+
3121
+
/**
3122
+
* ixgbe_aci_nvm_update_empr - update NVM using EMPR
3123
+
* @hw: pointer to the HW struct
3124
+
*
3125
+
* Force EMP reset using ACI command (0x0709). This command allows SW to
3126
+
* request an EMPR to activate new FW.
3127
+
*
3128
+
* Return: the exit code of the operation.
3129
+
*/
3130
+
int ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw)
3131
+
{
3132
+
struct ixgbe_aci_desc desc;
3133
+
3134
+
ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_update_empr);
3135
+
3136
+
return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);
3137
+
}
3138
+
3139
+
/* ixgbe_nvm_set_pkg_data - NVM set package data
3140
+
* @hw: pointer to the HW struct
3141
+
* @del_pkg_data_flag: If is set then the current pkg_data store by FW
3142
+
* is deleted.
3143
+
* If bit is set to 1, then buffer should be size 0.
3144
+
* @data: pointer to buffer
3145
+
* @length: length of the buffer
3146
+
*
3147
+
* Set package data using ACI command (0x070A).
3148
+
* This command is equivalent to the reception of
3149
+
* a PLDM FW Update GetPackageData cmd. This command should be sent
3150
+
* as part of the NVM update as the first cmd in the flow.
3151
+
*
3152
+
* Return: the exit code of the operation.
3153
+
*/
3154
+
int ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag,
3155
+
u8 *data, u16 length)
3156
+
{
3157
+
struct ixgbe_aci_cmd_nvm_pkg_data *cmd;
3158
+
struct ixgbe_aci_desc desc;
3159
+
3160
+
if (length != 0 && !data)
3161
+
return -EINVAL;
3162
+
3163
+
cmd = &desc.params.pkg_data;
3164
+
3165
+
ixgbe_fill_dflt_direct_cmd_desc(&desc, ixgbe_aci_opc_nvm_pkg_data);
3166
+
desc.flags |= cpu_to_le16(IXGBE_ACI_FLAG_RD);
3167
+
3168
+
if (del_pkg_data_flag)
3169
+
cmd->cmd_flags |= IXGBE_ACI_NVM_PKG_DELETE;
3170
+
3171
+
return ixgbe_aci_send_cmd(hw, &desc, data, length);
3172
+
}
3173
+
3174
+
/* ixgbe_nvm_pass_component_tbl - NVM pass component table
3175
+
* @hw: pointer to the HW struct
3176
+
* @data: pointer to buffer
3177
+
* @length: length of the buffer
3178
+
* @transfer_flag: parameter for determining stage of the update
3179
+
* @comp_response: a pointer to the response from the 0x070B ACI.
3180
+
* @comp_response_code: a pointer to the response code from the 0x070B ACI.
3181
+
*
3182
+
* Pass component table using ACI command (0x070B). This command is equivalent
3183
+
* to the reception of a PLDM FW Update PassComponentTable cmd.
3184
+
* This command should be sent once per component. It can be only sent after
3185
+
* Set Package Data cmd and before actual update. FW will assume these
3186
+
* commands are going to be sent until the TransferFlag is set to End or
3187
+
* StartAndEnd.
3188
+
*
3189
+
* Return: the exit code of the operation.
3190
+
*/
3191
+
int ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length,
3192
+
u8 transfer_flag, u8 *comp_response,
3193
+
u8 *comp_response_code)
3194
+
{
3195
+
struct ixgbe_aci_cmd_nvm_pass_comp_tbl *cmd;
3196
+
struct ixgbe_aci_desc desc;
3197
+
int err;
3198
+
3199
+
if (!data || !comp_response || !comp_response_code)
3200
+
return -EINVAL;
3201
+
3202
+
cmd = &desc.params.pass_comp_tbl;
3203
+
3204
+
ixgbe_fill_dflt_direct_cmd_desc(&desc,
3205
+
ixgbe_aci_opc_nvm_pass_component_tbl);
3206
+
desc.flags |= cpu_to_le16(IXGBE_ACI_FLAG_RD);
3207
+
3208
+
cmd->transfer_flag = transfer_flag;
3209
+
err = ixgbe_aci_send_cmd(hw, &desc, data, length);
3210
+
if (!err) {
3211
+
*comp_response = cmd->component_response;
3212
+
*comp_response_code = cmd->component_response_code;
2495
3213
}
2496
3214
2497
3215
return err;
···
3665
2485
if (err)
3666
2486
return err;
3667
2487
3668
-
err = ixgbe_read_sr_word_aci(hw, E610_SR_SW_CHECKSUM_WORD,
2488
+
err = ixgbe_read_sr_word_aci(hw, IXGBE_E610_SR_SW_CHECKSUM_WORD,
3669
2489
&tmp_checksum);
3670
2490
ixgbe_release_nvm(hw);
3671
2491
···
3760
2580
return err;
3761
2581
}
3762
2582
2583
+
/**
2584
+
* ixgbe_get_pfa_module_tlv - Read sub module TLV from NVM PFA
2585
+
* @hw: pointer to hardware structure
2586
+
* @module_tlv: pointer to module TLV to return
2587
+
* @module_tlv_len: pointer to module TLV length to return
2588
+
* @module_type: module type requested
2589
+
*
2590
+
* Find the requested sub module TLV type from the Preserved Field
2591
+
* Area (PFA) and returns the TLV pointer and length. The caller can
2592
+
* use these to read the variable length TLV value.
2593
+
*
2594
+
* Return: the exit code of the operation.
2595
+
*/
2596
+
static int ixgbe_get_pfa_module_tlv(struct ixgbe_hw *hw, u16 *module_tlv,
2597
+
u16 *module_tlv_len, u16 module_type)
2598
+
{
2599
+
u16 pfa_len, pfa_ptr, pfa_end_ptr;
2600
+
u16 next_tlv;
2601
+
int err;
2602
+
2603
+
err = ixgbe_read_ee_aci_e610(hw, IXGBE_E610_SR_PFA_PTR, &pfa_ptr);
2604
+
if (err)
2605
+
return err;
2606
+
2607
+
err = ixgbe_read_ee_aci_e610(hw, pfa_ptr, &pfa_len);
2608
+
if (err)
2609
+
return err;
2610
+
2611
+
/* Starting with first TLV after PFA length, iterate through the list
2612
+
* of TLVs to find the requested one.
2613
+
*/
2614
+
next_tlv = pfa_ptr + 1;
2615
+
pfa_end_ptr = pfa_ptr + pfa_len;
2616
+
while (next_tlv < pfa_end_ptr) {
2617
+
u16 tlv_sub_module_type, tlv_len;
2618
+
2619
+
/* Read TLV type */
2620
+
err = ixgbe_read_ee_aci_e610(hw, next_tlv,
2621
+
&tlv_sub_module_type);
2622
+
if (err)
2623
+
break;
2624
+
2625
+
/* Read TLV length */
2626
+
err = ixgbe_read_ee_aci_e610(hw, next_tlv + 1, &tlv_len);
2627
+
if (err)
2628
+
break;
2629
+
2630
+
if (tlv_sub_module_type == module_type) {
2631
+
if (tlv_len) {
2632
+
*module_tlv = next_tlv;
2633
+
*module_tlv_len = tlv_len;
2634
+
return 0;
2635
+
}
2636
+
return -EIO;
2637
+
}
2638
+
/* Check next TLV, i.e. current TLV pointer + length + 2 words
2639
+
* (for current TLV's type and length).
2640
+
*/
2641
+
next_tlv = next_tlv + tlv_len + 2;
2642
+
}
2643
+
/* Module does not exist */
2644
+
return -ENODATA;
2645
+
}
2646
+
2647
+
/**
2648
+
* ixgbe_read_pba_string_e610 - Read PBA string from NVM
2649
+
* @hw: pointer to hardware structure
2650
+
* @pba_num: stores the part number string from the NVM
2651
+
* @pba_num_size: part number string buffer length
2652
+
*
2653
+
* Read the part number string from the NVM.
2654
+
*
2655
+
* Return: the exit code of the operation.
2656
+
*/
2657
+
static int ixgbe_read_pba_string_e610(struct ixgbe_hw *hw, u8 *pba_num,
2658
+
u32 pba_num_size)
2659
+
{
2660
+
u16 pba_tlv, pba_tlv_len;
2661
+
u16 pba_word, pba_size;
2662
+
int err;
2663
+
2664
+
*pba_num = '\0';
2665
+
2666
+
err = ixgbe_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,
2667
+
IXGBE_E610_SR_PBA_BLOCK_PTR);
2668
+
if (err)
2669
+
return err;
2670
+
2671
+
/* pba_size is the next word */
2672
+
err = ixgbe_read_ee_aci_e610(hw, (pba_tlv + 2), &pba_size);
2673
+
if (err)
2674
+
return err;
2675
+
2676
+
if (pba_tlv_len < pba_size)
2677
+
return -EINVAL;
2678
+
2679
+
/* Subtract one to get PBA word count (PBA Size word is included in
2680
+
* total size).
2681
+
*/
2682
+
pba_size--;
2683
+
2684
+
if (pba_num_size < (((u32)pba_size * 2) + 1))
2685
+
return -EINVAL;
2686
+
2687
+
for (u16 i = 0; i < pba_size; i++) {
2688
+
err = ixgbe_read_ee_aci_e610(hw, (pba_tlv + 2 + 1) + i,
2689
+
&pba_word);
2690
+
if (err)
2691
+
return err;
2692
+
2693
+
pba_num[(i * 2)] = FIELD_GET(IXGBE_E610_SR_PBA_BLOCK_MASK,
2694
+
pba_word);
2695
+
pba_num[(i * 2) + 1] = pba_word & 0xFF;
2696
+
}
2697
+
2698
+
pba_num[(pba_size * 2)] = '\0';
2699
+
2700
+
return err;
2701
+
}
2702
+
3763
2703
static const struct ixgbe_mac_operations mac_ops_e610 = {
3764
2704
.init_hw = ixgbe_init_hw_generic,
3765
-
.start_hw = ixgbe_start_hw_X540,
2705
+
.start_hw = ixgbe_start_hw_e610,
3766
2706
.clear_hw_cntrs = ixgbe_clear_hw_cntrs_generic,
3767
2707
.enable_rx_dma = ixgbe_enable_rx_dma_generic,
3768
2708
.get_mac_addr = ixgbe_get_mac_addr_generic,
···
3921
2621
.led_off = ixgbe_led_off_generic,
3922
2622
.init_led_link_act = ixgbe_init_led_link_act_generic,
3923
2623
.reset_hw = ixgbe_reset_hw_e610,
2624
+
.get_fw_ver = ixgbe_aci_get_fw_ver,
3924
2625
.get_media_type = ixgbe_get_media_type_e610,
3925
2626
.setup_link = ixgbe_setup_link_e610,
2627
+
.fw_recovery_mode = ixgbe_fw_recovery_mode_e610,
2628
+
.fw_rollback_mode = ixgbe_fw_rollback_mode_e610,
2629
+
.get_nvm_ver = ixgbe_get_active_nvm_ver,
3926
2630
.get_link_capabilities = ixgbe_get_link_capabilities_e610,
3927
2631
.get_bus_info = ixgbe_get_bus_info_generic,
3928
2632
.acquire_swfw_sync = ixgbe_acquire_swfw_sync_X540,
···
3951
2647
.read = ixgbe_read_ee_aci_e610,
3952
2648
.read_buffer = ixgbe_read_ee_aci_buffer_e610,
3953
2649
.validate_checksum = ixgbe_validate_eeprom_checksum_e610,
2650
+
.read_pba_string = ixgbe_read_pba_string_e610,
2651
+
.init_params = ixgbe_init_eeprom_params_e610,
3954
2652
};
3955
2653
3956
2654
const struct ixgbe_info ixgbe_e610_info = {
+18
drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h
+18
drivers/net/ethernet/intel/ixgbe/ixgbe_e610.h
···
67
67
u16 length, void *data, bool last_command,
68
68
bool read_shadow_ram);
69
69
int ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw);
70
+
int ixgbe_get_inactive_orom_ver(struct ixgbe_hw *hw,
71
+
struct ixgbe_orom_info *orom);
72
+
int ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
73
+
int ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw,
74
+
struct ixgbe_netlist_info *netlist);
70
75
int ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data);
71
76
int ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,
72
77
u8 *data, bool read_shadow_ram);
···
82
77
u16 words, u16 *data);
83
78
int ixgbe_validate_eeprom_checksum_e610(struct ixgbe_hw *hw, u16 *checksum_val);
84
79
int ixgbe_reset_hw_e610(struct ixgbe_hw *hw);
80
+
int ixgbe_get_flash_data(struct ixgbe_hw *hw);
81
+
int ixgbe_aci_nvm_update_empr(struct ixgbe_hw *hw);
82
+
int ixgbe_nvm_set_pkg_data(struct ixgbe_hw *hw, bool del_pkg_data_flag,
83
+
u8 *data, u16 length);
84
+
int ixgbe_nvm_pass_component_tbl(struct ixgbe_hw *hw, u8 *data, u16 length,
85
+
u8 transfer_flag, u8 *comp_response,
86
+
u8 *comp_response_code);
87
+
int ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid);
88
+
int ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,
89
+
u32 offset, u16 length, void *data,
90
+
bool last_command, u8 command_flags);
91
+
int ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,
92
+
u8 *response_flags);
85
93
86
94
#endif /* _IXGBE_E610_H_ */
+49
-37
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+49
-37
drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
···
213
213
static int ixgbe_get_link_ksettings(struct net_device *netdev,
214
214
struct ethtool_link_ksettings *cmd)
215
215
{
216
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
216
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
217
217
struct ixgbe_hw *hw = &adapter->hw;
218
218
ixgbe_link_speed supported_link;
219
219
bool autoneg = false;
···
458
458
static int ixgbe_set_link_ksettings(struct net_device *netdev,
459
459
const struct ethtool_link_ksettings *cmd)
460
460
{
461
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
461
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
462
462
struct ixgbe_hw *hw = &adapter->hw;
463
463
u32 advertised, old;
464
464
int err = 0;
···
535
535
static void ixgbe_get_pause_stats(struct net_device *netdev,
536
536
struct ethtool_pause_stats *stats)
537
537
{
538
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
538
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
539
539
struct ixgbe_hw_stats *hwstats = &adapter->stats;
540
540
541
541
stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc;
···
545
545
static void ixgbe_get_pauseparam(struct net_device *netdev,
546
546
struct ethtool_pauseparam *pause)
547
547
{
548
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
548
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
549
549
struct ixgbe_hw *hw = &adapter->hw;
550
550
551
551
if (ixgbe_device_supports_autoneg_fc(hw) &&
···
567
567
static int ixgbe_set_pauseparam(struct net_device *netdev,
568
568
struct ethtool_pauseparam *pause)
569
569
{
570
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
570
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
571
571
struct ixgbe_hw *hw = &adapter->hw;
572
572
struct ixgbe_fc_info fc = hw->fc;
573
573
···
606
606
607
607
static u32 ixgbe_get_msglevel(struct net_device *netdev)
608
608
{
609
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
609
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
610
610
return adapter->msg_enable;
611
611
}
612
612
613
613
static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
614
614
{
615
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
615
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
616
616
adapter->msg_enable = data;
617
617
}
618
618
···
627
627
static void ixgbe_get_regs(struct net_device *netdev,
628
628
struct ethtool_regs *regs, void *p)
629
629
{
630
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
630
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
631
631
struct ixgbe_hw *hw = &adapter->hw;
632
632
u32 *regs_buff = p;
633
633
u8 i;
···
994
994
995
995
static int ixgbe_get_eeprom_len(struct net_device *netdev)
996
996
{
997
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
997
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
998
998
return adapter->hw.eeprom.word_size * 2;
999
999
}
1000
1000
1001
1001
static int ixgbe_get_eeprom(struct net_device *netdev,
1002
1002
struct ethtool_eeprom *eeprom, u8 *bytes)
1003
1003
{
1004
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1004
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1005
1005
struct ixgbe_hw *hw = &adapter->hw;
1006
1006
u16 *eeprom_buff;
1007
1007
int first_word, last_word, eeprom_len;
···
1037
1037
static int ixgbe_set_eeprom(struct net_device *netdev,
1038
1038
struct ethtool_eeprom *eeprom, u8 *bytes)
1039
1039
{
1040
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1040
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1041
1041
struct ixgbe_hw *hw = &adapter->hw;
1042
1042
u16 *eeprom_buff;
1043
1043
void *ptr;
···
1104
1104
return ret_val;
1105
1105
}
1106
1106
1107
+
void ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter)
1108
+
{
1109
+
struct ixgbe_hw *hw = &adapter->hw;
1110
+
1111
+
ixgbe_get_flash_data(hw);
1112
+
ixgbe_set_fw_version_e610(adapter);
1113
+
}
1114
+
1107
1115
static void ixgbe_get_drvinfo(struct net_device *netdev,
1108
1116
struct ethtool_drvinfo *drvinfo)
1109
1117
{
1110
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1118
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1119
+
1120
+
/* need to refresh info for e610 in case fw reloads in runtime */
1121
+
if (adapter->hw.mac.type == ixgbe_mac_e610)
1122
+
ixgbe_refresh_fw_version(adapter);
1111
1123
1112
1124
strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
1113
1125
···
1173
1161
struct kernel_ethtool_ringparam *kernel_ring,
1174
1162
struct netlink_ext_ack *extack)
1175
1163
{
1176
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1164
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1177
1165
struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
1178
1166
struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
1179
1167
···
1188
1176
struct kernel_ethtool_ringparam *kernel_ring,
1189
1177
struct netlink_ext_ack *extack)
1190
1178
{
1191
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1179
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1192
1180
struct ixgbe_ring *temp_ring;
1193
1181
int i, j, err = 0;
1194
1182
u32 new_rx_count, new_tx_count;
···
1348
1336
static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1349
1337
struct ethtool_stats *stats, u64 *data)
1350
1338
{
1351
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1339
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1352
1340
struct rtnl_link_stats64 temp;
1353
1341
const struct rtnl_link_stats64 *net_stats;
1354
1342
unsigned int start;
···
1722
1710
static irqreturn_t ixgbe_test_intr(int irq, void *data)
1723
1711
{
1724
1712
struct net_device *netdev = (struct net_device *) data;
1725
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1713
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1726
1714
1727
1715
adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1728
1716
···
2195
2183
static void ixgbe_diag_test(struct net_device *netdev,
2196
2184
struct ethtool_test *eth_test, u64 *data)
2197
2185
{
2198
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2186
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2199
2187
bool if_running = netif_running(netdev);
2200
2188
2201
2189
if (ixgbe_removed(adapter->hw.hw_addr)) {
···
2318
2306
static void ixgbe_get_wol(struct net_device *netdev,
2319
2307
struct ethtool_wolinfo *wol)
2320
2308
{
2321
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2309
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2322
2310
2323
2311
wol->supported = WAKE_UCAST | WAKE_MCAST |
2324
2312
WAKE_BCAST | WAKE_MAGIC;
···
2340
2328
2341
2329
static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2342
2330
{
2343
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2331
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2344
2332
2345
2333
if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE |
2346
2334
WAKE_FILTER))
···
2367
2355
2368
2356
static int ixgbe_nway_reset(struct net_device *netdev)
2369
2357
{
2370
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2358
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2371
2359
2372
2360
if (netif_running(netdev))
2373
2361
ixgbe_reinit_locked(adapter);
···
2378
2366
static int ixgbe_set_phys_id(struct net_device *netdev,
2379
2367
enum ethtool_phys_id_state state)
2380
2368
{
2381
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2369
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2382
2370
struct ixgbe_hw *hw = &adapter->hw;
2383
2371
2384
2372
if (!hw->mac.ops.led_on || !hw->mac.ops.led_off)
···
2411
2399
struct kernel_ethtool_coalesce *kernel_coal,
2412
2400
struct netlink_ext_ack *extack)
2413
2401
{
2414
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2402
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2415
2403
2416
2404
/* only valid if in constant ITR mode */
2417
2405
if (adapter->rx_itr_setting <= 1)
···
2467
2455
struct kernel_ethtool_coalesce *kernel_coal,
2468
2456
struct netlink_ext_ack *extack)
2469
2457
{
2470
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
2458
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
2471
2459
struct ixgbe_q_vector *q_vector;
2472
2460
int i;
2473
2461
u16 tx_itr_param, rx_itr_param, tx_itr_prev;
···
2693
2681
static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2694
2682
u32 *rule_locs)
2695
2683
{
2696
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
2684
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
2697
2685
int ret = -EOPNOTSUPP;
2698
2686
2699
2687
switch (cmd->cmd) {
···
3081
3069
3082
3070
static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
3083
3071
{
3084
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
3072
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3085
3073
int ret = -EOPNOTSUPP;
3086
3074
3087
3075
switch (cmd->cmd) {
···
3108
3096
3109
3097
static u32 ixgbe_rss_indir_size(struct net_device *netdev)
3110
3098
{
3111
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3099
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3112
3100
3113
3101
return ixgbe_rss_indir_tbl_entries(adapter);
3114
3102
}
···
3128
3116
static int ixgbe_get_rxfh(struct net_device *netdev,
3129
3117
struct ethtool_rxfh_param *rxfh)
3130
3118
{
3131
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3119
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3132
3120
3133
3121
rxfh->hfunc = ETH_RSS_HASH_TOP;
3134
3122
···
3146
3134
struct ethtool_rxfh_param *rxfh,
3147
3135
struct netlink_ext_ack *extack)
3148
3136
{
3149
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3137
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3150
3138
int i;
3151
3139
u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3152
3140
···
3188
3176
static int ixgbe_get_ts_info(struct net_device *dev,
3189
3177
struct kernel_ethtool_ts_info *info)
3190
3178
{
3191
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
3179
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3192
3180
3193
3181
/* we always support timestamping disabled */
3194
3182
info->rx_filters = BIT(HWTSTAMP_FILTER_NONE);
···
3264
3252
static void ixgbe_get_channels(struct net_device *dev,
3265
3253
struct ethtool_channels *ch)
3266
3254
{
3267
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
3255
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3268
3256
3269
3257
/* report maximum channels */
3270
3258
ch->max_combined = ixgbe_max_channels(adapter);
···
3301
3289
static int ixgbe_set_channels(struct net_device *dev,
3302
3290
struct ethtool_channels *ch)
3303
3291
{
3304
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
3292
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3305
3293
unsigned int count = ch->combined_count;
3306
3294
u8 max_rss_indices = ixgbe_max_rss_indices(adapter);
3307
3295
···
3339
3327
static int ixgbe_get_module_info(struct net_device *dev,
3340
3328
struct ethtool_modinfo *modinfo)
3341
3329
{
3342
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
3330
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3343
3331
struct ixgbe_hw *hw = &adapter->hw;
3344
3332
u8 sff8472_rev, addr_mode;
3345
3333
bool page_swap = false;
···
3385
3373
struct ethtool_eeprom *ee,
3386
3374
u8 *data)
3387
3375
{
3388
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
3376
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
3389
3377
struct ixgbe_hw *hw = &adapter->hw;
3390
3378
int status = -EFAULT;
3391
3379
u8 databyte = 0xFF;
···
3481
3469
3482
3470
static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata)
3483
3471
{
3484
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3472
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3485
3473
struct ixgbe_hw *hw = &adapter->hw;
3486
3474
3487
3475
if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE))
···
3495
3483
3496
3484
static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata)
3497
3485
{
3498
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3486
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3499
3487
struct ixgbe_hw *hw = &adapter->hw;
3500
3488
struct ethtool_keee eee_data;
3501
3489
int ret_val;
···
3550
3538
3551
3539
static u32 ixgbe_get_priv_flags(struct net_device *netdev)
3552
3540
{
3553
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3541
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3554
3542
u32 priv_flags = 0;
3555
3543
3556
3544
if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
···
3567
3555
3568
3556
static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags)
3569
3557
{
3570
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
3558
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
3571
3559
unsigned int flags2 = adapter->flags2;
3572
3560
unsigned int i;
3573
3561
+6
-6
drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
+6
-6
drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
···
56
56
if (xid >= netdev->fcoe_ddp_xid)
57
57
return 0;
58
58
59
-
adapter = netdev_priv(netdev);
59
+
adapter = ixgbe_from_netdev(netdev);
60
60
fcoe = &adapter->fcoe;
61
61
ddp = &fcoe->ddp[xid];
62
62
if (!ddp->udl)
···
153
153
if (!netdev || !sgl)
154
154
return 0;
155
155
156
-
adapter = netdev_priv(netdev);
156
+
adapter = ixgbe_from_netdev(netdev);
157
157
if (xid >= netdev->fcoe_ddp_xid) {
158
158
e_warn(drv, "xid=0x%x out-of-range\n", xid);
159
159
return 0;
···
834
834
*/
835
835
int ixgbe_fcoe_enable(struct net_device *netdev)
836
836
{
837
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
837
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
838
838
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
839
839
840
840
atomic_inc(&fcoe->refcnt);
···
881
881
*/
882
882
int ixgbe_fcoe_disable(struct net_device *netdev)
883
883
{
884
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
884
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
885
885
886
886
if (!atomic_dec_and_test(&adapter->fcoe.refcnt))
887
887
return -EINVAL;
···
927
927
int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
928
928
{
929
929
u16 prefix = 0xffff;
930
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
930
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
931
931
struct ixgbe_mac_info *mac = &adapter->hw.mac;
932
932
933
933
switch (type) {
···
967
967
int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,
968
968
struct netdev_fcoe_hbainfo *info)
969
969
{
970
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
970
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
971
971
struct ixgbe_hw *hw = &adapter->hw;
972
972
u64 dsn;
973
973
+707
drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c
+707
drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/* Copyright(c) 2025 Intel Corporation. */
3
+
4
+
#include <linux/crc32.h>
5
+
#include <linux/pldmfw.h>
6
+
#include <linux/uuid.h>
7
+
8
+
#include "ixgbe.h"
9
+
#include "ixgbe_fw_update.h"
10
+
11
+
struct ixgbe_fwu_priv {
12
+
struct pldmfw context;
13
+
14
+
struct ixgbe_adapter *adapter;
15
+
struct netlink_ext_ack *extack;
16
+
17
+
/* Track which NVM banks to activate at the end of the update */
18
+
u8 activate_flags;
19
+
bool emp_reset_available;
20
+
};
21
+
22
+
/**
23
+
* ixgbe_send_package_data - Send record package data to firmware
24
+
* @context: PLDM fw update structure
25
+
* @data: pointer to the package data
26
+
* @length: length of the package data
27
+
*
28
+
* Send a copy of the package data associated with the PLDM record matching
29
+
* this device to the firmware.
30
+
*
31
+
* Note that this function sends an AdminQ command that will fail unless the
32
+
* NVM resource has been acquired.
33
+
*
34
+
* Return: zero on success, or a negative error code on failure.
35
+
*/
36
+
static int ixgbe_send_package_data(struct pldmfw *context,
37
+
const u8 *data, u16 length)
38
+
{
39
+
struct ixgbe_fwu_priv *priv = container_of(context,
40
+
struct ixgbe_fwu_priv,
41
+
context);
42
+
struct ixgbe_adapter *adapter = priv->adapter;
43
+
struct ixgbe_hw *hw = &adapter->hw;
44
+
u8 *package_data;
45
+
int err;
46
+
47
+
package_data = kmemdup(data, length, GFP_KERNEL);
48
+
if (!package_data)
49
+
return -ENOMEM;
50
+
51
+
err = ixgbe_nvm_set_pkg_data(hw, false, package_data, length);
52
+
53
+
kfree(package_data);
54
+
55
+
return err;
56
+
}
57
+
58
+
/**
59
+
* ixgbe_check_component_response - Report firmware response to a component
60
+
* @adapter: device private data structure
61
+
* @response: indicates whether this component can be updated
62
+
* @code: code indicating reason for response
63
+
* @extack: netlink extended ACK structure
64
+
*
65
+
* Check whether firmware indicates if this component can be updated. Report
66
+
* a suitable error message over the netlink extended ACK if the component
67
+
* cannot be updated.
68
+
*
69
+
* Return: 0 if the component can be updated, or -ECANCELED if the
70
+
* firmware indicates the component cannot be updated.
71
+
*/
72
+
static int ixgbe_check_component_response(struct ixgbe_adapter *adapter,
73
+
u8 response, u8 code,
74
+
struct netlink_ext_ack *extack)
75
+
{
76
+
struct ixgbe_hw *hw = &adapter->hw;
77
+
78
+
switch (response) {
79
+
case IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED:
80
+
/* Firmware indicated this update is good to proceed. */
81
+
return 0;
82
+
case IXGBE_ACI_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE:
83
+
NL_SET_ERR_MSG_MOD(extack,
84
+
"Firmware recommends not updating, as it may result in a downgrade. Continuing anyways");
85
+
return 0;
86
+
case IXGBE_ACI_NVM_PASS_COMP_CAN_NOT_BE_UPDATED:
87
+
NL_SET_ERR_MSG_MOD(extack, "Firmware has rejected updating.");
88
+
break;
89
+
case IXGBE_ACI_NVM_PASS_COMP_PARTIAL_CHECK:
90
+
if (hw->mac.ops.fw_recovery_mode &&
91
+
hw->mac.ops.fw_recovery_mode(hw))
92
+
return 0;
93
+
break;
94
+
}
95
+
96
+
switch (code) {
97
+
case IXGBE_ACI_NVM_PASS_COMP_STAMP_IDENTICAL_CODE:
98
+
NL_SET_ERR_MSG_MOD(extack,
99
+
"Component comparison stamp is identical to running image");
100
+
break;
101
+
case IXGBE_ACI_NVM_PASS_COMP_STAMP_LOWER:
102
+
NL_SET_ERR_MSG_MOD(extack,
103
+
"Component comparison stamp is lower than running image");
104
+
break;
105
+
case IXGBE_ACI_NVM_PASS_COMP_INVALID_STAMP_CODE:
106
+
NL_SET_ERR_MSG_MOD(extack,
107
+
"Component comparison stamp is invalid");
108
+
break;
109
+
case IXGBE_ACI_NVM_PASS_COMP_CONFLICT_CODE:
110
+
NL_SET_ERR_MSG_MOD(extack,
111
+
"Component table conflict occurred");
112
+
break;
113
+
case IXGBE_ACI_NVM_PASS_COMP_PRE_REQ_NOT_MET_CODE:
114
+
NL_SET_ERR_MSG_MOD(extack, "Component pre-requisites not met");
115
+
break;
116
+
case IXGBE_ACI_NVM_PASS_COMP_NOT_SUPPORTED_CODE:
117
+
NL_SET_ERR_MSG_MOD(extack, "Component not supported");
118
+
break;
119
+
case IXGBE_ACI_NVM_PASS_COMP_CANNOT_DOWNGRADE_CODE:
120
+
NL_SET_ERR_MSG_MOD(extack, "Component cannot be downgraded");
121
+
break;
122
+
case IXGBE_ACI_NVM_PASS_COMP_INCOMPLETE_IMAGE_CODE:
123
+
NL_SET_ERR_MSG_MOD(extack, "Incomplete component image");
124
+
break;
125
+
case IXGBE_ACI_NVM_PASS_COMP_VER_STR_IDENTICAL_CODE:
126
+
NL_SET_ERR_MSG_MOD(extack,
127
+
"Component version is identical to running image");
128
+
break;
129
+
case IXGBE_ACI_NVM_PASS_COMP_VER_STR_LOWER_CODE:
130
+
NL_SET_ERR_MSG_MOD(extack,
131
+
"Component version is lower than the running image");
132
+
break;
133
+
default:
134
+
NL_SET_ERR_MSG_MOD(extack,
135
+
"Received unexpected response code from firmware");
136
+
break;
137
+
}
138
+
139
+
return -ECANCELED;
140
+
}
141
+
142
+
/**
143
+
* ixgbe_send_component_table - Send PLDM component table to firmware
144
+
* @context: PLDM fw update structure
145
+
* @component: the component to process
146
+
* @transfer_flag: relative transfer order of this component
147
+
*
148
+
* Read relevant data from the component and forward it to the device
149
+
* firmware. Check the response to determine if the firmware indicates that
150
+
* the update can proceed.
151
+
*
152
+
* This function sends ACI commands related to the NVM, and assumes that
153
+
* the NVM resource has been acquired.
154
+
*
155
+
* Return: 0 on success, or a negative error code on failure.
156
+
*/
157
+
static int ixgbe_send_component_table(struct pldmfw *context,
158
+
struct pldmfw_component *component,
159
+
u8 transfer_flag)
160
+
{
161
+
struct ixgbe_fwu_priv *priv = container_of(context,
162
+
struct ixgbe_fwu_priv,
163
+
context);
164
+
struct ixgbe_adapter *adapter = priv->adapter;
165
+
struct netlink_ext_ack *extack = priv->extack;
166
+
struct ixgbe_aci_cmd_nvm_comp_tbl *comp_tbl;
167
+
u8 comp_response, comp_response_code;
168
+
struct ixgbe_hw *hw = &adapter->hw;
169
+
size_t length;
170
+
int err;
171
+
172
+
switch (component->identifier) {
173
+
case NVM_COMP_ID_OROM:
174
+
case NVM_COMP_ID_NVM:
175
+
case NVM_COMP_ID_NETLIST:
176
+
break;
177
+
default:
178
+
NL_SET_ERR_MSG_MOD(extack,
179
+
"Unable to update due to unknown firmware component");
180
+
return -EOPNOTSUPP;
181
+
}
182
+
183
+
length = struct_size(comp_tbl, cvs, component->version_len);
184
+
comp_tbl = kzalloc(length, GFP_KERNEL);
185
+
if (!comp_tbl)
186
+
return -ENOMEM;
187
+
188
+
comp_tbl->comp_class = cpu_to_le16(component->classification);
189
+
comp_tbl->comp_id = cpu_to_le16(component->identifier);
190
+
comp_tbl->comp_class_idx = FWU_COMP_CLASS_IDX_NOT_USE;
191
+
comp_tbl->comp_cmp_stamp = cpu_to_le32(component->comparison_stamp);
192
+
comp_tbl->cvs_type = component->version_type;
193
+
comp_tbl->cvs_len = component->version_len;
194
+
195
+
memcpy(comp_tbl->cvs, component->version_string,
196
+
component->version_len);
197
+
198
+
err = ixgbe_nvm_pass_component_tbl(hw, (u8 *)comp_tbl, length,
199
+
transfer_flag, &comp_response,
200
+
&comp_response_code);
201
+
202
+
kfree(comp_tbl);
203
+
204
+
if (err) {
205
+
NL_SET_ERR_MSG_MOD(extack,
206
+
"Failed to transfer component table to firmware");
207
+
return -EIO;
208
+
}
209
+
210
+
return ixgbe_check_component_response(adapter,
211
+
comp_response,
212
+
comp_response_code, extack);
213
+
}
214
+
215
+
/**
216
+
* ixgbe_write_one_nvm_block - Write an NVM block and await completion response
217
+
* @adapter: the PF data structure
218
+
* @module: the module to write to
219
+
* @offset: offset in bytes
220
+
* @block_size: size of the block to write, up to 4k
221
+
* @block: pointer to block of data to write
222
+
* @last_cmd: whether this is the last command
223
+
* @extack: netlink extended ACK structure
224
+
*
225
+
* Write a block of data to a flash module, and await for the completion
226
+
* response message from firmware.
227
+
*
228
+
* Note this function assumes the caller has acquired the NVM resource.
229
+
*
230
+
* On successful return, reset level indicates the device reset required to
231
+
* complete the update.
232
+
*
233
+
* 0 - IXGBE_ACI_NVM_POR_FLAG - A full power on is required
234
+
* 1 - IXGBE_ACI_NVM_PERST_FLAG - A cold PCIe reset is required
235
+
* 2 - IXGBE_ACI_NVM_EMPR_FLAG - An EMP reset is required
236
+
*
237
+
* Return: 0 on success, or a negative error code on failure.
238
+
*/
239
+
static int ixgbe_write_one_nvm_block(struct ixgbe_adapter *adapter,
240
+
u16 module, u32 offset,
241
+
u16 block_size, u8 *block, bool last_cmd,
242
+
struct netlink_ext_ack *extack)
243
+
{
244
+
struct ixgbe_hw *hw = &adapter->hw;
245
+
246
+
return ixgbe_aci_update_nvm(hw, module, offset, block_size, block,
247
+
last_cmd, 0);
248
+
}
249
+
250
+
/**
251
+
* ixgbe_write_nvm_module - Write data to an NVM module
252
+
* @adapter: the PF driver structure
253
+
* @module: the module id to program
254
+
* @component: the name of the component being updated
255
+
* @image: buffer of image data to write to the NVM
256
+
* @length: length of the buffer
257
+
* @extack: netlink extended ACK structure
258
+
*
259
+
* Loop over the data for a given NVM module and program it in 4 Kb
260
+
* blocks. Notify devlink core of progress after each block is programmed.
261
+
* Loops over a block of data and programs the NVM in 4k block chunks.
262
+
*
263
+
* Note this function assumes the caller has acquired the NVM resource.
264
+
*
265
+
* Return: 0 on success, or a negative error code on failure.
266
+
*/
267
+
static int ixgbe_write_nvm_module(struct ixgbe_adapter *adapter, u16 module,
268
+
const char *component, const u8 *image,
269
+
u32 length,
270
+
struct netlink_ext_ack *extack)
271
+
{
272
+
struct devlink *devlink = adapter->devlink;
273
+
u32 offset = 0;
274
+
bool last_cmd;
275
+
u8 *block;
276
+
int err;
277
+
278
+
devlink_flash_update_status_notify(devlink, "Flashing",
279
+
component, 0, length);
280
+
281
+
block = kzalloc(IXGBE_ACI_MAX_BUFFER_SIZE, GFP_KERNEL);
282
+
if (!block)
283
+
return -ENOMEM;
284
+
285
+
do {
286
+
u32 block_size;
287
+
288
+
block_size = min_t(u32, IXGBE_ACI_MAX_BUFFER_SIZE,
289
+
length - offset);
290
+
last_cmd = !(offset + block_size < length);
291
+
292
+
memcpy(block, image + offset, block_size);
293
+
294
+
err = ixgbe_write_one_nvm_block(adapter, module, offset,
295
+
block_size, block, last_cmd,
296
+
extack);
297
+
if (err)
298
+
break;
299
+
300
+
offset += block_size;
301
+
302
+
devlink_flash_update_status_notify(devlink, "Flashing",
303
+
component, offset, length);
304
+
} while (!last_cmd);
305
+
306
+
if (err)
307
+
devlink_flash_update_status_notify(devlink, "Flashing failed",
308
+
component, length, length);
309
+
else
310
+
devlink_flash_update_status_notify(devlink, "Flashing done",
311
+
component, length, length);
312
+
313
+
kfree(block);
314
+
315
+
return err;
316
+
}
317
+
318
+
/* Length in seconds to wait before timing out when erasing a flash module.
319
+
* Yes, erasing really can take minutes to complete.
320
+
*/
321
+
#define IXGBE_FW_ERASE_TIMEOUT 300
322
+
323
+
/**
324
+
* ixgbe_erase_nvm_module - Erase an NVM module and await firmware completion
325
+
* @adapter: the PF data structure
326
+
* @module: the module to erase
327
+
* @component: name of the component being updated
328
+
* @extack: netlink extended ACK structure
329
+
*
330
+
* Erase the inactive NVM bank associated with this module, and await for
331
+
* a completion response message from firmware.
332
+
*
333
+
* Note this function assumes the caller has acquired the NVM resource.
334
+
*
335
+
* Return: 0 on success, or a negative error code on failure.
336
+
*/
337
+
static int ixgbe_erase_nvm_module(struct ixgbe_adapter *adapter, u16 module,
338
+
const char *component,
339
+
struct netlink_ext_ack *extack)
340
+
{
341
+
struct devlink *devlink = adapter->devlink;
342
+
struct ixgbe_hw *hw = &adapter->hw;
343
+
int err;
344
+
345
+
devlink_flash_update_timeout_notify(devlink, "Erasing", component,
346
+
IXGBE_FW_ERASE_TIMEOUT);
347
+
348
+
err = ixgbe_aci_erase_nvm(hw, module);
349
+
if (err)
350
+
devlink_flash_update_status_notify(devlink, "Erasing failed",
351
+
component, 0, 0);
352
+
else
353
+
devlink_flash_update_status_notify(devlink, "Erasing done",
354
+
component, 0, 0);
355
+
356
+
return err;
357
+
}
358
+
359
+
/**
360
+
* ixgbe_switch_flash_banks - Tell firmware to switch NVM banks
361
+
* @adapter: Pointer to the PF data structure
362
+
* @activate_flags: flags used for the activation command
363
+
* @emp_reset_available: on return, indicates if EMP reset is available
364
+
* @extack: netlink extended ACK structure
365
+
*
366
+
* Notify firmware to activate the newly written flash banks, and wait for the
367
+
* firmware response.
368
+
*
369
+
* Return: 0 on success or an error code on failure.
370
+
*/
371
+
static int ixgbe_switch_flash_banks(struct ixgbe_adapter *adapter,
372
+
u8 activate_flags,
373
+
bool *emp_reset_available,
374
+
struct netlink_ext_ack *extack)
375
+
{
376
+
struct ixgbe_hw *hw = &adapter->hw;
377
+
u8 response_flags;
378
+
int err;
379
+
380
+
err = ixgbe_nvm_write_activate(hw, activate_flags, &response_flags);
381
+
if (err) {
382
+
NL_SET_ERR_MSG_MOD(extack,
383
+
"Failed to switch active flash banks");
384
+
return err;
385
+
}
386
+
387
+
if (emp_reset_available) {
388
+
if (hw->dev_caps.common_cap.reset_restrict_support)
389
+
*emp_reset_available =
390
+
response_flags & IXGBE_ACI_NVM_EMPR_ENA;
391
+
else
392
+
*emp_reset_available = true;
393
+
}
394
+
395
+
return 0;
396
+
}
397
+
398
+
/**
399
+
* ixgbe_flash_component - Flash a component of the NVM
400
+
* @context: PLDM fw update structure
401
+
* @component: the component table to program
402
+
*
403
+
* Program the flash contents for a given component. First, determine the
404
+
* module id. Then, erase the secondary bank for this module. Finally, write
405
+
* the contents of the component to the NVM.
406
+
*
407
+
* Note this function assumes the caller has acquired the NVM resource.
408
+
*
409
+
* Return: 0 on success, or a negative error code on failure.
410
+
*/
411
+
static int ixgbe_flash_component(struct pldmfw *context,
412
+
struct pldmfw_component *component)
413
+
{
414
+
struct ixgbe_fwu_priv *priv = container_of(context,
415
+
struct ixgbe_fwu_priv,
416
+
context);
417
+
struct netlink_ext_ack *extack = priv->extack;
418
+
struct ixgbe_adapter *adapter = priv->adapter;
419
+
const char *name;
420
+
u16 module;
421
+
int err;
422
+
u8 flag;
423
+
424
+
switch (component->identifier) {
425
+
case NVM_COMP_ID_OROM:
426
+
module = IXGBE_E610_SR_1ST_OROM_BANK_PTR;
427
+
flag = IXGBE_ACI_NVM_ACTIV_SEL_OROM;
428
+
name = "fw.undi";
429
+
break;
430
+
case NVM_COMP_ID_NVM:
431
+
module = IXGBE_E610_SR_1ST_NVM_BANK_PTR;
432
+
flag = IXGBE_ACI_NVM_ACTIV_SEL_NVM;
433
+
name = "fw.mgmt";
434
+
break;
435
+
case NVM_COMP_ID_NETLIST:
436
+
module = IXGBE_E610_SR_NETLIST_BANK_PTR;
437
+
flag = IXGBE_ACI_NVM_ACTIV_SEL_NETLIST;
438
+
name = "fw.netlist";
439
+
break;
440
+
441
+
default:
442
+
return -EOPNOTSUPP;
443
+
}
444
+
445
+
/* Mark this component for activating at the end. */
446
+
priv->activate_flags |= flag;
447
+
448
+
err = ixgbe_erase_nvm_module(adapter, module, name, extack);
449
+
if (err)
450
+
return err;
451
+
452
+
return ixgbe_write_nvm_module(adapter, module, name,
453
+
component->component_data,
454
+
component->component_size, extack);
455
+
}
456
+
457
+
/**
458
+
* ixgbe_finalize_update - Perform last steps to complete device update
459
+
* @context: PLDM fw update structure
460
+
*
461
+
* Called as the last step of the update process. Complete the update by
462
+
* telling the firmware to switch active banks, and perform a reset of
463
+
* configured.
464
+
*
465
+
* Return: 0 on success, or an error code on failure.
466
+
*/
467
+
static int ixgbe_finalize_update(struct pldmfw *context)
468
+
{
469
+
struct ixgbe_fwu_priv *priv = container_of(context,
470
+
struct ixgbe_fwu_priv,
471
+
context);
472
+
struct ixgbe_adapter *adapter = priv->adapter;
473
+
struct netlink_ext_ack *extack = priv->extack;
474
+
struct devlink *devlink = adapter->devlink;
475
+
int err;
476
+
477
+
/* Finally, notify firmware to activate the written NVM banks */
478
+
err = ixgbe_switch_flash_banks(adapter, priv->activate_flags,
479
+
&priv->emp_reset_available, extack);
480
+
if (err)
481
+
return err;
482
+
483
+
adapter->fw_emp_reset_disabled = !priv->emp_reset_available;
484
+
485
+
if (!adapter->fw_emp_reset_disabled)
486
+
devlink_flash_update_status_notify(devlink,
487
+
"Suggested is to activate new firmware by devlink reload, if it doesn't work then a power cycle is required",
488
+
NULL, 0, 0);
489
+
490
+
return 0;
491
+
}
492
+
493
+
static const struct pldmfw_ops ixgbe_fwu_ops_e610 = {
494
+
.match_record = &pldmfw_op_pci_match_record,
495
+
.send_package_data = &ixgbe_send_package_data,
496
+
.send_component_table = &ixgbe_send_component_table,
497
+
.flash_component = &ixgbe_flash_component,
498
+
.finalize_update = &ixgbe_finalize_update,
499
+
};
500
+
501
+
/**
502
+
* ixgbe_get_pending_updates - Check if the component has a pending update
503
+
* @adapter: the PF driver structure
504
+
* @pending: on return, bitmap of updates pending
505
+
* @extack: Netlink extended ACK
506
+
*
507
+
* Check if the device has any pending updates on any flash components.
508
+
*
509
+
* Return: 0 on success, or a negative error code on failure. Update
510
+
* pending with the bitmap of pending updates.
511
+
*/
512
+
int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending,
513
+
struct netlink_ext_ack *extack)
514
+
{
515
+
struct ixgbe_hw_dev_caps *dev_caps;
516
+
struct ixgbe_hw *hw = &adapter->hw;
517
+
int err;
518
+
519
+
dev_caps = kzalloc(sizeof(*dev_caps), GFP_KERNEL);
520
+
if (!dev_caps)
521
+
return -ENOMEM;
522
+
523
+
err = ixgbe_discover_dev_caps(hw, dev_caps);
524
+
if (err) {
525
+
NL_SET_ERR_MSG_MOD(extack,
526
+
"Unable to read device capabilities");
527
+
kfree(dev_caps);
528
+
return -EIO;
529
+
}
530
+
531
+
*pending = 0;
532
+
533
+
if (dev_caps->common_cap.nvm_update_pending_nvm)
534
+
*pending |= IXGBE_ACI_NVM_ACTIV_SEL_NVM;
535
+
536
+
if (dev_caps->common_cap.nvm_update_pending_orom)
537
+
*pending |= IXGBE_ACI_NVM_ACTIV_SEL_OROM;
538
+
539
+
if (dev_caps->common_cap.nvm_update_pending_netlist)
540
+
*pending |= IXGBE_ACI_NVM_ACTIV_SEL_NETLIST;
541
+
542
+
kfree(dev_caps);
543
+
544
+
return 0;
545
+
}
546
+
547
+
/**
548
+
* ixgbe_cancel_pending_update - Cancel any pending update for a component
549
+
* @adapter: the PF driver structure
550
+
* @component: if not NULL, the name of the component being updated
551
+
* @extack: Netlink extended ACK structure
552
+
*
553
+
* Cancel any pending update for the specified component. If component is
554
+
* NULL, all device updates will be canceled.
555
+
*
556
+
* Return: 0 on success, or a negative error code on failure.
557
+
*/
558
+
static int ixgbe_cancel_pending_update(struct ixgbe_adapter *adapter,
559
+
const char *component,
560
+
struct netlink_ext_ack *extack)
561
+
{
562
+
struct devlink *devlink = adapter->devlink;
563
+
struct ixgbe_hw *hw = &adapter->hw;
564
+
u8 pending;
565
+
int err;
566
+
567
+
err = ixgbe_get_pending_updates(adapter, &pending, extack);
568
+
if (err)
569
+
return err;
570
+
571
+
/* If the flash_update request is for a specific component, ignore all
572
+
* of the other components.
573
+
*/
574
+
if (component) {
575
+
if (strcmp(component, "fw.mgmt") == 0)
576
+
pending &= IXGBE_ACI_NVM_ACTIV_SEL_NVM;
577
+
else if (strcmp(component, "fw.undi") == 0)
578
+
pending &= IXGBE_ACI_NVM_ACTIV_SEL_OROM;
579
+
else if (strcmp(component, "fw.netlist") == 0)
580
+
pending &= IXGBE_ACI_NVM_ACTIV_SEL_NETLIST;
581
+
else
582
+
return -EINVAL;
583
+
}
584
+
585
+
/* There is no previous pending update, so this request may continue */
586
+
if (!pending)
587
+
return 0;
588
+
589
+
/* In order to allow overwriting a previous pending update, notify
590
+
* firmware to cancel that update by issuing the appropriate command.
591
+
*/
592
+
devlink_flash_update_status_notify(devlink,
593
+
"Canceling previous pending update",
594
+
component, 0, 0);
595
+
596
+
err = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);
597
+
if (err) {
598
+
NL_SET_ERR_MSG_MOD(extack,
599
+
"Failed to acquire device flash lock");
600
+
return -EIO;
601
+
}
602
+
603
+
pending |= IXGBE_ACI_NVM_REVERT_LAST_ACTIV;
604
+
err = ixgbe_switch_flash_banks(adapter, pending, NULL, extack);
605
+
606
+
ixgbe_release_nvm(hw);
607
+
608
+
return err;
609
+
}
610
+
611
+
/**
612
+
* ixgbe_flash_pldm_image - Write a PLDM-formatted firmware image to the device
613
+
* @devlink: pointer to devlink associated with the device to update
614
+
* @params: devlink flash update parameters
615
+
* @extack: netlink extended ACK structure
616
+
*
617
+
* Parse the data for a given firmware file, verifying that it is a valid PLDM
618
+
* formatted image that matches this device.
619
+
*
620
+
* Extract the device record Package Data and Component Tables and send them
621
+
* to the firmware. Extract and write the flash data for each of the three
622
+
* main flash components, "fw.mgmt", "fw.undi", and "fw.netlist". Notify
623
+
* firmware once the data is written to the inactive banks.
624
+
*
625
+
* Return: 0 on success or a negative error code on failure.
626
+
*/
627
+
int ixgbe_flash_pldm_image(struct devlink *devlink,
628
+
struct devlink_flash_update_params *params,
629
+
struct netlink_ext_ack *extack)
630
+
{
631
+
struct ixgbe_adapter *adapter = devlink_priv(devlink);
632
+
struct device *dev = &adapter->pdev->dev;
633
+
struct ixgbe_hw *hw = &adapter->hw;
634
+
struct ixgbe_fwu_priv priv;
635
+
u8 preservation;
636
+
int err;
637
+
638
+
if (hw->mac.type != ixgbe_mac_e610)
639
+
return -EOPNOTSUPP;
640
+
641
+
switch (params->overwrite_mask) {
642
+
case 0:
643
+
/* preserve all settings and identifiers */
644
+
preservation = IXGBE_ACI_NVM_PRESERVE_ALL;
645
+
break;
646
+
case DEVLINK_FLASH_OVERWRITE_SETTINGS:
647
+
/* Overwrite settings, but preserve vital information such as
648
+
* device identifiers.
649
+
*/
650
+
preservation = IXGBE_ACI_NVM_PRESERVE_SELECTED;
651
+
break;
652
+
case (DEVLINK_FLASH_OVERWRITE_SETTINGS |
653
+
DEVLINK_FLASH_OVERWRITE_IDENTIFIERS):
654
+
/* overwrite both settings and identifiers, preserve nothing */
655
+
preservation = IXGBE_ACI_NVM_NO_PRESERVATION;
656
+
break;
657
+
default:
658
+
NL_SET_ERR_MSG_MOD(extack,
659
+
"Requested overwrite mask is not supported");
660
+
return -EOPNOTSUPP;
661
+
}
662
+
663
+
/* Cannot get caps in recovery mode, so lack of nvm_unified_update bit
664
+
* cannot lead to error
665
+
*/
666
+
if (!hw->dev_caps.common_cap.nvm_unified_update &&
667
+
(hw->mac.ops.fw_recovery_mode &&
668
+
!hw->mac.ops.fw_recovery_mode(hw))) {
669
+
NL_SET_ERR_MSG_MOD(extack,
670
+
"Current firmware does not support unified update");
671
+
return -EOPNOTSUPP;
672
+
}
673
+
674
+
memset(&priv, 0, sizeof(priv));
675
+
676
+
priv.context.ops = &ixgbe_fwu_ops_e610;
677
+
priv.context.dev = dev;
678
+
priv.extack = extack;
679
+
priv.adapter = adapter;
680
+
priv.activate_flags = preservation;
681
+
682
+
devlink_flash_update_status_notify(devlink,
683
+
"Preparing to flash", NULL, 0, 0);
684
+
685
+
err = ixgbe_cancel_pending_update(adapter, NULL, extack);
686
+
if (err)
687
+
return err;
688
+
689
+
err = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);
690
+
if (err) {
691
+
NL_SET_ERR_MSG_MOD(extack,
692
+
"Failed to acquire device flash lock");
693
+
return -EIO;
694
+
}
695
+
696
+
err = pldmfw_flash_image(&priv.context, params->fw);
697
+
if (err == -ENOENT) {
698
+
NL_SET_ERR_MSG_MOD(extack,
699
+
"Firmware image has no record matching this device");
700
+
} else if (err) {
701
+
NL_SET_ERR_MSG_MOD(extack, "Failed to flash PLDM image");
702
+
}
703
+
704
+
ixgbe_release_nvm(hw);
705
+
706
+
return err;
707
+
}
+12
drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h
+12
drivers/net/ethernet/intel/ixgbe/ixgbe_fw_update.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/* Copyright(c) 2025 Intel Corporation. */
3
+
4
+
#ifndef _IXGBE_FW_UPDATE_H_
5
+
#define _IXGBE_FW_UPDATE_H_
6
+
7
+
int ixgbe_flash_pldm_image(struct devlink *devlink,
8
+
struct devlink_flash_update_params *params,
9
+
struct netlink_ext_ack *extack);
10
+
int ixgbe_get_pending_updates(struct ixgbe_adapter *adapter, u8 *pending,
11
+
struct netlink_ext_ack *extack);
12
+
#endif
+5
-5
drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c
+5
-5
drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c
···
478
478
static int ixgbe_ipsec_check_mgmt_ip(struct xfrm_state *xs)
479
479
{
480
480
struct net_device *dev = xs->xso.real_dev;
481
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
481
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
482
482
struct ixgbe_hw *hw = &adapter->hw;
483
483
u32 mfval, manc, reg;
484
484
int num_filters = 4;
···
563
563
struct netlink_ext_ack *extack)
564
564
{
565
565
struct net_device *dev = xs->xso.real_dev;
566
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
566
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
567
567
struct ixgbe_ipsec *ipsec = adapter->ipsec;
568
568
struct ixgbe_hw *hw = &adapter->hw;
569
569
int checked, match, first;
···
757
757
static void ixgbe_ipsec_del_sa(struct xfrm_state *xs)
758
758
{
759
759
struct net_device *dev = xs->xso.real_dev;
760
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
760
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
761
761
struct ixgbe_ipsec *ipsec = adapter->ipsec;
762
762
struct ixgbe_hw *hw = &adapter->hw;
763
763
u32 zerobuf[4] = {0, 0, 0, 0};
···
1052
1052
struct ixgbe_tx_buffer *first,
1053
1053
struct ixgbe_ipsec_tx_data *itd)
1054
1054
{
1055
-
struct ixgbe_adapter *adapter = netdev_priv(tx_ring->netdev);
1055
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(tx_ring->netdev);
1056
1056
struct ixgbe_ipsec *ipsec = adapter->ipsec;
1057
1057
struct xfrm_state *xs;
1058
1058
struct sec_path *sp;
···
1142
1142
union ixgbe_adv_rx_desc *rx_desc,
1143
1143
struct sk_buff *skb)
1144
1144
{
1145
-
struct ixgbe_adapter *adapter = netdev_priv(rx_ring->netdev);
1145
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(rx_ring->netdev);
1146
1146
__le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1147
1147
__le16 ipsec_pkt_types = cpu_to_le16(IXGBE_RXDADV_PKTTYPE_IPSEC_AH |
1148
1148
IXGBE_RXDADV_PKTTYPE_IPSEC_ESP);
+217
-52
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+217
-52
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
···
49
49
#include "ixgbe_sriov.h"
50
50
#include "ixgbe_model.h"
51
51
#include "ixgbe_txrx_common.h"
52
+
#include "devlink/devlink.h"
52
53
53
54
char ixgbe_driver_name[] = "ixgbe";
54
55
static const char ixgbe_driver_string[] =
···
1096
1095
static int ixgbe_tx_maxrate(struct net_device *netdev,
1097
1096
int queue_index, u32 maxrate)
1098
1097
{
1099
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1098
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1100
1099
struct ixgbe_hw *hw = &adapter->hw;
1101
1100
u32 bcnrc_val = ixgbe_link_mbps(adapter);
1102
1101
···
4679
4678
static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4680
4679
__be16 proto, u16 vid)
4681
4680
{
4682
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
4681
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
4683
4682
struct ixgbe_hw *hw = &adapter->hw;
4684
4683
4685
4684
/* add VID to filter table */
···
4738
4737
static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4739
4738
__be16 proto, u16 vid)
4740
4739
{
4741
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
4740
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
4742
4741
struct ixgbe_hw *hw = &adapter->hw;
4743
4742
4744
4743
/* remove VID from filter table */
···
4963
4962
**/
4964
4963
static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4965
4964
{
4966
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
4965
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
4967
4966
struct ixgbe_hw *hw = &adapter->hw;
4968
4967
4969
4968
if (!netif_running(netdev))
···
5139
5138
5140
5139
static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
5141
5140
{
5142
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
5141
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
5143
5142
int ret;
5144
5143
5145
5144
ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
···
5149
5148
5150
5149
static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
5151
5150
{
5152
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
5151
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
5153
5152
5154
5153
ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
5155
5154
···
5167
5166
**/
5168
5167
void ixgbe_set_rx_mode(struct net_device *netdev)
5169
5168
{
5170
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
5169
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
5171
5170
struct ixgbe_hw *hw = &adapter->hw;
5172
5171
u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
5173
5172
netdev_features_t features = netdev->features;
···
5269
5268
5270
5269
static int ixgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)
5271
5270
{
5272
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
5271
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
5273
5272
struct ixgbe_hw *hw = &adapter->hw;
5274
5273
struct udp_tunnel_info ti;
5275
5274
···
6601
6600
**/
6602
6601
static void ixgbe_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
6603
6602
{
6604
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
6603
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
6605
6604
6606
6605
/* Do the reset outside of interrupt context */
6607
6606
ixgbe_tx_timeout_reset(adapter);
···
6850
6849
adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6851
6850
6852
6851
/* initialize eeprom parameters */
6853
-
if (ixgbe_init_eeprom_params_generic(hw)) {
6852
+
if (hw->eeprom.ops.init_params(hw)) {
6854
6853
e_dev_err("EEPROM initialization failed\n");
6855
6854
return -EIO;
6856
6855
}
···
7166
7165
**/
7167
7166
static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
7168
7167
{
7169
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
7168
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
7170
7169
7171
7170
if (ixgbe_enabled_xdp_adapter(adapter)) {
7172
7171
int new_frame_size = new_mtu + IXGBE_PKT_HDR_PAD;
···
7213
7212
**/
7214
7213
int ixgbe_open(struct net_device *netdev)
7215
7214
{
7216
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
7215
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
7217
7216
struct ixgbe_hw *hw = &adapter->hw;
7218
7217
int err, queues;
7219
7218
···
7317
7316
**/
7318
7317
int ixgbe_close(struct net_device *netdev)
7319
7318
{
7320
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
7319
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
7321
7320
7322
7321
ixgbe_ptp_stop(adapter);
7323
7322
···
8365
8364
rtnl_unlock();
8366
8365
}
8367
8366
8367
+
static int ixgbe_check_fw_api_mismatch(struct ixgbe_adapter *adapter)
8368
+
{
8369
+
struct ixgbe_hw *hw = &adapter->hw;
8370
+
8371
+
if (hw->mac.type != ixgbe_mac_e610)
8372
+
return 0;
8373
+
8374
+
if (hw->mac.ops.get_fw_ver && hw->mac.ops.get_fw_ver(hw))
8375
+
return 0;
8376
+
8377
+
if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) {
8378
+
e_dev_err("The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
8379
+
8380
+
adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH;
8381
+
return -EOPNOTSUPP;
8382
+
} else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR &&
8383
+
hw->api_min_ver > IXGBE_FW_API_VER_MINOR + IXGBE_FW_API_VER_DIFF_ALLOWED) {
8384
+
e_dev_info("The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
8385
+
adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH;
8386
+
} else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR ||
8387
+
hw->api_min_ver < IXGBE_FW_API_VER_MINOR - IXGBE_FW_API_VER_DIFF_ALLOWED) {
8388
+
e_dev_info("The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
8389
+
adapter->flags2 |= IXGBE_FLAG2_API_MISMATCH;
8390
+
}
8391
+
8392
+
return 0;
8393
+
}
8394
+
8368
8395
/**
8369
8396
* ixgbe_check_fw_error - Check firmware for errors
8370
8397
* @adapter: the adapter private structure
···
8403
8374
{
8404
8375
struct ixgbe_hw *hw = &adapter->hw;
8405
8376
u32 fwsm;
8377
+
int err;
8406
8378
8407
8379
/* read fwsm.ext_err_ind register and log errors */
8408
8380
fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
8409
8381
8382
+
/* skip if E610's FW is reloading, warning in that case may be misleading */
8410
8383
if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
8411
-
!(fwsm & IXGBE_FWSM_FW_VAL_BIT))
8384
+
(!(fwsm & IXGBE_FWSM_FW_VAL_BIT) && !(hw->mac.type == ixgbe_mac_e610)))
8412
8385
e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
8413
8386
fwsm);
8414
8387
···
8418
8387
e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
8419
8388
return true;
8420
8389
}
8390
+
if (!(adapter->flags2 & IXGBE_FLAG2_API_MISMATCH)) {
8391
+
err = ixgbe_check_fw_api_mismatch(adapter);
8392
+
if (err)
8393
+
return true;
8394
+
}
8395
+
8396
+
/* return here if FW rollback mode has been already detected */
8397
+
if (adapter->flags2 & IXGBE_FLAG2_FW_ROLLBACK)
8398
+
return false;
8399
+
8400
+
if (hw->mac.ops.fw_rollback_mode && hw->mac.ops.fw_rollback_mode(hw)) {
8401
+
struct ixgbe_nvm_info *nvm_info = &adapter->hw.flash.nvm;
8402
+
char ver_buff[64] = "";
8403
+
8404
+
if (hw->mac.ops.get_fw_ver && hw->mac.ops.get_fw_ver(hw))
8405
+
goto no_version;
8406
+
8407
+
if (hw->mac.ops.get_nvm_ver &&
8408
+
hw->mac.ops.get_nvm_ver(hw, nvm_info))
8409
+
goto no_version;
8410
+
8411
+
snprintf(ver_buff, sizeof(ver_buff),
8412
+
"Current version is NVM:%x.%x.%x, FW:%d.%d. ",
8413
+
nvm_info->major, nvm_info->minor, nvm_info->eetrack,
8414
+
hw->fw_maj_ver, hw->fw_maj_ver);
8415
+
no_version:
8416
+
e_dev_warn("Firmware rollback mode detected. %sDevice may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode.",
8417
+
ver_buff);
8418
+
8419
+
adapter->flags2 |= IXGBE_FLAG2_FW_ROLLBACK;
8420
+
}
8421
8421
8422
8422
return false;
8423
+
}
8424
+
8425
+
static void ixgbe_recovery_service_task(struct work_struct *work)
8426
+
{
8427
+
struct ixgbe_adapter *adapter = container_of(work,
8428
+
struct ixgbe_adapter,
8429
+
service_task);
8430
+
8431
+
ixgbe_handle_fw_event(adapter);
8432
+
ixgbe_service_event_complete(adapter);
8433
+
8434
+
mod_timer(&adapter->service_timer, jiffies + msecs_to_jiffies(100));
8423
8435
}
8424
8436
8425
8437
/**
···
8484
8410
return;
8485
8411
}
8486
8412
if (ixgbe_check_fw_error(adapter)) {
8487
-
if (!test_bit(__IXGBE_DOWN, &adapter->state))
8413
+
if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
8414
+
if (adapter->mii_bus) {
8415
+
mdiobus_unregister(adapter->mii_bus);
8416
+
adapter->mii_bus = NULL;
8417
+
}
8488
8418
unregister_netdev(adapter->netdev);
8419
+
}
8489
8420
ixgbe_service_event_complete(adapter);
8490
8421
return;
8491
8422
}
···
9080
9001
switch (vlan_get_protocol(skb)) {
9081
9002
case htons(ETH_P_FCOE):
9082
9003
case htons(ETH_P_FIP):
9083
-
adapter = netdev_priv(dev);
9004
+
adapter = ixgbe_from_netdev(dev);
9084
9005
9085
9006
if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
9086
9007
break;
···
9339
9260
struct net_device *netdev,
9340
9261
struct ixgbe_ring *ring)
9341
9262
{
9342
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9263
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9343
9264
struct ixgbe_ring *tx_ring;
9344
9265
9345
9266
/*
···
9371
9292
**/
9372
9293
static int ixgbe_set_mac(struct net_device *netdev, void *p)
9373
9294
{
9374
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9295
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9375
9296
struct ixgbe_hw *hw = &adapter->hw;
9376
9297
struct sockaddr *addr = p;
9377
9298
···
9389
9310
static int
9390
9311
ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
9391
9312
{
9392
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9313
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9393
9314
struct ixgbe_hw *hw = &adapter->hw;
9394
9315
u16 value;
9395
9316
int rc;
···
9415
9336
static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
9416
9337
u16 addr, u16 value)
9417
9338
{
9418
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9339
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9419
9340
struct ixgbe_hw *hw = &adapter->hw;
9420
9341
9421
9342
if (adapter->mii_bus) {
···
9435
9356
9436
9357
static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
9437
9358
{
9438
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9359
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9439
9360
9440
9361
switch (cmd) {
9441
9362
case SIOCSHWTSTAMP:
···
9461
9382
static int ixgbe_add_sanmac_netdev(struct net_device *dev)
9462
9383
{
9463
9384
int err = 0;
9464
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
9385
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
9465
9386
struct ixgbe_hw *hw = &adapter->hw;
9466
9387
9467
9388
if (is_valid_ether_addr(hw->mac.san_addr)) {
···
9485
9406
static int ixgbe_del_sanmac_netdev(struct net_device *dev)
9486
9407
{
9487
9408
int err = 0;
9488
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
9409
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
9489
9410
struct ixgbe_mac_info *mac = &adapter->hw.mac;
9490
9411
9491
9412
if (is_valid_ether_addr(mac->san_addr)) {
···
9516
9437
static void ixgbe_get_stats64(struct net_device *netdev,
9517
9438
struct rtnl_link_stats64 *stats)
9518
9439
{
9519
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9440
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9520
9441
int i;
9521
9442
9522
9443
rcu_read_lock();
···
9559
9480
static int ixgbe_ndo_get_vf_stats(struct net_device *netdev, int vf,
9560
9481
struct ifla_vf_stats *vf_stats)
9561
9482
{
9562
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
9483
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
9563
9484
9564
9485
if (vf < 0 || vf >= adapter->num_vfs)
9565
9486
return -EINVAL;
···
9676
9597
9677
9598
static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9678
9599
{
9679
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
9600
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
9680
9601
struct netdev_nested_priv priv = {
9681
9602
.data = (void *)adapter,
9682
9603
};
···
9697
9618
*/
9698
9619
int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9699
9620
{
9700
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
9621
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
9701
9622
struct ixgbe_hw *hw = &adapter->hw;
9702
9623
9703
9624
/* Hardware supports up to 8 traffic classes */
···
10255
10176
static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
10256
10177
void *type_data)
10257
10178
{
10258
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10179
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10259
10180
10260
10181
switch (type) {
10261
10182
case TC_SETUP_BLOCK:
···
10283
10204
#endif
10284
10205
void ixgbe_do_reset(struct net_device *netdev)
10285
10206
{
10286
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
10207
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
10287
10208
10288
10209
if (netif_running(netdev))
10289
10210
ixgbe_reinit_locked(adapter);
···
10294
10215
static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
10295
10216
netdev_features_t features)
10296
10217
{
10297
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
10218
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
10298
10219
10299
10220
/* If Rx checksum is disabled, then RSC/LRO should also be disabled */
10300
10221
if (!(features & NETIF_F_RXCSUM))
···
10331
10252
static int ixgbe_set_features(struct net_device *netdev,
10332
10253
netdev_features_t features)
10333
10254
{
10334
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
10255
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
10335
10256
netdev_features_t changed = netdev->features ^ features;
10336
10257
bool need_reset = false;
10337
10258
···
10407
10328
{
10408
10329
/* guarantee we can provide a unique filter for the unicast address */
10409
10330
if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
10410
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10331
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10411
10332
u16 pool = VMDQ_P(0);
10412
10333
10413
10334
if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
···
10495
10416
struct nlmsghdr *nlh, u16 flags,
10496
10417
struct netlink_ext_ack *extack)
10497
10418
{
10498
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10419
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10499
10420
struct nlattr *attr, *br_spec;
10500
10421
int rem;
10501
10422
···
10523
10444
struct net_device *dev,
10524
10445
u32 filter_mask, int nlflags)
10525
10446
{
10526
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10447
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10527
10448
10528
10449
if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10529
10450
return 0;
···
10535
10456
10536
10457
static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10537
10458
{
10538
-
struct ixgbe_adapter *adapter = netdev_priv(pdev);
10459
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev);
10539
10460
struct ixgbe_fwd_adapter *accel;
10540
10461
int tcs = adapter->hw_tcs ? : 1;
10541
10462
int pool, err;
···
10632
10553
static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10633
10554
{
10634
10555
struct ixgbe_fwd_adapter *accel = priv;
10635
-
struct ixgbe_adapter *adapter = netdev_priv(pdev);
10556
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(pdev);
10636
10557
unsigned int rxbase = accel->rx_base_queue;
10637
10558
unsigned int i;
10638
10559
···
10710
10631
static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10711
10632
{
10712
10633
int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10713
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10634
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10714
10635
struct bpf_prog *old_prog;
10715
10636
bool need_reset;
10716
10637
int num_queues;
···
10782
10703
10783
10704
static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10784
10705
{
10785
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10706
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10786
10707
10787
10708
switch (xdp->command) {
10788
10709
case XDP_SETUP_PROG:
···
10817
10738
static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10818
10739
struct xdp_frame **frames, u32 flags)
10819
10740
{
10820
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
10741
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
10821
10742
struct ixgbe_ring *ring;
10822
10743
int nxmit = 0;
10823
10744
int i;
···
11225
11146
* format to display. The FW version is taken from the EEPROM/NVM.
11226
11147
*
11227
11148
*/
11228
-
static void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter)
11149
+
void ixgbe_set_fw_version_e610(struct ixgbe_adapter *adapter)
11229
11150
{
11230
11151
struct ixgbe_orom_info *orom = &adapter->hw.flash.orom;
11231
11152
struct ixgbe_nvm_info *nvm = &adapter->hw.flash.nvm;
···
11276
11197
}
11277
11198
11278
11199
/**
11200
+
* ixgbe_recovery_probe - Handle FW recovery mode during probe
11201
+
* @adapter: the adapter private structure
11202
+
*
11203
+
* Perform limited driver initialization when FW error is detected.
11204
+
*
11205
+
* Return: 0 on successful probe for E610, -EIO if recovery mode is detected
11206
+
* for non-E610 adapter, error status code on any other case.
11207
+
*/
11208
+
static int ixgbe_recovery_probe(struct ixgbe_adapter *adapter)
11209
+
{
11210
+
struct net_device *netdev = adapter->netdev;
11211
+
struct pci_dev *pdev = adapter->pdev;
11212
+
struct ixgbe_hw *hw = &adapter->hw;
11213
+
bool disable_dev;
11214
+
int err = -EIO;
11215
+
11216
+
if (hw->mac.type != ixgbe_mac_e610)
11217
+
goto clean_up_probe;
11218
+
11219
+
ixgbe_get_hw_control(adapter);
11220
+
mutex_init(&hw->aci.lock);
11221
+
err = ixgbe_get_flash_data(&adapter->hw);
11222
+
if (err)
11223
+
goto shutdown_aci;
11224
+
11225
+
timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
11226
+
INIT_WORK(&adapter->service_task, ixgbe_recovery_service_task);
11227
+
set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
11228
+
clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
11229
+
11230
+
if (hw->mac.ops.get_bus_info)
11231
+
hw->mac.ops.get_bus_info(hw);
11232
+
11233
+
pci_set_drvdata(pdev, adapter);
11234
+
/* We are creating devlink interface so NIC can be managed,
11235
+
* e.g. new NVM image loaded
11236
+
*/
11237
+
devl_lock(adapter->devlink);
11238
+
ixgbe_devlink_register_port(adapter);
11239
+
SET_NETDEV_DEVLINK_PORT(adapter->netdev,
11240
+
&adapter->devlink_port);
11241
+
devl_register(adapter->devlink);
11242
+
devl_unlock(adapter->devlink);
11243
+
11244
+
return 0;
11245
+
shutdown_aci:
11246
+
mutex_destroy(&adapter->hw.aci.lock);
11247
+
ixgbe_release_hw_control(adapter);
11248
+
devlink_free(adapter->devlink);
11249
+
clean_up_probe:
11250
+
disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11251
+
free_netdev(netdev);
11252
+
pci_release_mem_regions(pdev);
11253
+
if (disable_dev)
11254
+
pci_disable_device(pdev);
11255
+
return err;
11256
+
}
11257
+
11258
+
/**
11279
11259
* ixgbe_probe - Device Initialization Routine
11280
11260
* @pdev: PCI device information struct
11281
11261
* @ent: entry in ixgbe_pci_tbl
···
11348
11210
static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
11349
11211
{
11350
11212
struct net_device *netdev;
11213
+
struct ixgbe_netdevice_priv *netdev_priv_wrapper;
11351
11214
struct ixgbe_adapter *adapter = NULL;
11352
11215
struct ixgbe_hw *hw;
11353
11216
const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
···
11402
11263
indices = IXGBE_MAX_RSS_INDICES_X550;
11403
11264
}
11404
11265
11405
-
netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
11266
+
adapter = ixgbe_allocate_devlink(&pdev->dev);
11267
+
if (IS_ERR(adapter)) {
11268
+
err = PTR_ERR(adapter);
11269
+
goto err_devlink;
11270
+
}
11271
+
11272
+
netdev = alloc_etherdev_mq(sizeof(*netdev_priv_wrapper), indices);
11406
11273
if (!netdev) {
11407
11274
err = -ENOMEM;
11408
11275
goto err_alloc_etherdev;
···
11416
11271
11417
11272
SET_NETDEV_DEV(netdev, &pdev->dev);
11418
11273
11419
-
adapter = netdev_priv(netdev);
11274
+
netdev_priv_wrapper = netdev_priv(netdev);
11275
+
netdev_priv_wrapper->adapter = adapter;
11420
11276
11421
11277
adapter->netdev = netdev;
11422
11278
adapter->pdev = pdev;
···
11472
11326
if (err)
11473
11327
goto err_sw_init;
11474
11328
11329
+
/* Make sure the SWFW semaphore is in a valid state */
11330
+
if (hw->mac.ops.init_swfw_sync)
11331
+
hw->mac.ops.init_swfw_sync(hw);
11332
+
11333
+
if (ixgbe_check_fw_error(adapter))
11334
+
return ixgbe_recovery_probe(adapter);
11335
+
11475
11336
if (adapter->hw.mac.type == ixgbe_mac_e610) {
11476
11337
err = ixgbe_get_caps(&adapter->hw);
11477
11338
if (err)
11478
11339
dev_err(&pdev->dev, "ixgbe_get_caps failed %d\n", err);
11340
+
11341
+
err = ixgbe_get_flash_data(&adapter->hw);
11342
+
if (err)
11343
+
goto err_sw_init;
11479
11344
}
11480
11345
11481
11346
if (adapter->hw.mac.type == ixgbe_mac_82599EB)
···
11504
11347
default:
11505
11348
break;
11506
11349
}
11507
-
11508
-
/* Make sure the SWFW semaphore is in a valid state */
11509
-
if (hw->mac.ops.init_swfw_sync)
11510
-
hw->mac.ops.init_swfw_sync(hw);
11511
11350
11512
11351
/* Make it possible the adapter to be woken up via WOL */
11513
11352
switch (adapter->hw.mac.type) {
···
11657
11504
if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
11658
11505
netdev->features |= NETIF_F_LRO;
11659
11506
11660
-
if (ixgbe_check_fw_error(adapter)) {
11661
-
err = -EIO;
11662
-
goto err_sw_init;
11663
-
}
11664
-
11665
11507
/* make sure the EEPROM is good */
11666
11508
if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
11667
11509
e_dev_err("The EEPROM Checksum Is Not Valid\n");
···
11739
11591
if (expected_gts > 0)
11740
11592
ixgbe_check_minimum_link(adapter, expected_gts);
11741
11593
11742
-
err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11594
+
err = hw->eeprom.ops.read_pba_string(hw, part_str, sizeof(part_str));
11743
11595
if (err)
11744
11596
strscpy(part_str, "Unknown", sizeof(part_str));
11745
11597
if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
···
11765
11617
}
11766
11618
strcpy(netdev->name, "eth%d");
11767
11619
pci_set_drvdata(pdev, adapter);
11620
+
11621
+
devl_lock(adapter->devlink);
11622
+
ixgbe_devlink_register_port(adapter);
11623
+
SET_NETDEV_DEVLINK_PORT(adapter->netdev, &adapter->devlink_port);
11624
+
11768
11625
err = register_netdev(netdev);
11769
11626
if (err)
11770
11627
goto err_register;
···
11824
11671
if (err)
11825
11672
goto err_netdev;
11826
11673
11674
+
devl_register(adapter->devlink);
11675
+
devl_unlock(adapter->devlink);
11827
11676
return 0;
11828
11677
11829
11678
err_netdev:
11830
11679
unregister_netdev(netdev);
11831
11680
err_register:
11681
+
devl_port_unregister(&adapter->devlink_port);
11682
+
devl_unlock(adapter->devlink);
11832
11683
ixgbe_release_hw_control(adapter);
11833
11684
ixgbe_clear_interrupt_scheme(adapter);
11834
11685
if (hw->mac.type == ixgbe_mac_e610)
···
11849
11692
disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11850
11693
free_netdev(netdev);
11851
11694
err_alloc_etherdev:
11695
+
devlink_free(adapter->devlink);
11852
11696
pci_release_mem_regions(pdev);
11697
+
err_devlink:
11853
11698
err_pci_reg:
11854
11699
err_dma:
11855
11700
if (!adapter || disable_dev)
···
11880
11721
return;
11881
11722
11882
11723
netdev = adapter->netdev;
11724
+
devl_lock(adapter->devlink);
11725
+
devl_unregister(adapter->devlink);
11883
11726
ixgbe_dbg_adapter_exit(adapter);
11884
11727
11885
11728
set_bit(__IXGBE_REMOVING, &adapter->state);
···
11916
11755
#endif
11917
11756
if (netdev->reg_state == NETREG_REGISTERED)
11918
11757
unregister_netdev(netdev);
11758
+
11759
+
devl_port_unregister(&adapter->devlink_port);
11760
+
devl_unlock(adapter->devlink);
11761
+
devlink_free(adapter->devlink);
11919
11762
11920
11763
ixgbe_stop_ipsec_offload(adapter);
11921
11764
ixgbe_clear_interrupt_scheme(adapter);
+8
-8
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
+8
-8
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
···
1418
1418
1419
1419
int ixgbe_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1420
1420
{
1421
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1421
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1422
1422
int retval;
1423
1423
1424
1424
if (vf >= adapter->num_vfs)
···
1526
1526
u8 qos, __be16 vlan_proto)
1527
1527
{
1528
1528
int err = 0;
1529
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1529
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1530
1530
1531
1531
if ((vf >= adapter->num_vfs) || (vlan > 4095) || (qos > 7))
1532
1532
return -EINVAL;
···
1644
1644
int ixgbe_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
1645
1645
int max_tx_rate)
1646
1646
{
1647
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1647
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1648
1648
int link_speed;
1649
1649
1650
1650
/* verify VF is active */
···
1679
1679
1680
1680
int ixgbe_ndo_set_vf_spoofchk(struct net_device *netdev, int vf, bool setting)
1681
1681
{
1682
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1682
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1683
1683
struct ixgbe_hw *hw = &adapter->hw;
1684
1684
1685
1685
if (vf >= adapter->num_vfs)
···
1757
1757
**/
1758
1758
int ixgbe_ndo_set_vf_link_state(struct net_device *netdev, int vf, int state)
1759
1759
{
1760
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1760
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1761
1761
int ret = 0;
1762
1762
1763
1763
if (vf < 0 || vf >= adapter->num_vfs) {
···
1794
1794
int ixgbe_ndo_set_vf_rss_query_en(struct net_device *netdev, int vf,
1795
1795
bool setting)
1796
1796
{
1797
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1797
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1798
1798
1799
1799
/* This operation is currently supported only for 82599 and x540
1800
1800
* devices.
···
1813
1813
1814
1814
int ixgbe_ndo_set_vf_trust(struct net_device *netdev, int vf, bool setting)
1815
1815
{
1816
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1816
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1817
1817
1818
1818
if (vf >= adapter->num_vfs)
1819
1819
return -EINVAL;
···
1836
1836
int ixgbe_ndo_get_vf_config(struct net_device *netdev,
1837
1837
int vf, struct ifla_vf_info *ivi)
1838
1838
{
1839
-
struct ixgbe_adapter *adapter = netdev_priv(netdev);
1839
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev);
1840
1840
if (vf >= adapter->num_vfs)
1841
1841
return -EINVAL;
1842
1842
ivi->vf = vf;
+5
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+5
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
···
3446
3446
int (*validate_checksum)(struct ixgbe_hw *, u16 *);
3447
3447
int (*update_checksum)(struct ixgbe_hw *);
3448
3448
int (*calc_checksum)(struct ixgbe_hw *);
3449
+
int (*read_pba_string)(struct ixgbe_hw *hw, u8 *pba_num,
3450
+
u32 pba_num_size);
3449
3451
};
3450
3452
3451
3453
struct ixgbe_mac_operations {
···
3456
3454
int (*start_hw)(struct ixgbe_hw *);
3457
3455
int (*clear_hw_cntrs)(struct ixgbe_hw *);
3458
3456
enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
3457
+
int (*get_fw_ver)(struct ixgbe_hw *hw);
3459
3458
int (*get_mac_addr)(struct ixgbe_hw *, u8 *);
3460
3459
int (*get_san_mac_addr)(struct ixgbe_hw *, u8 *);
3461
3460
int (*get_device_caps)(struct ixgbe_hw *, u16 *);
···
3525
3522
int (*get_thermal_sensor_data)(struct ixgbe_hw *);
3526
3523
int (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);
3527
3524
bool (*fw_recovery_mode)(struct ixgbe_hw *hw);
3525
+
bool (*fw_rollback_mode)(struct ixgbe_hw *hw);
3526
+
int (*get_nvm_ver)(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);
3528
3527
void (*disable_rx)(struct ixgbe_hw *hw);
3529
3528
void (*enable_rx)(struct ixgbe_hw *hw);
3530
3529
void (*set_source_address_pruning)(struct ixgbe_hw *, bool,
+160
-1
drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h
+160
-1
drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h
···
10
10
#define IXGBE_MAX_VSI 768
11
11
12
12
/* Checksum and Shadow RAM pointers */
13
-
#define E610_SR_SW_CHECKSUM_WORD 0x3F
13
+
#define IXGBE_E610_SR_NVM_CTRL_WORD 0x00
14
+
#define IXGBE_E610_SR_PBA_BLOCK_PTR 0x16
15
+
#define IXGBE_E610_SR_PBA_BLOCK_MASK GENMASK(15, 8)
16
+
#define IXGBE_E610_SR_NVM_DEV_STARTER_VER 0x18
17
+
#define IXGBE_E610_SR_NVM_EETRACK_LO 0x2D
18
+
#define IXGBE_E610_SR_NVM_EETRACK_HI 0x2E
19
+
#define IXGBE_E610_NVM_VER_LO_MASK GENMASK(7, 0)
20
+
#define IXGBE_E610_NVM_VER_HI_MASK GENMASK(15, 12)
21
+
#define IXGBE_E610_SR_SW_CHECKSUM_WORD 0x3F
22
+
#define IXGBE_E610_SR_PFA_PTR 0x40
23
+
#define IXGBE_E610_SR_1ST_NVM_BANK_PTR 0x42
24
+
#define IXGBE_E610_SR_NVM_BANK_SIZE 0x43
25
+
#define IXGBE_E610_SR_1ST_OROM_BANK_PTR 0x44
26
+
#define IXGBE_E610_SR_OROM_BANK_SIZE 0x45
27
+
#define IXGBE_E610_SR_NETLIST_BANK_PTR 0x46
28
+
#define IXGBE_E610_SR_NETLIST_BANK_SIZE 0x47
29
+
30
+
/* The OROM version topology */
31
+
#define IXGBE_OROM_VER_PATCH_MASK GENMASK_ULL(7, 0)
32
+
#define IXGBE_OROM_VER_BUILD_MASK GENMASK_ULL(23, 8)
33
+
#define IXGBE_OROM_VER_MASK GENMASK_ULL(31, 24)
34
+
35
+
/* CSS Header words */
36
+
#define IXGBE_NVM_CSS_HDR_LEN_L 0x02
37
+
#define IXGBE_NVM_CSS_HDR_LEN_H 0x03
38
+
#define IXGBE_NVM_CSS_SREV_L 0x14
39
+
#define IXGBE_NVM_CSS_SREV_H 0x15
40
+
41
+
#define IXGBE_HDR_LEN_ROUNDUP 32
42
+
43
+
/* Length of Authentication header section in words */
44
+
#define IXGBE_NVM_AUTH_HEADER_LEN 0x08
14
45
15
46
/* Shadow RAM related */
16
47
#define IXGBE_SR_WORDS_IN_1KB 512
48
+
49
+
/* The Netlist ID Block is located after all of the Link Topology nodes. */
50
+
#define IXGBE_NETLIST_ID_BLK_SIZE 0x30
51
+
#define IXGBE_NETLIST_ID_BLK_OFFSET(n) IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0004 + 2 * (n))
52
+
53
+
/* netlist ID block field offsets (word offsets) */
54
+
#define IXGBE_NETLIST_ID_BLK_MAJOR_VER_LOW 0x02
55
+
#define IXGBE_NETLIST_ID_BLK_MAJOR_VER_HIGH 0x03
56
+
#define IXGBE_NETLIST_ID_BLK_MINOR_VER_LOW 0x04
57
+
#define IXGBE_NETLIST_ID_BLK_MINOR_VER_HIGH 0x05
58
+
#define IXGBE_NETLIST_ID_BLK_TYPE_LOW 0x06
59
+
#define IXGBE_NETLIST_ID_BLK_TYPE_HIGH 0x07
60
+
#define IXGBE_NETLIST_ID_BLK_REV_LOW 0x08
61
+
#define IXGBE_NETLIST_ID_BLK_REV_HIGH 0x09
62
+
#define IXGBE_NETLIST_ID_BLK_SHA_HASH_WORD(n) (0x0A + (n))
63
+
#define IXGBE_NETLIST_ID_BLK_CUST_VER 0x2F
64
+
65
+
/* The Link Topology Netlist section is stored as a series of words. It is
66
+
* stored in the NVM as a TLV, with the first two words containing the type
67
+
* and length.
68
+
*/
69
+
#define IXGBE_NETLIST_LINK_TOPO_MOD_ID 0x011B
70
+
#define IXGBE_NETLIST_TYPE_OFFSET 0x0000
71
+
#define IXGBE_NETLIST_LEN_OFFSET 0x0001
72
+
73
+
/* The Link Topology section follows the TLV header. When reading the netlist
74
+
* using ixgbe_read_netlist_module, we need to account for the 2-word TLV
75
+
* header.
76
+
*/
77
+
#define IXGBE_NETLIST_LINK_TOPO_OFFSET(n) ((n) + 2)
78
+
#define IXGBE_LINK_TOPO_MODULE_LEN IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0000)
79
+
#define IXGBE_LINK_TOPO_NODE_COUNT IXGBE_NETLIST_LINK_TOPO_OFFSET(0x0001)
80
+
#define IXGBE_LINK_TOPO_NODE_COUNT_M GENMASK_ULL(9, 0)
17
81
18
82
/* Firmware Status Register (GL_FWSTS) */
19
83
#define GL_FWSTS 0x00083048 /* Reset Source: POR */
···
88
24
#define GLNVM_GENS 0x000B6100 /* Reset Source: POR */
89
25
#define GLNVM_GENS_SR_SIZE_M GENMASK(7, 5)
90
26
27
+
#define IXGBE_GL_MNG_FWSM 0x000B6134 /* Reset Source: POR */
28
+
#define IXGBE_GL_MNG_FWSM_RECOVERY_M BIT(1)
29
+
#define IXGBE_GL_MNG_FWSM_ROLLBACK_M BIT(2)
30
+
91
31
/* Flash Access Register */
92
32
#define IXGBE_GLNVM_FLA 0x000B6108 /* Reset Source: POR */
93
33
#define IXGBE_GLNVM_FLA_LOCKED_S 6
94
34
#define IXGBE_GLNVM_FLA_LOCKED_M BIT(6)
35
+
36
+
/* Auxiliary field, mask and shift definition for Shadow RAM and NVM Flash */
37
+
#define IXGBE_SR_CTRL_WORD_1_M GENMASK(7, 6)
38
+
#define IXGBE_SR_CTRL_WORD_VALID BIT(0)
39
+
#define IXGBE_SR_CTRL_WORD_OROM_BANK BIT(3)
40
+
#define IXGBE_SR_CTRL_WORD_NETLIST_BANK BIT(4)
41
+
#define IXGBE_SR_CTRL_WORD_NVM_BANK BIT(5)
42
+
#define IXGBE_SR_NVM_PTR_4KB_UNITS BIT(15)
95
43
96
44
/* Admin Command Interface (ACI) registers */
97
45
#define IXGBE_PF_HIDA(_i) (0x00085000 + ((_i) * 4))
···
115
39
#define IXGBE_PF_HICR_C BIT(1)
116
40
#define IXGBE_PF_HICR_SV BIT(2)
117
41
#define IXGBE_PF_HICR_EV BIT(3)
42
+
43
+
#define IXGBE_FW_API_VER_MAJOR 0x01
44
+
#define IXGBE_FW_API_VER_MINOR 0x07
45
+
#define IXGBE_FW_API_VER_DIFF_ALLOWED 0x02
118
46
119
47
#define IXGBE_ACI_DESC_SIZE 32
120
48
#define IXGBE_ACI_DESC_SIZE_IN_DWORDS (IXGBE_ACI_DESC_SIZE / BYTES_PER_DWORD)
···
841
761
#define IXGBE_ACI_NVM_MAX_OFFSET 0xFFFFFF
842
762
__le16 offset_low;
843
763
u8 offset_high; /* For Write Activate offset_high is used as flags2 */
764
+
#define IXGBE_ACI_NVM_OFFSET_HI_A_MASK GENMASK(15, 8)
765
+
#define IXGBE_ACI_NVM_OFFSET_HI_U_MASK GENMASK(23, 16)
844
766
u8 cmd_flags;
845
767
#define IXGBE_ACI_NVM_LAST_CMD BIT(0)
846
768
#define IXGBE_ACI_NVM_PCIR_REQ BIT(0) /* Used by NVM Write reply */
···
858
776
#define IXGBE_ACI_NVM_PERST_FLAG 1
859
777
#define IXGBE_ACI_NVM_EMPR_FLAG 2
860
778
#define IXGBE_ACI_NVM_EMPR_ENA BIT(0) /* Write Activate reply only */
779
+
#define IXGBE_ACI_NVM_NO_PRESERVATION 0x0
780
+
#define IXGBE_ACI_NVM_PRESERVE_SELECTED 0x6
781
+
861
782
/* For Write Activate, several flags are sent as part of a separate
862
783
* flags2 field using a separate byte. For simplicity of the software
863
784
* interface, we pass the flags as a 16 bit value so these flags are
···
889
804
#define IXGBE_ACI_NVM_CHECKSUM_CORRECT 0xBABA
890
805
u8 rsvd2[12];
891
806
};
807
+
808
+
/* Used for NVM Set Package Data command - 0x070A */
809
+
struct ixgbe_aci_cmd_nvm_pkg_data {
810
+
u8 reserved[3];
811
+
u8 cmd_flags;
812
+
#define IXGBE_ACI_NVM_PKG_DELETE BIT(0) /* used for command call */
813
+
814
+
u32 reserved1;
815
+
__le32 addr_high;
816
+
__le32 addr_low;
817
+
};
818
+
819
+
/* Used for Pass Component Table command - 0x070B */
820
+
struct ixgbe_aci_cmd_nvm_pass_comp_tbl {
821
+
u8 component_response; /* Response only */
822
+
#define IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED 0x0
823
+
#define IXGBE_ACI_NVM_PASS_COMP_CAN_MAY_BE_UPDATEABLE 0x1
824
+
#define IXGBE_ACI_NVM_PASS_COMP_CAN_NOT_BE_UPDATED 0x2
825
+
#define IXGBE_ACI_NVM_PASS_COMP_PARTIAL_CHECK 0x3
826
+
u8 component_response_code; /* Response only */
827
+
#define IXGBE_ACI_NVM_PASS_COMP_CAN_BE_UPDATED_CODE 0x0
828
+
#define IXGBE_ACI_NVM_PASS_COMP_STAMP_IDENTICAL_CODE 0x1
829
+
#define IXGBE_ACI_NVM_PASS_COMP_STAMP_LOWER 0x2
830
+
#define IXGBE_ACI_NVM_PASS_COMP_INVALID_STAMP_CODE 0x3
831
+
#define IXGBE_ACI_NVM_PASS_COMP_CONFLICT_CODE 0x4
832
+
#define IXGBE_ACI_NVM_PASS_COMP_PRE_REQ_NOT_MET_CODE 0x5
833
+
#define IXGBE_ACI_NVM_PASS_COMP_NOT_SUPPORTED_CODE 0x6
834
+
#define IXGBE_ACI_NVM_PASS_COMP_CANNOT_DOWNGRADE_CODE 0x7
835
+
#define IXGBE_ACI_NVM_PASS_COMP_INCOMPLETE_IMAGE_CODE 0x8
836
+
#define IXGBE_ACI_NVM_PASS_COMP_VER_STR_IDENTICAL_CODE 0xA
837
+
#define IXGBE_ACI_NVM_PASS_COMP_VER_STR_LOWER_CODE 0xB
838
+
u8 reserved;
839
+
u8 transfer_flag;
840
+
__le32 reserved1;
841
+
__le32 addr_high;
842
+
__le32 addr_low;
843
+
};
844
+
845
+
struct ixgbe_aci_cmd_nvm_comp_tbl {
846
+
__le16 comp_class;
847
+
#define NVM_COMP_CLASS_ALL_FW 0x000A
848
+
849
+
__le16 comp_id;
850
+
#define NVM_COMP_ID_OROM 0x5
851
+
#define NVM_COMP_ID_NVM 0x6
852
+
#define NVM_COMP_ID_NETLIST 0x8
853
+
854
+
u8 comp_class_idx;
855
+
#define FWU_COMP_CLASS_IDX_NOT_USE 0x0
856
+
857
+
__le32 comp_cmp_stamp;
858
+
u8 cvs_type;
859
+
#define NVM_CVS_TYPE_ASCII 0x1
860
+
861
+
u8 cvs_len;
862
+
u8 cvs[]; /* Component Version String */
863
+
} __packed;
892
864
893
865
/**
894
866
* struct ixgbe_aci_desc - Admin Command (AC) descriptor
···
990
848
struct ixgbe_aci_cmd_sff_eeprom read_write_sff_param;
991
849
struct ixgbe_aci_cmd_nvm nvm;
992
850
struct ixgbe_aci_cmd_nvm_checksum nvm_checksum;
851
+
struct ixgbe_aci_cmd_nvm_pkg_data pkg_data;
852
+
struct ixgbe_aci_cmd_nvm_pass_comp_tbl pass_comp_tbl;
993
853
} params;
994
854
};
995
855
···
1128
984
#define IXGBE_EXT_TOPO_DEV_IMG_PROG_EN BIT(1)
1129
985
} __packed;
1130
986
987
+
#define IXGBE_OROM_CIV_SIGNATURE "$CIV"
988
+
989
+
struct ixgbe_orom_civd_info {
990
+
u8 signature[4]; /* Must match ASCII '$CIV' characters */
991
+
u8 checksum; /* Simple modulo 256 sum of all structure bytes must equal 0 */
992
+
__le32 combo_ver; /* Combo Image Version number */
993
+
u8 combo_name_len; /* Length of the unicode combo image version string, max of 32 */
994
+
__le16 combo_name[32]; /* Unicode string representing the Combo Image version */
995
+
};
996
+
1131
997
/* Function specific capabilities */
1132
998
struct ixgbe_hw_func_caps {
1133
999
u32 num_allocd_vfs; /* Number of allocated VFs */
···
1167
1013
struct ixgbe_aci_info {
1168
1014
struct mutex lock; /* admin command interface lock */
1169
1015
enum ixgbe_aci_err last_status; /* last status of sent admin command */
1016
+
};
1017
+
1018
+
enum ixgbe_bank_select {
1019
+
IXGBE_ACTIVE_FLASH_BANK,
1020
+
IXGBE_INACTIVE_FLASH_BANK,
1170
1021
};
1171
1022
1172
1023
/* Option ROM version information */
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_x540.c
···
894
894
.calc_checksum = &ixgbe_calc_eeprom_checksum_X540,
895
895
.validate_checksum = &ixgbe_validate_eeprom_checksum_X540,
896
896
.update_checksum = &ixgbe_update_eeprom_checksum_X540,
897
+
.read_pba_string = &ixgbe_read_pba_string_generic,
897
898
};
898
899
899
900
static const struct ixgbe_phy_operations phy_ops_X540 = {
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c
+1
drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c
···
3959
3959
.validate_checksum = &ixgbe_validate_eeprom_checksum_X550, \
3960
3960
.update_checksum = &ixgbe_update_eeprom_checksum_X550, \
3961
3961
.calc_checksum = &ixgbe_calc_eeprom_checksum_X550, \
3962
+
.read_pba_string = &ixgbe_read_pba_string_generic, \
3962
3963
3963
3964
static const struct ixgbe_eeprom_operations eeprom_ops_X550 = {
3964
3965
X550_COMMON_EEP
+1
-1
drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c
+1
-1
drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c
···
508
508
509
509
int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
510
510
{
511
-
struct ixgbe_adapter *adapter = netdev_priv(dev);
511
+
struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev);
512
512
struct ixgbe_ring *ring;
513
513
514
514
if (test_bit(__IXGBE_DOWN, &adapter->state))