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clk: qcom: ipq-cmn-pll: Add IPQ8074 SoC support

The CMN PLL in IPQ8074 SoC supplies fixed clocks to the networking
subsystem: bias_pll_cc_clk at 300 MHz and bias_pll_nss_noc_clk at
416.5 MHz.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20260311183942.10134-5-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

John Crispin and committed by
Bjorn Andersson
4e36f8ab 7156c650

+8
+8
drivers/clk/qcom/ipq-cmn-pll.c
··· 53 53 #include <dt-bindings/clock/qcom,ipq5018-cmn-pll.h> 54 54 #include <dt-bindings/clock/qcom,ipq5424-cmn-pll.h> 55 55 #include <dt-bindings/clock/qcom,ipq6018-cmn-pll.h> 56 + #include <dt-bindings/clock/qcom,ipq8074-cmn-pll.h> 56 57 57 58 #define CMN_PLL_REFCLK_SRC_SELECTION 0x28 58 59 #define CMN_PLL_REFCLK_SRC_DIV GENMASK(9, 8) ··· 122 121 static const struct cmn_pll_fixed_output_clk ipq6018_output_clks[] = { 123 122 CLK_PLL_OUTPUT(IPQ6018_BIAS_PLL_CC_CLK, "bias_pll_cc_clk", 300000000UL), 124 123 CLK_PLL_OUTPUT(IPQ6018_BIAS_PLL_NSS_NOC_CLK, "bias_pll_nss_noc_clk", 416500000UL), 124 + { /* Sentinel */ } 125 + }; 126 + 127 + static const struct cmn_pll_fixed_output_clk ipq8074_output_clks[] = { 128 + CLK_PLL_OUTPUT(IPQ8074_BIAS_PLL_CC_CLK, "bias_pll_cc_clk", 300000000UL), 129 + CLK_PLL_OUTPUT(IPQ8074_BIAS_PLL_NSS_NOC_CLK, "bias_pll_nss_noc_clk", 416500000UL), 125 130 { /* Sentinel */ } 126 131 }; 127 132 ··· 463 456 { .compatible = "qcom,ipq5018-cmn-pll", .data = &ipq5018_output_clks }, 464 457 { .compatible = "qcom,ipq5424-cmn-pll", .data = &ipq5424_output_clks }, 465 458 { .compatible = "qcom,ipq6018-cmn-pll", .data = &ipq6018_output_clks }, 459 + { .compatible = "qcom,ipq8074-cmn-pll", .data = &ipq8074_output_clks }, 466 460 { .compatible = "qcom,ipq9574-cmn-pll", .data = &ipq9574_output_clks }, 467 461 { } 468 462 };