Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2019-04-26' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie:
"Regular drm fixes, nothing too outstanding, I'm guessing Easter was
slowing people down.
i915:
- FEC enable fix
- BXT display lanes fix
ttm:
- fix reinit for reloading drivers regression
imx:
- DP CSC fix
sun4i:
- module unload/load fix
vc4:
- memory leak fix
- compile fix
dw-hdmi:
- rockchip scdc overflow fix
sched:
- docs fix
vmwgfx:
- dma api layering fix"
* tag 'drm-fixes-2019-04-26' of git://anongit.freedesktop.org/drm/drm:
drm/bridge: dw-hdmi: fix SCDC configuration for ddc-i2c-bus
drm/vmwgfx: Fix dma API layer violation
drm/vc4: Fix compilation error reported by kbuild test bot
drm/sun4i: Unbind components before releasing DRM and memory
drm/vc4: Fix memory leak during gpu reset.
drm/sched: Fix description of drm_sched_stop
drm/imx: don't skip DP channel disable for background plane
gpu: ipu-v3: dp: fix CSC handling
drm/ttm: fix re-init of global structures
drm/sun4i: Fix component unbinding and component master deletion
drm/sun4i: Set device driver data at bind time for use in unbind
drm/sun4i: Add missing drm_atomic_helper_shutdown at driver unbind
drm/i915: Restore correct bxt_ddi_phy_calc_lane_lat_optim_mask() calculation
drm/i915: Do not enable FEC without DSC
drm: bridge: dw-hdmi: Fix overflow workaround for Rockchip SoCs
+53
-52
+12
-4
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+12
-4
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
···
1046
1046
if (hdmi->version < 0x200a)
1047
1047
return false;
1048
1048
1049
+
/* Disable if no DDC bus */
1050
+
if (!hdmi->ddc)
1051
+
return false;
1052
+
1049
1053
/* Disable if SCDC is not supported, or if an HF-VSDB block is absent */
1050
1054
if (!display->hdmi.scdc.supported ||
1051
1055
!display->hdmi.scdc.scrambling.supported)
···
1688
1684
* Source Devices compliant shall set the
1689
1685
* Source Version = 1.
1690
1686
*/
1691
-
drm_scdc_readb(&hdmi->i2c->adap, SCDC_SINK_VERSION,
1687
+
drm_scdc_readb(hdmi->ddc, SCDC_SINK_VERSION,
1692
1688
&bytes);
1693
-
drm_scdc_writeb(&hdmi->i2c->adap, SCDC_SOURCE_VERSION,
1689
+
drm_scdc_writeb(hdmi->ddc, SCDC_SOURCE_VERSION,
1694
1690
min_t(u8, bytes, SCDC_MIN_SOURCE_VERSION));
1695
1691
1696
1692
/* Enabled Scrambling in the Sink */
1697
-
drm_scdc_set_scrambling(&hdmi->i2c->adap, 1);
1693
+
drm_scdc_set_scrambling(hdmi->ddc, 1);
1698
1694
1699
1695
/*
1700
1696
* To activate the scrambler feature, you must ensure
···
1710
1706
hdmi_writeb(hdmi, 0, HDMI_FC_SCRAMBLER_CTRL);
1711
1707
hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ,
1712
1708
HDMI_MC_SWRSTZ);
1713
-
drm_scdc_set_scrambling(&hdmi->i2c->adap, 0);
1709
+
drm_scdc_set_scrambling(hdmi->ddc, 0);
1714
1710
}
1715
1711
}
1716
1712
···
1804
1800
* iteration for others.
1805
1801
* The Amlogic Meson GX SoCs (v2.01a) have been identified as needing
1806
1802
* the workaround with a single iteration.
1803
+
* The Rockchip RK3288 SoC (v2.00a) and RK3328/RK3399 SoCs (v2.11a) have
1804
+
* been identified as needing the workaround with a single iteration.
1807
1805
*/
1808
1806
1809
1807
switch (hdmi->version) {
···
1814
1808
break;
1815
1809
case 0x131a:
1816
1810
case 0x132a:
1811
+
case 0x200a:
1817
1812
case 0x201a:
1813
+
case 0x211a:
1818
1814
case 0x212a:
1819
1815
count = 1;
1820
1816
break;
+4
-2
drivers/gpu/drm/i915/intel_ddi.c
+4
-2
drivers/gpu/drm/i915/intel_ddi.c
···
3862
3862
ret = intel_hdmi_compute_config(encoder, pipe_config, conn_state);
3863
3863
else
3864
3864
ret = intel_dp_compute_config(encoder, pipe_config, conn_state);
3865
+
if (ret)
3866
+
return ret;
3865
3867
3866
-
if (IS_GEN9_LP(dev_priv) && ret)
3868
+
if (IS_GEN9_LP(dev_priv))
3867
3869
pipe_config->lane_lat_optim_mask =
3868
3870
bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
3869
3871
3870
3872
intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
3871
3873
3872
-
return ret;
3874
+
return 0;
3873
3875
3874
3876
}
3875
3877
+3
-3
drivers/gpu/drm/i915/intel_dp.c
+3
-3
drivers/gpu/drm/i915/intel_dp.c
···
1886
1886
int pipe_bpp;
1887
1887
int ret;
1888
1888
1889
+
pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
1890
+
intel_dp_supports_fec(intel_dp, pipe_config);
1891
+
1889
1892
if (!intel_dp_supports_dsc(intel_dp, pipe_config))
1890
1893
return -EINVAL;
1891
1894
···
2118
2115
2119
2116
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
2120
2117
return -EINVAL;
2121
-
2122
-
pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
2123
-
intel_dp_supports_fec(intel_dp, pipe_config);
2124
2118
2125
2119
ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
2126
2120
if (ret < 0)
+1
-1
drivers/gpu/drm/imx/ipuv3-crtc.c
+1
-1
drivers/gpu/drm/imx/ipuv3-crtc.c
+1
-2
drivers/gpu/drm/scheduler/sched_main.c
+1
-2
drivers/gpu/drm/scheduler/sched_main.c
···
366
366
EXPORT_SYMBOL(drm_sched_increase_karma);
367
367
368
368
/**
369
-
* drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
369
+
* drm_sched_stop - stop the scheduler
370
370
*
371
371
* @sched: scheduler instance
372
-
* @bad: bad scheduler job
373
372
*
374
373
*/
375
374
void drm_sched_stop(struct drm_gpu_scheduler *sched)
+9
drivers/gpu/drm/sun4i/sun4i_drv.c
+9
drivers/gpu/drm/sun4i/sun4i_drv.c
···
16
16
#include <linux/of_reserved_mem.h>
17
17
18
18
#include <drm/drmP.h>
19
+
#include <drm/drm_atomic_helper.h>
19
20
#include <drm/drm_fb_cma_helper.h>
20
21
#include <drm/drm_fb_helper.h>
21
22
#include <drm/drm_gem_cma_helper.h>
···
86
85
ret = -ENOMEM;
87
86
goto free_drm;
88
87
}
88
+
89
+
dev_set_drvdata(dev, drm);
89
90
drm->dev_private = drv;
90
91
INIT_LIST_HEAD(&drv->frontend_list);
91
92
INIT_LIST_HEAD(&drv->engine_list);
···
147
144
148
145
drm_dev_unregister(drm);
149
146
drm_kms_helper_poll_fini(drm);
147
+
drm_atomic_helper_shutdown(drm);
150
148
drm_mode_config_cleanup(drm);
149
+
150
+
component_unbind_all(dev, NULL);
151
151
of_reserved_mem_device_release(dev);
152
+
152
153
drm_dev_put(drm);
153
154
}
154
155
···
402
395
403
396
static int sun4i_drv_remove(struct platform_device *pdev)
404
397
{
398
+
component_master_del(&pdev->dev, &sun4i_drv_master_ops);
399
+
405
400
return 0;
406
401
}
407
402
+5
-5
drivers/gpu/drm/ttm/ttm_bo.c
+5
-5
drivers/gpu/drm/ttm/ttm_bo.c
···
49
49
* ttm_global_mutex - protecting the global BO state
50
50
*/
51
51
DEFINE_MUTEX(ttm_global_mutex);
52
-
struct ttm_bo_global ttm_bo_glob = {
53
-
.use_count = 0
54
-
};
52
+
unsigned ttm_bo_glob_use_count;
53
+
struct ttm_bo_global ttm_bo_glob;
55
54
56
55
static struct attribute ttm_bo_count = {
57
56
.name = "bo_count",
···
1530
1531
struct ttm_bo_global *glob = &ttm_bo_glob;
1531
1532
1532
1533
mutex_lock(&ttm_global_mutex);
1533
-
if (--glob->use_count > 0)
1534
+
if (--ttm_bo_glob_use_count > 0)
1534
1535
goto out;
1535
1536
1536
1537
kobject_del(&glob->kobj);
1537
1538
kobject_put(&glob->kobj);
1538
1539
ttm_mem_global_release(&ttm_mem_glob);
1540
+
memset(glob, 0, sizeof(*glob));
1539
1541
out:
1540
1542
mutex_unlock(&ttm_global_mutex);
1541
1543
}
···
1548
1548
unsigned i;
1549
1549
1550
1550
mutex_lock(&ttm_global_mutex);
1551
-
if (++glob->use_count > 1)
1551
+
if (++ttm_bo_glob_use_count > 1)
1552
1552
goto out;
1553
1553
1554
1554
ret = ttm_mem_global_init(&ttm_mem_glob);
+3
-2
drivers/gpu/drm/ttm/ttm_memory.c
+3
-2
drivers/gpu/drm/ttm/ttm_memory.c
···
461
461
462
462
void ttm_mem_global_release(struct ttm_mem_global *glob)
463
463
{
464
-
unsigned int i;
465
464
struct ttm_mem_zone *zone;
465
+
unsigned int i;
466
466
467
467
/* let the page allocator first stop the shrink work. */
468
468
ttm_page_alloc_fini();
···
475
475
zone = glob->zones[i];
476
476
kobject_del(&zone->kobj);
477
477
kobject_put(&zone->kobj);
478
-
}
478
+
}
479
479
kobject_del(&glob->kobj);
480
480
kobject_put(&glob->kobj);
481
+
memset(glob, 0, sizeof(*glob));
481
482
}
482
483
483
484
static void ttm_check_swapping(struct ttm_mem_global *glob)
+1
-1
drivers/gpu/drm/vc4/vc4_crtc.c
+1
-1
drivers/gpu/drm/vc4/vc4_crtc.c
···
1042
1042
vc4_crtc_reset(struct drm_crtc *crtc)
1043
1043
{
1044
1044
if (crtc->state)
1045
-
__drm_atomic_helper_crtc_destroy_state(crtc->state);
1045
+
vc4_crtc_destroy_state(crtc, crtc->state);
1046
1046
1047
1047
crtc->state = kzalloc(sizeof(struct vc4_crtc_state), GFP_KERNEL);
1048
1048
if (crtc->state)
+5
-28
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+5
-28
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
···
546
546
}
547
547
548
548
/**
549
-
* vmw_assume_iommu - Figure out whether coherent dma-remapping might be
550
-
* taking place.
551
-
* @dev: Pointer to the struct drm_device.
552
-
*
553
-
* Return: true if iommu present, false otherwise.
554
-
*/
555
-
static bool vmw_assume_iommu(struct drm_device *dev)
556
-
{
557
-
const struct dma_map_ops *ops = get_dma_ops(dev->dev);
558
-
559
-
return !dma_is_direct(ops) && ops &&
560
-
ops->map_page != dma_direct_map_page;
561
-
}
562
-
563
-
/**
564
549
* vmw_dma_select_mode - Determine how DMA mappings should be set up for this
565
550
* system.
566
551
*
567
552
* @dev_priv: Pointer to a struct vmw_private
568
553
*
569
-
* This functions tries to determine the IOMMU setup and what actions
570
-
* need to be taken by the driver to make system pages visible to the
571
-
* device.
554
+
* This functions tries to determine what actions need to be taken by the
555
+
* driver to make system pages visible to the device.
572
556
* If this function decides that DMA is not possible, it returns -EINVAL.
573
557
* The driver may then try to disable features of the device that require
574
558
* DMA.
···
562
578
static const char *names[vmw_dma_map_max] = {
563
579
[vmw_dma_phys] = "Using physical TTM page addresses.",
564
580
[vmw_dma_alloc_coherent] = "Using coherent TTM pages.",
565
-
[vmw_dma_map_populate] = "Keeping DMA mappings.",
581
+
[vmw_dma_map_populate] = "Caching DMA mappings.",
566
582
[vmw_dma_map_bind] = "Giving up DMA mappings early."};
567
583
568
584
if (vmw_force_coherent)
569
585
dev_priv->map_mode = vmw_dma_alloc_coherent;
570
-
else if (vmw_assume_iommu(dev_priv->dev))
571
-
dev_priv->map_mode = vmw_dma_map_populate;
572
-
else if (!vmw_force_iommu)
573
-
dev_priv->map_mode = vmw_dma_phys;
574
-
else if (IS_ENABLED(CONFIG_SWIOTLB) && swiotlb_nr_tbl())
575
-
dev_priv->map_mode = vmw_dma_alloc_coherent;
586
+
else if (vmw_restrict_iommu)
587
+
dev_priv->map_mode = vmw_dma_map_bind;
576
588
else
577
589
dev_priv->map_mode = vmw_dma_map_populate;
578
-
579
-
if (dev_priv->map_mode == vmw_dma_map_populate && vmw_restrict_iommu)
580
-
dev_priv->map_mode = vmw_dma_map_bind;
581
590
582
591
/* No TTM coherent page pool? FIXME: Ask TTM instead! */
583
592
if (!(IS_ENABLED(CONFIG_SWIOTLB) || IS_ENABLED(CONFIG_INTEL_IOMMU)) &&
+9
-3
drivers/gpu/ipu-v3/ipu-dp.c
+9
-3
drivers/gpu/ipu-v3/ipu-dp.c
···
195
195
ipu_dp_csc_init(flow, flow->foreground.in_cs, flow->out_cs,
196
196
DP_COM_CONF_CSC_DEF_BOTH);
197
197
} else {
198
-
if (flow->foreground.in_cs == flow->out_cs)
198
+
if (flow->foreground.in_cs == IPUV3_COLORSPACE_UNKNOWN ||
199
+
flow->foreground.in_cs == flow->out_cs)
199
200
/*
200
201
* foreground identical to output, apply color
201
202
* conversion on background
···
262
261
struct ipu_dp_priv *priv = flow->priv;
263
262
u32 reg, csc;
264
263
264
+
dp->in_cs = IPUV3_COLORSPACE_UNKNOWN;
265
+
265
266
if (!dp->foreground)
266
267
return;
267
268
···
271
268
272
269
reg = readl(flow->base + DP_COM_CONF);
273
270
csc = reg & DP_COM_CONF_CSC_DEF_MASK;
274
-
if (csc == DP_COM_CONF_CSC_DEF_FG)
275
-
reg &= ~DP_COM_CONF_CSC_DEF_MASK;
271
+
reg &= ~DP_COM_CONF_CSC_DEF_MASK;
272
+
if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG)
273
+
reg |= DP_COM_CONF_CSC_DEF_BG;
276
274
277
275
reg &= ~DP_COM_CONF_FG_EN;
278
276
writel(reg, flow->base + DP_COM_CONF);
···
351
347
mutex_init(&priv->mutex);
352
348
353
349
for (i = 0; i < IPUV3_NUM_FLOWS; i++) {
350
+
priv->flow[i].background.in_cs = IPUV3_COLORSPACE_UNKNOWN;
351
+
priv->flow[i].foreground.in_cs = IPUV3_COLORSPACE_UNKNOWN;
354
352
priv->flow[i].foreground.foreground = true;
355
353
priv->flow[i].base = priv->base + ipu_dp_flow_base[i];
356
354
priv->flow[i].priv = priv;