Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"I2C has some driver bugfixes, module autoload fixes, and driver
enablement on some architectures"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: imx: defer probe if bus recovery GPIOs are not ready
i2c: designware: Avoid aborted transfers with fast reacting I2C slaves
i2c: i801: Fix I2C Block Read on 8-Series/C220 and later
i2c: xgene: Avoid dma_buffer overrun
i2c: digicolor: Fix module autoload
i2c: xlr: Fix module autoload for OF registration
i2c: xlp9xx: Fix module autoload
i2c: jz4780: Fix module autoload
i2c: allow configuration of imx driver for ColdFire architecture
i2c: mark device nodes only in case of successful instantiation
i2c: rk3x: Give the tuning value 0 during rk3x_i2c_v0_calc_timings
i2c: hix5hd2: allow build with ARCH_HISI
+57
-18
+6
-6
drivers/i2c/busses/Kconfig
+6
-6
drivers/i2c/busses/Kconfig
···
79
79
80
80
config I2C_HIX5HD2
81
81
tristate "Hix5hd2 high-speed I2C driver"
82
-
depends on ARCH_HIX5HD2 || COMPILE_TEST
82
+
depends on ARCH_HISI || ARCH_HIX5HD2 || COMPILE_TEST
83
83
help
84
-
Say Y here to include support for high-speed I2C controller in the
85
-
Hisilicon based hix5hd2 SoCs.
84
+
Say Y here to include support for the high-speed I2C controller
85
+
used in HiSilicon hix5hd2 SoCs.
86
86
87
-
This driver can also be built as a module. If so, the module
87
+
This driver can also be built as a module. If so, the module
88
88
will be called i2c-hix5hd2.
89
89
90
90
config I2C_I801
···
589
589
590
590
config I2C_IMX
591
591
tristate "IMX I2C interface"
592
-
depends on ARCH_MXC || ARCH_LAYERSCAPE
592
+
depends on ARCH_MXC || ARCH_LAYERSCAPE || COLDFIRE
593
593
help
594
594
Say Y here if you want to use the IIC bus controller on
595
-
the Freescale i.MX/MXC or Layerscape processors.
595
+
the Freescale i.MX/MXC, Layerscape or ColdFire processors.
596
596
597
597
This driver can also be built as a module. If so, the module
598
598
will be called i2c-imx.
+14
-3
drivers/i2c/busses/i2c-designware-core.c
+14
-3
drivers/i2c/busses/i2c-designware-core.c
···
95
95
#define DW_IC_STATUS_TFE BIT(2)
96
96
#define DW_IC_STATUS_MST_ACTIVITY BIT(5)
97
97
98
+
#define DW_IC_SDA_HOLD_RX_SHIFT 16
99
+
#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, DW_IC_SDA_HOLD_RX_SHIFT)
100
+
98
101
#define DW_IC_ERR_TX_ABRT 0x1
99
102
100
103
#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
···
423
420
/* Configure SDA Hold Time if required */
424
421
reg = dw_readl(dev, DW_IC_COMP_VERSION);
425
422
if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
426
-
if (dev->sda_hold_time) {
427
-
dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
428
-
} else {
423
+
if (!dev->sda_hold_time) {
429
424
/* Keep previous hold time setting if no one set it */
430
425
dev->sda_hold_time = dw_readl(dev, DW_IC_SDA_HOLD);
431
426
}
427
+
/*
428
+
* Workaround for avoiding TX arbitration lost in case I2C
429
+
* slave pulls SDA down "too quickly" after falling egde of
430
+
* SCL by enabling non-zero SDA RX hold. Specification says it
431
+
* extends incoming SDA low to high transition while SCL is
432
+
* high but it apprears to help also above issue.
433
+
*/
434
+
if (!(dev->sda_hold_time & DW_IC_SDA_HOLD_RX_MASK))
435
+
dev->sda_hold_time |= 1 << DW_IC_SDA_HOLD_RX_SHIFT;
436
+
dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
432
437
} else {
433
438
dev_warn(dev->dev,
434
439
"Hardware too old to adjust SDA hold time.\n");
+1
drivers/i2c/busses/i2c-digicolor.c
+1
drivers/i2c/busses/i2c-digicolor.c
+13
-3
drivers/i2c/busses/i2c-i801.c
+13
-3
drivers/i2c/busses/i2c-i801.c
···
146
146
#define SMBHSTCFG_HST_EN 1
147
147
#define SMBHSTCFG_SMB_SMI_EN 2
148
148
#define SMBHSTCFG_I2C_EN 4
149
+
#define SMBHSTCFG_SPD_WD 0x10
149
150
150
151
/* TCO configuration bits for TCOCTL */
151
152
#define TCOCTL_EN 0x0100
···
866
865
block = 1;
867
866
break;
868
867
case I2C_SMBUS_I2C_BLOCK_DATA:
869
-
/* NB: page 240 of ICH5 datasheet shows that the R/#W
870
-
* bit should be cleared here, even when reading */
871
-
outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
868
+
/*
869
+
* NB: page 240 of ICH5 datasheet shows that the R/#W
870
+
* bit should be cleared here, even when reading.
871
+
* However if SPD Write Disable is set (Lynx Point and later),
872
+
* the read will fail if we don't set the R/#W bit.
873
+
*/
874
+
outb_p(((addr & 0x7f) << 1) |
875
+
((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ?
876
+
(read_write & 0x01) : 0),
877
+
SMBHSTADD(priv));
872
878
if (read_write == I2C_SMBUS_READ) {
873
879
/* NB: page 240 of ICH5 datasheet also shows
874
880
* that DATA1 is the cmd field when reading */
···
1581
1573
/* Disable SMBus interrupt feature if SMBus using SMI# */
1582
1574
priv->features &= ~FEATURE_IRQ;
1583
1575
}
1576
+
if (temp & SMBHSTCFG_SPD_WD)
1577
+
dev_info(&dev->dev, "SPD Write Disable is set\n");
1584
1578
1585
1579
/* Clear special mode bits */
1586
1580
if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
+7
-4
drivers/i2c/busses/i2c-imx.c
+7
-4
drivers/i2c/busses/i2c-imx.c
···
1009
1009
rinfo->sda_gpio = of_get_named_gpio(pdev->dev.of_node, "sda-gpios", 0);
1010
1010
rinfo->scl_gpio = of_get_named_gpio(pdev->dev.of_node, "scl-gpios", 0);
1011
1011
1012
-
if (!gpio_is_valid(rinfo->sda_gpio) ||
1013
-
!gpio_is_valid(rinfo->scl_gpio) ||
1014
-
IS_ERR(i2c_imx->pinctrl_pins_default) ||
1015
-
IS_ERR(i2c_imx->pinctrl_pins_gpio)) {
1012
+
if (rinfo->sda_gpio == -EPROBE_DEFER ||
1013
+
rinfo->scl_gpio == -EPROBE_DEFER) {
1014
+
return -EPROBE_DEFER;
1015
+
} else if (!gpio_is_valid(rinfo->sda_gpio) ||
1016
+
!gpio_is_valid(rinfo->scl_gpio) ||
1017
+
IS_ERR(i2c_imx->pinctrl_pins_default) ||
1018
+
IS_ERR(i2c_imx->pinctrl_pins_gpio)) {
1016
1019
dev_dbg(&pdev->dev, "recovery information incomplete\n");
1017
1020
return 0;
1018
1021
}
+1
drivers/i2c/busses/i2c-jz4780.c
+1
drivers/i2c/busses/i2c-jz4780.c
+2
drivers/i2c/busses/i2c-rk3x.c
+2
drivers/i2c/busses/i2c-rk3x.c
+1
-1
drivers/i2c/busses/i2c-xgene-slimpro.c
+1
-1
drivers/i2c/busses/i2c-xgene-slimpro.c
+1
drivers/i2c/busses/i2c-xlp9xx.c
+1
drivers/i2c/busses/i2c-xlp9xx.c
+1
drivers/i2c/busses/i2c-xlr.c
+1
drivers/i2c/busses/i2c-xlr.c
+10
-1
drivers/i2c/i2c-core.c
+10
-1
drivers/i2c/i2c-core.c
···
1681
1681
static void of_i2c_register_devices(struct i2c_adapter *adap)
1682
1682
{
1683
1683
struct device_node *bus, *node;
1684
+
struct i2c_client *client;
1684
1685
1685
1686
/* Only register child devices if the adapter has a node pointer set */
1686
1687
if (!adap->dev.of_node)
···
1696
1695
for_each_available_child_of_node(bus, node) {
1697
1696
if (of_node_test_and_set_flag(node, OF_POPULATED))
1698
1697
continue;
1699
-
of_i2c_register_device(adap, node);
1698
+
1699
+
client = of_i2c_register_device(adap, node);
1700
+
if (IS_ERR(client)) {
1701
+
dev_warn(&adap->dev,
1702
+
"Failed to create I2C device for %s\n",
1703
+
node->full_name);
1704
+
of_node_clear_flag(node, OF_POPULATED);
1705
+
}
1700
1706
}
1701
1707
1702
1708
of_node_put(bus);
···
2307
2299
if (IS_ERR(client)) {
2308
2300
dev_err(&adap->dev, "failed to create client for '%s'\n",
2309
2301
rd->dn->full_name);
2302
+
of_node_clear_flag(rd->dn, OF_POPULATED);
2310
2303
return notifier_from_errno(PTR_ERR(client));
2311
2304
}
2312
2305
break;