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dt-bindings: dma: dma40: Prefer to pass sram through phandle

Extend the DMA40 bindings so that we can pass two SRAM
segments as phandles instead of directly referring to the
memory address in the second reg cell. This enables more
granular control over the SRAM, and adds the optiona LCLA
SRAM segment as well.

Deprecate the old way of passing LCPA as a second reg cell,
make sram compulsory.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230417-ux500-dma40-cleanup-v3-1-60bfa6785968@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Linus Walleij and committed by
Vinod Koul 4f080c77 ac9a7868

+28 -8
+28 -8
Documentation/devicetree/bindings/dma/stericsson,dma40.yaml
··· 112 112 - const: stericsson,dma40 113 113 114 114 reg: 115 - items: 116 - - description: DMA40 memory base 117 - - description: LCPA memory base 115 + oneOf: 116 + - items: 117 + - description: DMA40 memory base 118 + - items: 119 + - description: DMA40 memory base 120 + - description: LCPA memory base, deprecated, use eSRAM pool instead 121 + deprecated: true 122 + 118 123 119 124 reg-names: 120 - items: 121 - - const: base 122 - - const: lcpa 125 + oneOf: 126 + - items: 127 + - const: base 128 + - items: 129 + - const: base 130 + - const: lcpa 131 + deprecated: true 123 132 124 133 interrupts: 125 134 maxItems: 1 126 135 127 136 clocks: 128 137 maxItems: 1 138 + 139 + sram: 140 + $ref: /schemas/types.yaml#/definitions/phandle-array 141 + description: A phandle array with inner size 1 (no arg cells). 142 + First phandle is the LCPA (Logical Channel Parameter Address) memory. 143 + Second phandle is the LCLA (Logical Channel Link base Address) memory. 144 + maxItems: 2 145 + items: 146 + maxItems: 1 129 147 130 148 memcpy-channels: 131 149 $ref: /schemas/types.yaml#/definitions/uint32-array ··· 156 138 - reg 157 139 - interrupts 158 140 - clocks 141 + - sram 159 142 - memcpy-channels 160 143 161 144 additionalProperties: false ··· 168 149 #include <dt-bindings/mfd/dbx500-prcmu.h> 169 150 dma-controller@801c0000 { 170 151 compatible = "stericsson,db8500-dma40", "stericsson,dma40"; 171 - reg = <0x801c0000 0x1000>, <0x40010000 0x800>; 172 - reg-names = "base", "lcpa"; 152 + reg = <0x801c0000 0x1000>; 153 + reg-names = "base"; 154 + sram = <&lcpa>, <&lcla>; 173 155 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 174 156 #dma-cells = <3>; 175 157 memcpy-channels = <56 57 58 59 60>;