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drm/amdgpu: Add support for querying the max ibs in a submission. (v3)

This info would be used by radv to figure out when we need to
split a submission into multiple submissions. radv currently has
a limit of 192 which seems to work for most gfx submissions, but
is way too high for e.g. compute or sdma.

Userspace is available at
https://gitlab.freedesktop.org/bnieuwenhuizen/mesa/-/commits/ib-rejection-v3

v3: Completely rewrote based on suggestion of making it a separate query.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2498
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Bas Nieuwenhuizen and committed by
Alex Deucher 4f18b9a6 c30ddcec

+11
+9
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
··· 1140 1140 kfree(caps); 1141 1141 return r; 1142 1142 } 1143 + case AMDGPU_INFO_MAX_IBS: { 1144 + uint32_t max_ibs[AMDGPU_HW_IP_NUM]; 1145 + 1146 + for (i = 0; i < AMDGPU_HW_IP_NUM; ++i) 1147 + max_ibs[i] = amdgpu_ring_max_ibs(i); 1148 + 1149 + return copy_to_user(out, max_ibs, 1150 + min((size_t)size, sizeof(max_ibs))) ? -EFAULT : 0; 1151 + } 1143 1152 default: 1144 1153 DRM_DEBUG_KMS("Invalid request %d\n", info->query); 1145 1154 return -EINVAL;
+2
include/uapi/drm/amdgpu_drm.h
··· 876 876 #define AMDGPU_INFO_VIDEO_CAPS_DECODE 0 877 877 /* Subquery id: Encode */ 878 878 #define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1 879 + /* Query the max number of IBs per gang per submission */ 880 + #define AMDGPU_INFO_MAX_IBS 0x22 879 881 880 882 #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 881 883 #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff