tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'soc-fixes-6.2-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"All the changes this time are minor devicetree corrections, the
majority being for 64-bit Rockchip SoC support. These are a couple of
corrections for properties that are in violation of the binding, some
that put the machine into safer operating points for the eMMC and
thermal settings, and missing properties that prevented rk356x PCIe
and ethernet from working correctly.

The changes for amlogic and mediatek address incorrect properties that
were preventing the display support on MT8195 and the MMC support on
various Meson SoCs from working correctly.

The stihxxx-b2120 change fixes the GPIO polarity for the DVB tuner to
allow this to be used correctly after a futre driver change, though it
has no effect on older kernels"

* tag 'soc-fixes-6.2-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: dts: meson-gx: Make mmc host controller interrupts level-sensitive
arm64: dts: meson-g12-common: Make mmc host controller interrupts level-sensitive
arm64: dts: meson-axg: Make mmc host controller interrupts level-sensitive
ARM: dts: stihxxx-b2120: fix polarity of reset line of tsin0 port
arm64: dts: mediatek: mt8195: Fix vdosys* compatible strings
arm64: dts: rockchip: align rk3399 DMC OPP table with bindings
arm64: dts: rockchip: set sdmmc0 speed to sd-uhs-sdr50 on rock-3a
arm64: dts: rockchip: fix probe of analog sound card on rock-3a
arm64: dts: rockchip: add missing #interrupt-cells to rk356x pcie2x1
arm64: dts: rockchip: fix input enable pinconf on rk3399
ARM: dts: rockchip: add power-domains property to dp node on rk3288
arm64: dts: rockchip: add io domain setting to rk3566-box-demo
arm64: dts: rockchip: remove unsupported property from sdmmc2 for rock-3a
arm64: dts: rockchip: drop unused LED mode property from rk3328-roc-cc
arm64: dts: rockchip: reduce thermal limits on rk3399-pinephone-pro
arm64: dts: rockchip: use correct reset names for rk3399 crypto nodes

Linus Torvalds 4f72a263 8e9a8427

+37 -20
+1
arch/arm/boot/dts/rk3288.dtsi
··· 1181 1181 clock-names = "dp", "pclk"; 1182 1182 phys = <&edp_phy>; 1183 1183 phy-names = "dp"; 1184 + power-domains = <&power RK3288_PD_VIO>; 1184 1185 resets = <&cru SRST_EDP>; 1185 1186 reset-names = "dp"; 1186 1187 rockchip,grf = <&grf>;
+1 -1
arch/arm/boot/dts/stihxxx-b2120.dtsi
··· 178 178 tsin-num = <0>; 179 179 serial-not-parallel; 180 180 i2c-bus = <&ssc2>; 181 - reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>; 181 + reset-gpios = <&pio15 4 GPIO_ACTIVE_LOW>; 182 182 dvb-card = <STV0367_TDA18212_NIMA_1>; 183 183 }; 184 184 };
+2 -2
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
··· 1886 1886 sd_emmc_b: sd@5000 { 1887 1887 compatible = "amlogic,meson-axg-mmc"; 1888 1888 reg = <0x0 0x5000 0x0 0x800>; 1889 - interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 1889 + interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; 1890 1890 status = "disabled"; 1891 1891 clocks = <&clkc CLKID_SD_EMMC_B>, 1892 1892 <&clkc CLKID_SD_EMMC_B_CLK0>, ··· 1898 1898 sd_emmc_c: mmc@7000 { 1899 1899 compatible = "amlogic,meson-axg-mmc"; 1900 1900 reg = <0x0 0x7000 0x0 0x800>; 1901 - interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 1901 + interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; 1902 1902 status = "disabled"; 1903 1903 clocks = <&clkc CLKID_SD_EMMC_C>, 1904 1904 <&clkc CLKID_SD_EMMC_C_CLK0>,
+3 -3
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
··· 2324 2324 sd_emmc_a: sd@ffe03000 { 2325 2325 compatible = "amlogic,meson-axg-mmc"; 2326 2326 reg = <0x0 0xffe03000 0x0 0x800>; 2327 - interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>; 2327 + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 2328 2328 status = "disabled"; 2329 2329 clocks = <&clkc CLKID_SD_EMMC_A>, 2330 2330 <&clkc CLKID_SD_EMMC_A_CLK0>, ··· 2336 2336 sd_emmc_b: sd@ffe05000 { 2337 2337 compatible = "amlogic,meson-axg-mmc"; 2338 2338 reg = <0x0 0xffe05000 0x0 0x800>; 2339 - interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>; 2339 + interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 2340 2340 status = "disabled"; 2341 2341 clocks = <&clkc CLKID_SD_EMMC_B>, 2342 2342 <&clkc CLKID_SD_EMMC_B_CLK0>, ··· 2348 2348 sd_emmc_c: mmc@ffe07000 { 2349 2349 compatible = "amlogic,meson-axg-mmc"; 2350 2350 reg = <0x0 0xffe07000 0x0 0x800>; 2351 - interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>; 2351 + interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 2352 2352 status = "disabled"; 2353 2353 clocks = <&clkc CLKID_SD_EMMC_C>, 2354 2354 <&clkc CLKID_SD_EMMC_C_CLK0>,
+3 -3
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
··· 603 603 sd_emmc_a: mmc@70000 { 604 604 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 605 605 reg = <0x0 0x70000 0x0 0x800>; 606 - interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>; 606 + interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; 607 607 status = "disabled"; 608 608 }; 609 609 610 610 sd_emmc_b: mmc@72000 { 611 611 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 612 612 reg = <0x0 0x72000 0x0 0x800>; 613 - interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 613 + interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>; 614 614 status = "disabled"; 615 615 }; 616 616 617 617 sd_emmc_c: mmc@74000 { 618 618 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; 619 619 reg = <0x0 0x74000 0x0 0x800>; 620 - interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>; 620 + interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; 621 621 status = "disabled"; 622 622 }; 623 623 };
+2 -2
arch/arm64/boot/dts/mediatek/mt8195.dtsi
··· 2146 2146 }; 2147 2147 2148 2148 vdosys0: syscon@1c01a000 { 2149 - compatible = "mediatek,mt8195-mmsys", "syscon"; 2149 + compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon"; 2150 2150 reg = <0 0x1c01a000 0 0x1000>; 2151 2151 mboxes = <&gce0 0 CMDQ_THR_PRIO_4>; 2152 2152 #clock-cells = <1>; ··· 2292 2292 }; 2293 2293 2294 2294 vdosys1: syscon@1c100000 { 2295 - compatible = "mediatek,mt8195-mmsys", "syscon"; 2295 + compatible = "mediatek,mt8195-vdosys1", "syscon"; 2296 2296 reg = <0 0x1c100000 0 0x1000>; 2297 2297 #clock-cells = <1>; 2298 2298 };
-2
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
··· 96 96 linux,default-trigger = "heartbeat"; 97 97 gpios = <&rk805 1 GPIO_ACTIVE_LOW>; 98 98 default-state = "on"; 99 - mode = <0x23>; 100 99 }; 101 100 102 101 user_led: led-1 { ··· 103 104 linux,default-trigger = "mmc1"; 104 105 gpios = <&rk805 0 GPIO_ACTIVE_LOW>; 105 106 default-state = "off"; 106 - mode = <0x05>; 107 107 }; 108 108 }; 109 109 };
+1 -1
arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi
··· 111 111 }; 112 112 }; 113 113 114 - dmc_opp_table: dmc_opp_table { 114 + dmc_opp_table: opp-table-3 { 115 115 compatible = "operating-points-v2"; 116 116 117 117 opp00 {
+7
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
··· 104 104 }; 105 105 }; 106 106 107 + &cpu_alert0 { 108 + temperature = <65000>; 109 + }; 110 + &cpu_alert1 { 111 + temperature = <68000>; 112 + }; 113 + 107 114 &cpu_l0 { 108 115 cpu-supply = <&vdd_cpu_l>; 109 116 };
+2 -4
arch/arm64/boot/dts/rockchip/rk3399.dtsi
··· 589 589 clocks = <&cru HCLK_M_CRYPTO0>, <&cru HCLK_S_CRYPTO0>, <&cru SCLK_CRYPTO0>; 590 590 clock-names = "hclk_master", "hclk_slave", "sclk"; 591 591 resets = <&cru SRST_CRYPTO0>, <&cru SRST_CRYPTO0_S>, <&cru SRST_CRYPTO0_M>; 592 - reset-names = "master", "lave", "crypto"; 592 + reset-names = "master", "slave", "crypto-rst"; 593 593 }; 594 594 595 595 crypto1: crypto@ff8b8000 { ··· 599 599 clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>, <&cru SCLK_CRYPTO1>; 600 600 clock-names = "hclk_master", "hclk_slave", "sclk"; 601 601 resets = <&cru SRST_CRYPTO1>, <&cru SRST_CRYPTO1_S>, <&cru SRST_CRYPTO1_M>; 602 - reset-names = "master", "slave", "crypto"; 602 + reset-names = "master", "slave", "crypto-rst"; 603 603 }; 604 604 605 605 i2c1: i2c@ff110000 { ··· 2241 2241 pcfg_input_pull_up: pcfg-input-pull-up { 2242 2242 input-enable; 2243 2243 bias-pull-up; 2244 - drive-strength = <2>; 2245 2244 }; 2246 2245 2247 2246 pcfg_input_pull_down: pcfg-input-pull-down { 2248 2247 input-enable; 2249 2248 bias-pull-down; 2250 - drive-strength = <2>; 2251 2249 }; 2252 2250 2253 2251 clock {
+11
arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts
··· 353 353 }; 354 354 }; 355 355 356 + &pmu_io_domains { 357 + pmuio2-supply = <&vcc_3v3>; 358 + vccio1-supply = <&vcc_3v3>; 359 + vccio3-supply = <&vcc_3v3>; 360 + vccio4-supply = <&vcca_1v8>; 361 + vccio5-supply = <&vcc_3v3>; 362 + vccio6-supply = <&vcca_1v8>; 363 + vccio7-supply = <&vcc_3v3>; 364 + status = "okay"; 365 + }; 366 + 356 367 &pwm0 { 357 368 status = "okay"; 358 369 };
+3 -2
arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
··· 571 571 }; 572 572 573 573 &i2s1_8ch { 574 + pinctrl-names = "default"; 575 + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; 574 576 rockchip,trcm-sync-tx-only; 575 577 status = "okay"; 576 578 }; ··· 732 730 disable-wp; 733 731 pinctrl-names = "default"; 734 732 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 735 - sd-uhs-sdr104; 733 + sd-uhs-sdr50; 736 734 vmmc-supply = <&vcc3v3_sd>; 737 735 vqmmc-supply = <&vccio_sd>; 738 736 status = "okay"; 739 737 }; 740 738 741 739 &sdmmc2 { 742 - supports-sdio; 743 740 bus-width = <4>; 744 741 disable-wp; 745 742 cap-sd-highspeed;
+1
arch/arm64/boot/dts/rockchip/rk356x.dtsi
··· 966 966 clock-names = "aclk_mst", "aclk_slv", 967 967 "aclk_dbi", "pclk", "aux"; 968 968 device_type = "pci"; 969 + #interrupt-cells = <1>; 969 970 interrupt-map-mask = <0 0 0 7>; 970 971 interrupt-map = <0 0 0 1 &pcie_intc 0>, 971 972 <0 0 0 2 &pcie_intc 1>,