Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'mdio-support-updates'
Nikita Yushchenko says:
====================
rswitch: mdio support updates
This series cleans up rswitch mdio support, and adds C22 operations.
====================
Link: https://patch.msgid.link/20241216071957.2587354-1-nikita.yoush@cogentembedded.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+65
-52
+52
-32
drivers/net/ethernet/renesas/rswitch.c
+52
-32
drivers/net/ethernet/renesas/rswitch.c
···
1164
1164
1165
1165
static void rswitch_etha_enable_mii(struct rswitch_etha *etha)
1166
1166
{
1167
-
rswitch_modify(etha->addr, MPIC, MPIC_PSMCS_MASK | MPIC_PSMHT_MASK,
1168
-
MPIC_PSMCS(etha->psmcs) | MPIC_PSMHT(0x06));
1169
-
rswitch_modify(etha->addr, MPSM, 0, MPSM_MFF_C45);
1167
+
rswitch_modify(etha->addr, MPIC, MPIC_PSMCS | MPIC_PSMHT,
1168
+
FIELD_PREP(MPIC_PSMCS, etha->psmcs) |
1169
+
FIELD_PREP(MPIC_PSMHT, 0x06));
1170
1170
}
1171
1171
1172
1172
static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac)
···
1195
1195
return rswitch_etha_change_mode(etha, EAMC_OPC_OPERATION);
1196
1196
}
1197
1197
1198
-
static int rswitch_etha_set_access(struct rswitch_etha *etha, bool read,
1199
-
int phyad, int devad, int regad, int data)
1198
+
static int rswitch_etha_mpsm_op(struct rswitch_etha *etha, bool read,
1199
+
unsigned int mmf, unsigned int pda,
1200
+
unsigned int pra, unsigned int pop,
1201
+
unsigned int prd)
1200
1202
{
1201
-
int pop = read ? MDIO_READ_C45 : MDIO_WRITE_C45;
1202
1203
u32 val;
1203
1204
int ret;
1204
1205
1205
-
if (devad == 0xffffffff)
1206
-
return -ENODEV;
1206
+
val = MPSM_PSME |
1207
+
FIELD_PREP(MPSM_MFF, mmf) |
1208
+
FIELD_PREP(MPSM_PDA, pda) |
1209
+
FIELD_PREP(MPSM_PRA, pra) |
1210
+
FIELD_PREP(MPSM_POP, pop) |
1211
+
FIELD_PREP(MPSM_PRD, prd);
1212
+
iowrite32(val, etha->addr + MPSM);
1207
1213
1208
-
writel(MMIS1_CLEAR_FLAGS, etha->addr + MMIS1);
1209
-
1210
-
val = MPSM_PSME | MPSM_MFF_C45;
1211
-
iowrite32((regad << 16) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM);
1212
-
1213
-
ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS);
1214
+
ret = rswitch_reg_wait(etha->addr, MPSM, MPSM_PSME, 0);
1214
1215
if (ret)
1215
1216
return ret;
1216
1217
1217
-
rswitch_modify(etha->addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS);
1218
-
1219
1218
if (read) {
1220
-
writel((pop << 13) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM);
1221
-
1222
-
ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS);
1223
-
if (ret)
1224
-
return ret;
1225
-
1226
-
ret = (ioread32(etha->addr + MPSM) & MPSM_PRD_MASK) >> 16;
1227
-
1228
-
rswitch_modify(etha->addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS);
1229
-
} else {
1230
-
iowrite32((data << 16) | (pop << 13) | (devad << 8) | (phyad << 3) | val,
1231
-
etha->addr + MPSM);
1232
-
1233
-
ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PWACS, MMIS1_PWACS);
1219
+
val = ioread32(etha->addr + MPSM);
1220
+
ret = FIELD_GET(MPSM_PRD, val);
1234
1221
}
1235
1222
1236
1223
return ret;
···
1227
1240
int regad)
1228
1241
{
1229
1242
struct rswitch_etha *etha = bus->priv;
1243
+
int ret;
1230
1244
1231
-
return rswitch_etha_set_access(etha, true, addr, devad, regad, 0);
1245
+
ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
1246
+
MPSM_POP_ADDRESS, regad);
1247
+
if (ret)
1248
+
return ret;
1249
+
1250
+
return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C45, addr, devad,
1251
+
MPSM_POP_READ_C45, 0);
1232
1252
}
1233
1253
1234
1254
static int rswitch_etha_mii_write_c45(struct mii_bus *bus, int addr, int devad,
1235
1255
int regad, u16 val)
1236
1256
{
1237
1257
struct rswitch_etha *etha = bus->priv;
1258
+
int ret;
1238
1259
1239
-
return rswitch_etha_set_access(etha, false, addr, devad, regad, val);
1260
+
ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
1261
+
MPSM_POP_ADDRESS, regad);
1262
+
if (ret)
1263
+
return ret;
1264
+
1265
+
return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
1266
+
MPSM_POP_WRITE, val);
1267
+
}
1268
+
1269
+
static int rswitch_etha_mii_read_c22(struct mii_bus *bus, int phyad, int regad)
1270
+
{
1271
+
struct rswitch_etha *etha = bus->priv;
1272
+
1273
+
return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C22, phyad, regad,
1274
+
MPSM_POP_READ_C22, 0);
1275
+
}
1276
+
1277
+
static int rswitch_etha_mii_write_c22(struct mii_bus *bus, int phyad,
1278
+
int regad, u16 val)
1279
+
{
1280
+
struct rswitch_etha *etha = bus->priv;
1281
+
1282
+
return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C22, phyad, regad,
1283
+
MPSM_POP_WRITE, val);
1240
1284
}
1241
1285
1242
1286
/* Call of_node_put(port) after done */
···
1352
1334
mii_bus->priv = rdev->etha;
1353
1335
mii_bus->read_c45 = rswitch_etha_mii_read_c45;
1354
1336
mii_bus->write_c45 = rswitch_etha_mii_write_c45;
1337
+
mii_bus->read = rswitch_etha_mii_read_c22;
1338
+
mii_bus->write = rswitch_etha_mii_write_c22;
1355
1339
mii_bus->parent = &rdev->priv->pdev->dev;
1356
1340
1357
1341
mdio_np = of_get_child_by_name(rdev->np_port, "mdio");
+13
-20
drivers/net/ethernet/renesas/rswitch.h
+13
-20
drivers/net/ethernet/renesas/rswitch.h
···
732
732
#define MPIC_LSC_100M 1
733
733
#define MPIC_LSC_1G 2
734
734
#define MPIC_LSC_2_5G 3
735
-
736
-
#define MDIO_READ_C45 0x03
737
-
#define MDIO_WRITE_C45 0x01
735
+
#define MPIC_PSMCS GENMASK(22, 16)
736
+
#define MPIC_PSMHT GENMASK(26, 24)
738
737
739
738
#define MPSM_PSME BIT(0)
740
-
#define MPSM_MFF_C45 BIT(2)
741
-
#define MPSM_PRD_SHIFT 16
742
-
#define MPSM_PRD_MASK GENMASK(31, MPSM_PRD_SHIFT)
743
-
744
-
/* Completion flags */
745
-
#define MMIS1_PAACS BIT(2) /* Address */
746
-
#define MMIS1_PWACS BIT(1) /* Write */
747
-
#define MMIS1_PRACS BIT(0) /* Read */
748
-
#define MMIS1_CLEAR_FLAGS 0xf
749
-
750
-
#define MPIC_PSMCS_SHIFT 16
751
-
#define MPIC_PSMCS_MASK GENMASK(22, MPIC_PSMCS_SHIFT)
752
-
#define MPIC_PSMCS(val) ((val) << MPIC_PSMCS_SHIFT)
753
-
754
-
#define MPIC_PSMHT_SHIFT 24
755
-
#define MPIC_PSMHT_MASK GENMASK(26, MPIC_PSMHT_SHIFT)
756
-
#define MPIC_PSMHT(val) ((val) << MPIC_PSMHT_SHIFT)
739
+
#define MPSM_MFF BIT(2)
740
+
#define MPSM_MMF_C22 0
741
+
#define MPSM_MMF_C45 1
742
+
#define MPSM_PDA GENMASK(7, 3)
743
+
#define MPSM_PRA GENMASK(12, 8)
744
+
#define MPSM_POP GENMASK(14, 13)
745
+
#define MPSM_POP_ADDRESS 0
746
+
#define MPSM_POP_WRITE 1
747
+
#define MPSM_POP_READ_C22 2
748
+
#define MPSM_POP_READ_C45 3
749
+
#define MPSM_PRD GENMASK(31, 16)
757
750
758
751
#define MLVC_PLV BIT(16)
759
752