Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 's390-6.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 fixes from Alexander Gordeev:
- Fix missing NULL pointer check when determining guest/host fault
- Mark all functions in asm/atomic_ops.h, asm/atomic.h and
asm/preempt.h as __always_inline to avoid unwanted instrumentation
- Fix removal of a Processor Activity Instrumentation (PAI) sampling
event in PMU device driver
- Align system call table on 8 bytes
* tag 's390-6.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
s390/entry: align system call table on 8 bytes
s390/pai: fix sampling event removal for PMU device driver
s390/preempt: mark all functions __always_inline
s390/atomic: mark all functions __always_inline
s390/mm: fix NULL pointer dereference
+67
-58
+22
-22
arch/s390/include/asm/atomic.h
+22
-22
arch/s390/include/asm/atomic.h
···
15
15
#include <asm/barrier.h>
16
16
#include <asm/cmpxchg.h>
17
17
18
-
static inline int arch_atomic_read(const atomic_t *v)
18
+
static __always_inline int arch_atomic_read(const atomic_t *v)
19
19
{
20
20
return __atomic_read(v);
21
21
}
22
22
#define arch_atomic_read arch_atomic_read
23
23
24
-
static inline void arch_atomic_set(atomic_t *v, int i)
24
+
static __always_inline void arch_atomic_set(atomic_t *v, int i)
25
25
{
26
26
__atomic_set(v, i);
27
27
}
28
28
#define arch_atomic_set arch_atomic_set
29
29
30
-
static inline int arch_atomic_add_return(int i, atomic_t *v)
30
+
static __always_inline int arch_atomic_add_return(int i, atomic_t *v)
31
31
{
32
32
return __atomic_add_barrier(i, &v->counter) + i;
33
33
}
34
34
#define arch_atomic_add_return arch_atomic_add_return
35
35
36
-
static inline int arch_atomic_fetch_add(int i, atomic_t *v)
36
+
static __always_inline int arch_atomic_fetch_add(int i, atomic_t *v)
37
37
{
38
38
return __atomic_add_barrier(i, &v->counter);
39
39
}
40
40
#define arch_atomic_fetch_add arch_atomic_fetch_add
41
41
42
-
static inline void arch_atomic_add(int i, atomic_t *v)
42
+
static __always_inline void arch_atomic_add(int i, atomic_t *v)
43
43
{
44
44
__atomic_add(i, &v->counter);
45
45
}
···
50
50
#define arch_atomic_fetch_sub(_i, _v) arch_atomic_fetch_add(-(int)(_i), _v)
51
51
52
52
#define ATOMIC_OPS(op) \
53
-
static inline void arch_atomic_##op(int i, atomic_t *v) \
53
+
static __always_inline void arch_atomic_##op(int i, atomic_t *v) \
54
54
{ \
55
55
__atomic_##op(i, &v->counter); \
56
56
} \
57
-
static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \
57
+
static __always_inline int arch_atomic_fetch_##op(int i, atomic_t *v) \
58
58
{ \
59
59
return __atomic_##op##_barrier(i, &v->counter); \
60
60
}
···
74
74
75
75
#define arch_atomic_xchg(v, new) (arch_xchg(&((v)->counter), new))
76
76
77
-
static inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)
77
+
static __always_inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)
78
78
{
79
79
return __atomic_cmpxchg(&v->counter, old, new);
80
80
}
···
82
82
83
83
#define ATOMIC64_INIT(i) { (i) }
84
84
85
-
static inline s64 arch_atomic64_read(const atomic64_t *v)
85
+
static __always_inline s64 arch_atomic64_read(const atomic64_t *v)
86
86
{
87
87
return __atomic64_read(v);
88
88
}
89
89
#define arch_atomic64_read arch_atomic64_read
90
90
91
-
static inline void arch_atomic64_set(atomic64_t *v, s64 i)
91
+
static __always_inline void arch_atomic64_set(atomic64_t *v, s64 i)
92
92
{
93
93
__atomic64_set(v, i);
94
94
}
95
95
#define arch_atomic64_set arch_atomic64_set
96
96
97
-
static inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)
97
+
static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)
98
98
{
99
99
return __atomic64_add_barrier(i, (long *)&v->counter) + i;
100
100
}
101
101
#define arch_atomic64_add_return arch_atomic64_add_return
102
102
103
-
static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)
103
+
static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)
104
104
{
105
105
return __atomic64_add_barrier(i, (long *)&v->counter);
106
106
}
107
107
#define arch_atomic64_fetch_add arch_atomic64_fetch_add
108
108
109
-
static inline void arch_atomic64_add(s64 i, atomic64_t *v)
109
+
static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v)
110
110
{
111
111
__atomic64_add(i, (long *)&v->counter);
112
112
}
···
114
114
115
115
#define arch_atomic64_xchg(v, new) (arch_xchg(&((v)->counter), new))
116
116
117
-
static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
117
+
static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
118
118
{
119
119
return __atomic64_cmpxchg((long *)&v->counter, old, new);
120
120
}
121
121
#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg
122
122
123
-
#define ATOMIC64_OPS(op) \
124
-
static inline void arch_atomic64_##op(s64 i, atomic64_t *v) \
125
-
{ \
126
-
__atomic64_##op(i, (long *)&v->counter); \
127
-
} \
128
-
static inline long arch_atomic64_fetch_##op(s64 i, atomic64_t *v) \
129
-
{ \
130
-
return __atomic64_##op##_barrier(i, (long *)&v->counter); \
123
+
#define ATOMIC64_OPS(op) \
124
+
static __always_inline void arch_atomic64_##op(s64 i, atomic64_t *v) \
125
+
{ \
126
+
__atomic64_##op(i, (long *)&v->counter); \
127
+
} \
128
+
static __always_inline long arch_atomic64_fetch_##op(s64 i, atomic64_t *v) \
129
+
{ \
130
+
return __atomic64_##op##_barrier(i, (long *)&v->counter); \
131
131
}
132
132
133
133
ATOMIC64_OPS(and)
+11
-11
arch/s390/include/asm/atomic_ops.h
+11
-11
arch/s390/include/asm/atomic_ops.h
···
8
8
#ifndef __ARCH_S390_ATOMIC_OPS__
9
9
#define __ARCH_S390_ATOMIC_OPS__
10
10
11
-
static inline int __atomic_read(const atomic_t *v)
11
+
static __always_inline int __atomic_read(const atomic_t *v)
12
12
{
13
13
int c;
14
14
···
18
18
return c;
19
19
}
20
20
21
-
static inline void __atomic_set(atomic_t *v, int i)
21
+
static __always_inline void __atomic_set(atomic_t *v, int i)
22
22
{
23
23
asm volatile(
24
24
" st %1,%0\n"
25
25
: "=R" (v->counter) : "d" (i));
26
26
}
27
27
28
-
static inline s64 __atomic64_read(const atomic64_t *v)
28
+
static __always_inline s64 __atomic64_read(const atomic64_t *v)
29
29
{
30
30
s64 c;
31
31
···
35
35
return c;
36
36
}
37
37
38
-
static inline void __atomic64_set(atomic64_t *v, s64 i)
38
+
static __always_inline void __atomic64_set(atomic64_t *v, s64 i)
39
39
{
40
40
asm volatile(
41
41
" stg %1,%0\n"
···
45
45
#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
46
46
47
47
#define __ATOMIC_OP(op_name, op_type, op_string, op_barrier) \
48
-
static inline op_type op_name(op_type val, op_type *ptr) \
48
+
static __always_inline op_type op_name(op_type val, op_type *ptr) \
49
49
{ \
50
50
op_type old; \
51
51
\
···
96
96
#else /* CONFIG_HAVE_MARCH_Z196_FEATURES */
97
97
98
98
#define __ATOMIC_OP(op_name, op_string) \
99
-
static inline int op_name(int val, int *ptr) \
99
+
static __always_inline int op_name(int val, int *ptr) \
100
100
{ \
101
101
int old, new; \
102
102
\
···
122
122
#undef __ATOMIC_OPS
123
123
124
124
#define __ATOMIC64_OP(op_name, op_string) \
125
-
static inline long op_name(long val, long *ptr) \
125
+
static __always_inline long op_name(long val, long *ptr) \
126
126
{ \
127
127
long old, new; \
128
128
\
···
154
154
155
155
#endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
156
156
157
-
static inline int __atomic_cmpxchg(int *ptr, int old, int new)
157
+
static __always_inline int __atomic_cmpxchg(int *ptr, int old, int new)
158
158
{
159
159
asm volatile(
160
160
" cs %[old],%[new],%[ptr]"
···
164
164
return old;
165
165
}
166
166
167
-
static inline bool __atomic_cmpxchg_bool(int *ptr, int old, int new)
167
+
static __always_inline bool __atomic_cmpxchg_bool(int *ptr, int old, int new)
168
168
{
169
169
int old_expected = old;
170
170
···
176
176
return old == old_expected;
177
177
}
178
178
179
-
static inline long __atomic64_cmpxchg(long *ptr, long old, long new)
179
+
static __always_inline long __atomic64_cmpxchg(long *ptr, long old, long new)
180
180
{
181
181
asm volatile(
182
182
" csg %[old],%[new],%[ptr]"
···
186
186
return old;
187
187
}
188
188
189
-
static inline bool __atomic64_cmpxchg_bool(long *ptr, long old, long new)
189
+
static __always_inline bool __atomic64_cmpxchg_bool(long *ptr, long old, long new)
190
190
{
191
191
long old_expected = old;
192
192
+18
-18
arch/s390/include/asm/preempt.h
+18
-18
arch/s390/include/asm/preempt.h
···
12
12
#define PREEMPT_NEED_RESCHED 0x80000000
13
13
#define PREEMPT_ENABLED (0 + PREEMPT_NEED_RESCHED)
14
14
15
-
static inline int preempt_count(void)
15
+
static __always_inline int preempt_count(void)
16
16
{
17
17
return READ_ONCE(S390_lowcore.preempt_count) & ~PREEMPT_NEED_RESCHED;
18
18
}
19
19
20
-
static inline void preempt_count_set(int pc)
20
+
static __always_inline void preempt_count_set(int pc)
21
21
{
22
22
int old, new;
23
23
···
29
29
old, new) != old);
30
30
}
31
31
32
-
static inline void set_preempt_need_resched(void)
32
+
static __always_inline void set_preempt_need_resched(void)
33
33
{
34
34
__atomic_and(~PREEMPT_NEED_RESCHED, &S390_lowcore.preempt_count);
35
35
}
36
36
37
-
static inline void clear_preempt_need_resched(void)
37
+
static __always_inline void clear_preempt_need_resched(void)
38
38
{
39
39
__atomic_or(PREEMPT_NEED_RESCHED, &S390_lowcore.preempt_count);
40
40
}
41
41
42
-
static inline bool test_preempt_need_resched(void)
42
+
static __always_inline bool test_preempt_need_resched(void)
43
43
{
44
44
return !(READ_ONCE(S390_lowcore.preempt_count) & PREEMPT_NEED_RESCHED);
45
45
}
46
46
47
-
static inline void __preempt_count_add(int val)
47
+
static __always_inline void __preempt_count_add(int val)
48
48
{
49
49
/*
50
50
* With some obscure config options and CONFIG_PROFILE_ALL_BRANCHES
···
59
59
__atomic_add(val, &S390_lowcore.preempt_count);
60
60
}
61
61
62
-
static inline void __preempt_count_sub(int val)
62
+
static __always_inline void __preempt_count_sub(int val)
63
63
{
64
64
__preempt_count_add(-val);
65
65
}
66
66
67
-
static inline bool __preempt_count_dec_and_test(void)
67
+
static __always_inline bool __preempt_count_dec_and_test(void)
68
68
{
69
69
return __atomic_add(-1, &S390_lowcore.preempt_count) == 1;
70
70
}
71
71
72
-
static inline bool should_resched(int preempt_offset)
72
+
static __always_inline bool should_resched(int preempt_offset)
73
73
{
74
74
return unlikely(READ_ONCE(S390_lowcore.preempt_count) ==
75
75
preempt_offset);
···
79
79
80
80
#define PREEMPT_ENABLED (0)
81
81
82
-
static inline int preempt_count(void)
82
+
static __always_inline int preempt_count(void)
83
83
{
84
84
return READ_ONCE(S390_lowcore.preempt_count);
85
85
}
86
86
87
-
static inline void preempt_count_set(int pc)
87
+
static __always_inline void preempt_count_set(int pc)
88
88
{
89
89
S390_lowcore.preempt_count = pc;
90
90
}
91
91
92
-
static inline void set_preempt_need_resched(void)
92
+
static __always_inline void set_preempt_need_resched(void)
93
93
{
94
94
}
95
95
96
-
static inline void clear_preempt_need_resched(void)
96
+
static __always_inline void clear_preempt_need_resched(void)
97
97
{
98
98
}
99
99
100
-
static inline bool test_preempt_need_resched(void)
100
+
static __always_inline bool test_preempt_need_resched(void)
101
101
{
102
102
return false;
103
103
}
104
104
105
-
static inline void __preempt_count_add(int val)
105
+
static __always_inline void __preempt_count_add(int val)
106
106
{
107
107
S390_lowcore.preempt_count += val;
108
108
}
109
109
110
-
static inline void __preempt_count_sub(int val)
110
+
static __always_inline void __preempt_count_sub(int val)
111
111
{
112
112
S390_lowcore.preempt_count -= val;
113
113
}
114
114
115
-
static inline bool __preempt_count_dec_and_test(void)
115
+
static __always_inline bool __preempt_count_dec_and_test(void)
116
116
{
117
117
return !--S390_lowcore.preempt_count && tif_need_resched();
118
118
}
119
119
120
-
static inline bool should_resched(int preempt_offset)
120
+
static __always_inline bool should_resched(int preempt_offset)
121
121
{
122
122
return unlikely(preempt_count() == preempt_offset &&
123
123
tif_need_resched());
+1
arch/s390/kernel/entry.S
+1
arch/s390/kernel/entry.S
+7
-3
arch/s390/kernel/perf_pai_crypto.c
+7
-3
arch/s390/kernel/perf_pai_crypto.c
···
90
90
event->cpu);
91
91
struct paicrypt_map *cpump = mp->mapptr;
92
92
93
-
cpump->event = NULL;
94
93
static_branch_dec(&pai_key);
95
94
mutex_lock(&pai_reserve_mutex);
96
95
debug_sprintf_event(cfm_dbg, 5, "%s event %#llx cpu %d users %d"
···
355
356
356
357
static void paicrypt_stop(struct perf_event *event, int flags)
357
358
{
358
-
if (!event->attr.sample_period) /* Counting */
359
+
struct paicrypt_mapptr *mp = this_cpu_ptr(paicrypt_root.mapptr);
360
+
struct paicrypt_map *cpump = mp->mapptr;
361
+
362
+
if (!event->attr.sample_period) { /* Counting */
359
363
paicrypt_read(event);
360
-
else /* Sampling */
364
+
} else { /* Sampling */
361
365
perf_sched_cb_dec(event->pmu);
366
+
cpump->event = NULL;
367
+
}
362
368
event->hw.state = PERF_HES_STOPPED;
363
369
}
364
370
+7
-3
arch/s390/kernel/perf_pai_ext.c
+7
-3
arch/s390/kernel/perf_pai_ext.c
···
122
122
123
123
free_page(PAI_SAVE_AREA(event));
124
124
mutex_lock(&paiext_reserve_mutex);
125
-
cpump->event = NULL;
126
125
if (refcount_dec_and_test(&cpump->refcnt)) /* Last reference gone */
127
126
paiext_free(mp);
128
127
paiext_root_free();
···
361
362
362
363
static void paiext_stop(struct perf_event *event, int flags)
363
364
{
364
-
if (!event->attr.sample_period) /* Counting */
365
+
struct paiext_mapptr *mp = this_cpu_ptr(paiext_root.mapptr);
366
+
struct paiext_map *cpump = mp->mapptr;
367
+
368
+
if (!event->attr.sample_period) { /* Counting */
365
369
paiext_read(event);
366
-
else /* Sampling */
370
+
} else { /* Sampling */
367
371
perf_sched_cb_dec(event->pmu);
372
+
cpump->event = NULL;
373
+
}
368
374
event->hw.state = PERF_HES_STOPPED;
369
375
}
370
376