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clk: qcom: dispcc-sm6350: Add MDSS_CORE & MDSS_RSCC resets

Add the offsets for two resets inside the dispcc on SM6350 SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250919-sm6350-mdss-reset-v1-2-48dcac917c73@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Luca Weiss and committed by
Bjorn Andersson 502099e9 ff71d2d8

+7
+7
drivers/clk/qcom/dispcc-sm6350.c
··· 679 679 }, 680 680 }; 681 681 682 + static const struct qcom_reset_map disp_cc_sm6350_resets[] = { 683 + [DISP_CC_MDSS_CORE_BCR] = { 0x1000 }, 684 + [DISP_CC_MDSS_RSCC_BCR] = { 0x2000 }, 685 + }; 686 + 682 687 static struct gdsc mdss_gdsc = { 683 688 .gdscr = 0x1004, 684 689 .en_rest_wait_val = 0x2, ··· 751 746 .num_clks = ARRAY_SIZE(disp_cc_sm6350_clocks), 752 747 .gdscs = disp_cc_sm6350_gdscs, 753 748 .num_gdscs = ARRAY_SIZE(disp_cc_sm6350_gdscs), 749 + .resets = disp_cc_sm6350_resets, 750 + .num_resets = ARRAY_SIZE(disp_cc_sm6350_resets), 754 751 }; 755 752 756 753 static const struct of_device_id disp_cc_sm6350_match_table[] = {