tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'parisc-for-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux

Pull parisc architecture updates from Helge Deller:
"A fix which allows booting on the very old 710 workstations, and two
fixes in the syscall entry/exit path which allow to execute 64-bit
userspace binaries.

Note that although we currently have a 64-bit (static) kernel to allow
more than 4 GB physical RAM, there is no support for 64-bit userspace
for parisc-linux yet, but Dave and Sven are making slowly progress to
port and fix glibc and gcc.

Summary:

- Fix boot on 710 workstation by not reprogramming ASP chip

- Fix 64bit userspace syscalls (64-bit userspace is still being
developed)

- minor code cleanups in asm/bug.h and perf_regs.c"

* tag 'parisc-for-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Do not reprogram affinitiy on ASP chip
parisc: Drop linux/kernel.h include from asm/bug.h header
parisc: remove unneeded semicolon in perf_regs.c
parisc: entry.S: fix space adjustment on interruption for 64-bit userspace
parisc: entry: set W bit for !compat tasks in syscall_restore_rfi()
parisc: Drop padding fields and layers entries from inventory log

Linus Torvalds 50471f8b 0d1d4403

+19 -15
-2
arch/parisc/include/asm/bug.h
··· 2 2 #ifndef _PARISC_BUG_H 3 3 #define _PARISC_BUG_H 4 4 5 - #include <linux/kernel.h> /* for BUGFLAG_TAINT */ 6 - 7 5 /* 8 6 * Tell the user there is some problem. 9 7 * The offending file and line are encoded in the __bug_table section.
+2
arch/parisc/kernel/asm-offsets.c
··· 258 258 BLANK(); 259 259 DEFINE(TIF_BLOCKSTEP_PA_BIT, 31-TIF_BLOCKSTEP); 260 260 DEFINE(TIF_SINGLESTEP_PA_BIT, 31-TIF_SINGLESTEP); 261 + DEFINE(TIF_32BIT_PA_BIT, 31-TIF_32BIT); 262 + 261 263 BLANK(); 262 264 DEFINE(ASM_PMD_SHIFT, PMD_SHIFT); 263 265 DEFINE(ASM_PGDIR_SHIFT, PGDIR_SHIFT);
+1 -7
arch/parisc/kernel/drivers.c
··· 1043 1043 (unsigned char)mod_path.path.bc[3], 1044 1044 (unsigned char)mod_path.path.bc[4], 1045 1045 (unsigned char)mod_path.path.bc[5]); 1046 - pr_cont(".mod = 0x%x ", mod_path.path.mod); 1047 - pr_cont(" },\n"); 1048 - pr_cont("\t.layers = { 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x }\n", 1049 - mod_path.layers[0], mod_path.layers[1], mod_path.layers[2], 1050 - mod_path.layers[3], mod_path.layers[4], mod_path.layers[5]); 1046 + pr_cont(".mod = 0x%x }\n", mod_path.path.mod); 1051 1047 pr_cont("};\n"); 1052 1048 1053 1049 pr_info("static struct pdc_iodc iodc_data_hpa_%08lx = {\n", hpa); ··· 1063 1067 DO(checksum); 1064 1068 DO(length); 1065 1069 #undef DO 1066 - pr_cont("\t/* pad: 0x%04x, 0x%04x */\n", 1067 - iodc_data.pad[0], iodc_data.pad[1]); 1068 1070 pr_cont("};\n"); 1069 1071 1070 1072 pr_info("#define HPA_%08lx_num_addr %d\n", hpa, dev->num_addrs);
+12 -4
arch/parisc/kernel/entry.S
··· 1059 1059 STREG %r17, PT_IOR(%r29) 1060 1060 1061 1061 #if defined(CONFIG_64BIT) 1062 - b,n intr_save2 1063 - 1064 1062 skip_save_ior: 1065 1063 /* We have a itlb miss, and when executing code above 4 Gb on ILP64, we 1066 1064 * need to adjust iasq/iaoq here in the same way we adjusted isr/ior ··· 1067 1069 bb,COND(>=),n %r8,PSW_W_BIT,intr_save2 1068 1070 LDREG PT_IASQ0(%r29), %r16 1069 1071 LDREG PT_IAOQ0(%r29), %r17 1070 - /* adjust iasq/iaoq */ 1072 + /* adjust iasq0/iaoq0 */ 1071 1073 space_adjust %r16,%r17,%r1 1072 1074 STREG %r16, PT_IASQ0(%r29) 1073 1075 STREG %r17, PT_IAOQ0(%r29) 1076 + 1077 + LDREG PT_IASQ1(%r29), %r16 1078 + LDREG PT_IAOQ1(%r29), %r17 1079 + /* adjust iasq1/iaoq1 */ 1080 + space_adjust %r16,%r17,%r1 1081 + STREG %r16, PT_IASQ1(%r29) 1082 + STREG %r17, PT_IAOQ1(%r29) 1074 1083 #else 1075 1084 skip_save_ior: 1076 1085 #endif ··· 1846 1841 extru,= %r19,TIF_BLOCKSTEP_PA_BIT,1,%r0 1847 1842 depi -1,7,1,%r20 /* T bit */ 1848 1843 1844 + #ifdef CONFIG_64BIT 1845 + extru,<> %r19,TIF_32BIT_PA_BIT,1,%r0 1846 + depi -1,4,1,%r20 /* W bit */ 1847 + #endif 1849 1848 STREG %r20,TASK_PT_PSW(%r1) 1850 1849 1851 1850 /* Always store space registers, since sr3 can be changed (e.g. fork) */ ··· 1863 1854 STREG %r25,TASK_PT_IASQ0(%r1) 1864 1855 STREG %r25,TASK_PT_IASQ1(%r1) 1865 1856 1866 - /* XXX W bit??? */ 1867 1857 /* Now if old D bit is clear, it means we didn't save all registers 1868 1858 * on syscall entry, so do that now. This only happens on TRACEME 1869 1859 * calls, or if someone attached to us while we were on a syscall.
+1 -1
arch/parisc/kernel/perf_regs.c
··· 27 27 return regs->ior; 28 28 case PERF_REG_PARISC_IPSW: /* CR22 */ 29 29 return regs->ipsw; 30 - }; 30 + } 31 31 WARN_ON_ONCE((u32)idx >= PERF_REG_PARISC_MAX); 32 32 return 0; 33 33 }
+3 -1
drivers/parisc/gsc.c
··· 154 154 gsc_dev->eim = ((u32) gsc_dev->gsc_irq.txn_addr) | gsc_dev->gsc_irq.txn_data; 155 155 156 156 /* switch IRQ's for devices below LASI/WAX to other CPU */ 157 - gsc_writel(gsc_dev->eim, gsc_dev->hpa + OFFSET_IAR); 157 + /* ASP chip (svers 0x70) does not support reprogramming */ 158 + if (gsc_dev->gsc->id.sversion != 0x70) 159 + gsc_writel(gsc_dev->eim, gsc_dev->hpa + OFFSET_IAR); 158 160 159 161 irq_data_update_effective_affinity(d, &tmask); 160 162