Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'scsi-target-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/bvanassche/linux
Pull SCSI target fixes from Bart Van Assche:
- two small fixes for the ibmvscsis driver
- ten patches with bug fixes for the target mode of the qla2xxx driver
- four patches that avoid that the "sparse" and "smatch" static
analyzer tools report false positives for the qla2xxx code base
* 'scsi-target-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/bvanassche/linux:
qla2xxx: Disable out-of-order processing by default in firmware
qla2xxx: Fix erroneous invalid handle message
qla2xxx: Reduce exess wait during chip reset
qla2xxx: Terminate exchange if corrupted
qla2xxx: Fix crash due to null pointer access
qla2xxx: Collect additional information to debug fw dump
qla2xxx: Reset reserved field in firmware options to 0
qla2xxx: Set tcm_qla2xxx version to automatically track qla2xxx version
qla2xxx: Include ATIO queue in firmware dump when in target mode
qla2xxx: Fix wrong IOCB type assumption
qla2xxx: Avoid that building with W=1 triggers complaints about set-but-not-used variables
qla2xxx: Move two arrays from header files to .c files
qla2xxx: Declare an array with file scope static
qla2xxx: Fix indentation
ibmvscsis: Fix sleeping in interrupt context
ibmvscsis: Fix max transfer length
+158
-66
+4
-3
drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c
+4
-3
drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c
···
46
46
47
47
#define INITIAL_SRP_LIMIT 800
48
48
#define DEFAULT_MAX_SECTORS 256
49
+
#define MAX_TXU 1024 * 1024
49
50
50
51
static uint max_vdma_size = MAX_H_COPY_RDMA;
51
52
···
1392
1391
}
1393
1392
1394
1393
info = dma_alloc_coherent(&vscsi->dma_dev->dev, sizeof(*info), &token,
1395
-
GFP_KERNEL);
1394
+
GFP_ATOMIC);
1396
1395
if (!info) {
1397
1396
dev_err(&vscsi->dev, "bad dma_alloc_coherent %p\n",
1398
1397
iue->target);
···
1444
1443
info->mad_version = cpu_to_be32(MAD_VERSION_1);
1445
1444
info->os_type = cpu_to_be32(LINUX);
1446
1445
memset(&info->port_max_txu[0], 0, sizeof(info->port_max_txu));
1447
-
info->port_max_txu[0] = cpu_to_be32(128 * PAGE_SIZE);
1446
+
info->port_max_txu[0] = cpu_to_be32(MAX_TXU);
1448
1447
1449
1448
dma_wmb();
1450
1449
rc = h_copy_rdma(sizeof(*info), vscsi->dds.window[LOCAL].liobn,
···
1510
1509
}
1511
1510
1512
1511
cap = dma_alloc_coherent(&vscsi->dma_dev->dev, olen, &token,
1513
-
GFP_KERNEL);
1512
+
GFP_ATOMIC);
1514
1513
if (!cap) {
1515
1514
dev_err(&vscsi->dev, "bad dma_alloc_coherent %p\n",
1516
1515
iue->target);
+1
-2
drivers/scsi/qla2xxx/qla_attr.c
+1
-2
drivers/scsi/qla2xxx/qla_attr.c
···
761
761
struct scsi_qla_host *vha = shost_priv(dev_to_shost(container_of(kobj,
762
762
struct device, kobj)));
763
763
int type;
764
-
int rval = 0;
765
764
port_id_t did;
766
765
767
766
type = simple_strtol(buf, NULL, 10);
···
774
775
775
776
ql_log(ql_log_info, vha, 0x70e4, "%s: %d\n", __func__, type);
776
777
777
-
rval = qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
778
+
qla24xx_els_dcmd_iocb(vha, ELS_DCMD_LOGO, did);
778
779
return count;
779
780
}
780
781
+2
-1
drivers/scsi/qla2xxx/qla_def.h
+2
-1
drivers/scsi/qla2xxx/qla_def.h
···
1556
1556
struct atio {
1557
1557
uint8_t entry_type; /* Entry type. */
1558
1558
uint8_t entry_count; /* Entry count. */
1559
-
uint8_t data[58];
1559
+
__le16 attr_n_length;
1560
+
uint8_t data[56];
1560
1561
uint32_t signature;
1561
1562
#define ATIO_PROCESSED 0xDEADDEAD /* Signature */
1562
1563
};
+2
-2
drivers/scsi/qla2xxx/qla_init.c
+2
-2
drivers/scsi/qla2xxx/qla_init.c
···
1191
1191
1192
1192
/* Wait for soft-reset to complete. */
1193
1193
RD_REG_DWORD(®->ctrl_status);
1194
-
for (cnt = 0; cnt < 6000000; cnt++) {
1194
+
for (cnt = 0; cnt < 60; cnt++) {
1195
1195
barrier();
1196
1196
if ((RD_REG_DWORD(®->ctrl_status) &
1197
1197
CSRX_ISP_SOFT_RESET) == 0)
···
1234
1234
RD_REG_DWORD(®->hccr);
1235
1235
1236
1236
RD_REG_WORD(®->mailbox0);
1237
-
for (cnt = 6000000; RD_REG_WORD(®->mailbox0) != 0 &&
1237
+
for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 &&
1238
1238
rval == QLA_SUCCESS; cnt--) {
1239
1239
barrier();
1240
1240
if (cnt)
+4
drivers/scsi/qla2xxx/qla_isr.c
+4
drivers/scsi/qla2xxx/qla_isr.c
···
2492
2492
if (pkt->entry_status & RF_BUSY)
2493
2493
res = DID_BUS_BUSY << 16;
2494
2494
2495
+
if (pkt->entry_type == NOTIFY_ACK_TYPE &&
2496
+
pkt->handle == QLA_TGT_SKIP_HANDLE)
2497
+
return;
2498
+
2495
2499
sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2496
2500
if (sp) {
2497
2501
sp->done(ha, sp, res);
+24
-13
drivers/scsi/qla2xxx/qla_mbx.c
+24
-13
drivers/scsi/qla2xxx/qla_mbx.c
···
10
10
#include <linux/delay.h>
11
11
#include <linux/gfp.h>
12
12
13
-
struct rom_cmd {
13
+
static struct rom_cmd {
14
14
uint16_t cmd;
15
15
} rom_cmds[] = {
16
16
{ MBC_LOAD_RAM },
···
101
101
return QLA_FUNCTION_TIMEOUT;
102
102
}
103
103
104
-
/* if PCI error, then avoid mbx processing.*/
105
-
if (test_bit(PCI_ERR, &base_vha->dpc_flags)) {
104
+
/* if PCI error, then avoid mbx processing.*/
105
+
if (test_bit(PCI_ERR, &base_vha->dpc_flags)) {
106
106
ql_log(ql_log_warn, vha, 0x1191,
107
107
"PCI error, exiting.\n");
108
108
return QLA_FUNCTION_TIMEOUT;
109
-
}
109
+
}
110
110
111
111
reg = ha->iobase;
112
112
io_lock_on = base_vha->flags.init_done;
···
323
323
}
324
324
} else {
325
325
326
-
uint16_t mb0;
327
-
uint32_t ictrl;
326
+
uint16_t mb[8];
327
+
uint32_t ictrl, host_status, hccr;
328
328
uint16_t w;
329
329
330
330
if (IS_FWI2_CAPABLE(ha)) {
331
-
mb0 = RD_REG_WORD(®->isp24.mailbox0);
331
+
mb[0] = RD_REG_WORD(®->isp24.mailbox0);
332
+
mb[1] = RD_REG_WORD(®->isp24.mailbox1);
333
+
mb[2] = RD_REG_WORD(®->isp24.mailbox2);
334
+
mb[3] = RD_REG_WORD(®->isp24.mailbox3);
335
+
mb[7] = RD_REG_WORD(®->isp24.mailbox7);
332
336
ictrl = RD_REG_DWORD(®->isp24.ictrl);
337
+
host_status = RD_REG_DWORD(®->isp24.host_status);
338
+
hccr = RD_REG_DWORD(®->isp24.hccr);
339
+
340
+
ql_log(ql_log_warn, vha, 0x1119,
341
+
"MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
342
+
"mb[0-3]=[0x%x 0x%x 0x%x 0x%x] mb7 0x%x host_status 0x%x hccr 0x%x\n",
343
+
command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3],
344
+
mb[7], host_status, hccr);
345
+
333
346
} else {
334
-
mb0 = RD_MAILBOX_REG(ha, ®->isp, 0);
347
+
mb[0] = RD_MAILBOX_REG(ha, ®->isp, 0);
335
348
ictrl = RD_REG_WORD(®->isp.ictrl);
349
+
ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
350
+
"MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
351
+
"mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]);
336
352
}
337
-
ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
338
-
"MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
339
-
"mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
340
353
ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
341
354
342
355
/* Capture FW dump only, if PCI device active */
···
697
684
mbx_cmd_t mc;
698
685
mbx_cmd_t *mcp = &mc;
699
686
struct qla_hw_data *ha = vha->hw;
700
-
int configured_count;
701
687
702
688
ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111a,
703
689
"Entered %s.\n", __func__);
···
719
707
/*EMPTY*/
720
708
ql_dbg(ql_dbg_mbx, vha, 0x111b, "Failed=%x.\n", rval);
721
709
} else {
722
-
configured_count = mcp->mb[11];
723
710
ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118c,
724
711
"Done %s.\n", __func__);
725
712
}
+5
drivers/scsi/qla2xxx/qla_nx.c
+5
drivers/scsi/qla2xxx/qla_nx.c
···
42
42
(crb_addr_xform[QLA82XX_HW_PX_MAP_CRB_##name] = \
43
43
QLA82XX_HW_CRB_HUB_AGT_ADR_##name << 20)
44
44
45
+
const int MD_MIU_TEST_AGT_RDDATA[] = {
46
+
0x410000A8, 0x410000AC,
47
+
0x410000B8, 0x410000BC
48
+
};
49
+
45
50
static void qla82xx_crb_addr_transform_setup(void)
46
51
{
47
52
qla82xx_crb_addr_transform(XDMA);
+1
-2
drivers/scsi/qla2xxx/qla_nx.h
+1
-2
drivers/scsi/qla2xxx/qla_nx.h
···
1176
1176
#define MD_MIU_TEST_AGT_ADDR_LO 0x41000094
1177
1177
#define MD_MIU_TEST_AGT_ADDR_HI 0x41000098
1178
1178
1179
-
static const int MD_MIU_TEST_AGT_RDDATA[] = { 0x410000A8, 0x410000AC,
1180
-
0x410000B8, 0x410000BC };
1179
+
extern const int MD_MIU_TEST_AGT_RDDATA[4];
1181
1180
1182
1181
#define CRB_NIU_XG_PAUSE_CTL_P0 0x1
1183
1182
#define CRB_NIU_XG_PAUSE_CTL_P1 0x8
+17
drivers/scsi/qla2xxx/qla_nx2.c
+17
drivers/scsi/qla2xxx/qla_nx2.c
···
15
15
16
16
#define TIMEOUT_100_MS 100
17
17
18
+
static const uint32_t qla8044_reg_tbl[] = {
19
+
QLA8044_PEG_HALT_STATUS1,
20
+
QLA8044_PEG_HALT_STATUS2,
21
+
QLA8044_PEG_ALIVE_COUNTER,
22
+
QLA8044_CRB_DRV_ACTIVE,
23
+
QLA8044_CRB_DEV_STATE,
24
+
QLA8044_CRB_DRV_STATE,
25
+
QLA8044_CRB_DRV_SCRATCH,
26
+
QLA8044_CRB_DEV_PART_INFO1,
27
+
QLA8044_CRB_IDC_VER_MAJOR,
28
+
QLA8044_FW_VER_MAJOR,
29
+
QLA8044_FW_VER_MINOR,
30
+
QLA8044_FW_VER_SUB,
31
+
QLA8044_CMDPEG_STATE,
32
+
QLA8044_ASIC_TEMP,
33
+
};
34
+
18
35
/* 8044 Flash Read/Write functions */
19
36
uint32_t
20
37
qla8044_rd_reg(struct qla_hw_data *ha, ulong addr)
-17
drivers/scsi/qla2xxx/qla_nx2.h
-17
drivers/scsi/qla2xxx/qla_nx2.h
···
535
535
#define CRB_CMDPEG_CHECK_RETRY_COUNT 60
536
536
#define CRB_CMDPEG_CHECK_DELAY 500
537
537
538
-
static const uint32_t qla8044_reg_tbl[] = {
539
-
QLA8044_PEG_HALT_STATUS1,
540
-
QLA8044_PEG_HALT_STATUS2,
541
-
QLA8044_PEG_ALIVE_COUNTER,
542
-
QLA8044_CRB_DRV_ACTIVE,
543
-
QLA8044_CRB_DEV_STATE,
544
-
QLA8044_CRB_DRV_STATE,
545
-
QLA8044_CRB_DRV_SCRATCH,
546
-
QLA8044_CRB_DEV_PART_INFO1,
547
-
QLA8044_CRB_IDC_VER_MAJOR,
548
-
QLA8044_FW_VER_MAJOR,
549
-
QLA8044_FW_VER_MINOR,
550
-
QLA8044_FW_VER_SUB,
551
-
QLA8044_CMDPEG_STATE,
552
-
QLA8044_ASIC_TEMP,
553
-
};
554
-
555
538
/* MiniDump Structures */
556
539
557
540
/* Driver_code is for driver to write some info about the entry
+12
-4
drivers/scsi/qla2xxx/qla_os.c
+12
-4
drivers/scsi/qla2xxx/qla_os.c
···
3662
3662
sizeof(struct ct6_dsd), 0,
3663
3663
SLAB_HWCACHE_ALIGN, NULL);
3664
3664
if (!ctx_cachep)
3665
-
goto fail_free_gid_list;
3665
+
goto fail_free_srb_mempool;
3666
3666
}
3667
3667
ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3668
3668
ctx_cachep);
···
3815
3815
ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3816
3816
GFP_KERNEL);
3817
3817
if (!ha->loop_id_map)
3818
-
goto fail_async_pd;
3818
+
goto fail_loop_id_map;
3819
3819
else {
3820
3820
qla2x00_set_reserved_loop_ids(ha);
3821
3821
ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
···
3824
3824
3825
3825
return 0;
3826
3826
3827
+
fail_loop_id_map:
3828
+
dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3827
3829
fail_async_pd:
3828
3830
dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3829
3831
fail_ex_init_cb:
···
3853
3851
dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3854
3852
ha->ms_iocb = NULL;
3855
3853
ha->ms_iocb_dma = 0;
3854
+
3855
+
if (ha->sns_cmd)
3856
+
dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3857
+
ha->sns_cmd, ha->sns_cmd_dma);
3856
3858
fail_dma_pool:
3857
3859
if (IS_QLA82XX(ha) || ql2xenabledif) {
3858
3860
dma_pool_destroy(ha->fcp_cmnd_dma_pool);
···
3874
3868
kfree(ha->nvram);
3875
3869
ha->nvram = NULL;
3876
3870
fail_free_ctx_mempool:
3877
-
mempool_destroy(ha->ctx_mempool);
3871
+
if (ha->ctx_mempool)
3872
+
mempool_destroy(ha->ctx_mempool);
3878
3873
ha->ctx_mempool = NULL;
3879
3874
fail_free_srb_mempool:
3880
-
mempool_destroy(ha->srb_mempool);
3875
+
if (ha->srb_mempool)
3876
+
mempool_destroy(ha->srb_mempool);
3881
3877
ha->srb_mempool = NULL;
3882
3878
fail_free_gid_list:
3883
3879
dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
+39
-18
drivers/scsi/qla2xxx/qla_target.c
+39
-18
drivers/scsi/qla2xxx/qla_target.c
···
668
668
{
669
669
struct qla_hw_data *ha = vha->hw;
670
670
struct qla_tgt_sess *sess = NULL;
671
-
uint32_t unpacked_lun, lun = 0;
672
671
uint16_t loop_id;
673
672
int res = 0;
674
673
struct imm_ntfy_from_isp *n = (struct imm_ntfy_from_isp *)iocb;
675
-
struct atio_from_isp *a = (struct atio_from_isp *)iocb;
676
674
unsigned long flags;
677
675
678
676
loop_id = le16_to_cpu(n->u.isp24.nport_handle);
···
723
725
"loop_id %d)\n", vha->host_no, sess, sess->port_name,
724
726
mcmd, loop_id);
725
727
726
-
lun = a->u.isp24.fcp_cmnd.lun;
727
-
unpacked_lun = scsilun_to_int((struct scsi_lun *)&lun);
728
-
729
-
return qlt_issue_task_mgmt(sess, unpacked_lun, mcmd,
730
-
iocb, QLA24XX_MGMT_SEND_NACK);
728
+
return qlt_issue_task_mgmt(sess, 0, mcmd, iocb, QLA24XX_MGMT_SEND_NACK);
731
729
}
732
730
733
731
/* ha->tgt.sess_lock supposed to be held on entry */
···
3061
3067
3062
3068
pkt->entry_type = NOTIFY_ACK_TYPE;
3063
3069
pkt->entry_count = 1;
3064
-
pkt->handle = QLA_TGT_SKIP_HANDLE | CTIO_COMPLETION_HANDLE_MARK;
3070
+
pkt->handle = QLA_TGT_SKIP_HANDLE;
3065
3071
3066
3072
nack = (struct nack_to_isp *)pkt;
3067
3073
nack->ox_id = ntfy->ox_id;
···
3104
3110
#if 0 /* Todo */
3105
3111
if (rc == -ENOMEM)
3106
3112
qlt_alloc_qfull_cmd(vha, imm, 0, 0);
3113
+
#else
3114
+
if (rc) {
3115
+
}
3107
3116
#endif
3108
3117
goto done;
3109
3118
}
···
6454
6457
if (!vha->flags.online)
6455
6458
return;
6456
6459
6457
-
while (ha->tgt.atio_ring_ptr->signature != ATIO_PROCESSED) {
6460
+
while ((ha->tgt.atio_ring_ptr->signature != ATIO_PROCESSED) ||
6461
+
fcpcmd_is_corrupted(ha->tgt.atio_ring_ptr)) {
6458
6462
pkt = (struct atio_from_isp *)ha->tgt.atio_ring_ptr;
6459
6463
cnt = pkt->u.raw.entry_count;
6460
6464
6461
-
qlt_24xx_atio_pkt_all_vps(vha, (struct atio_from_isp *)pkt,
6462
-
ha_locked);
6465
+
if (unlikely(fcpcmd_is_corrupted(ha->tgt.atio_ring_ptr))) {
6466
+
/*
6467
+
* This packet is corrupted. The header + payload
6468
+
* can not be trusted. There is no point in passing
6469
+
* it further up.
6470
+
*/
6471
+
ql_log(ql_log_warn, vha, 0xffff,
6472
+
"corrupted fcp frame SID[%3phN] OXID[%04x] EXCG[%x] %64phN\n",
6473
+
pkt->u.isp24.fcp_hdr.s_id,
6474
+
be16_to_cpu(pkt->u.isp24.fcp_hdr.ox_id),
6475
+
le32_to_cpu(pkt->u.isp24.exchange_addr), pkt);
6476
+
6477
+
adjust_corrupted_atio(pkt);
6478
+
qlt_send_term_exchange(vha, NULL, pkt, ha_locked, 0);
6479
+
} else {
6480
+
qlt_24xx_atio_pkt_all_vps(vha,
6481
+
(struct atio_from_isp *)pkt, ha_locked);
6482
+
}
6463
6483
6464
6484
for (i = 0; i < cnt; i++) {
6465
6485
ha->tgt.atio_ring_index++;
···
6559
6545
6560
6546
/* Disable Full Login after LIP */
6561
6547
nv->host_p &= cpu_to_le32(~BIT_10);
6548
+
6549
+
/*
6550
+
* clear BIT 15 explicitly as we have seen at least
6551
+
* a couple of instances where this was set and this
6552
+
* was causing the firmware to not be initialized.
6553
+
*/
6554
+
nv->firmware_options_1 &= cpu_to_le32(~BIT_15);
6562
6555
/* Enable target PRLI control */
6563
6556
nv->firmware_options_2 |= cpu_to_le32(BIT_14);
6564
6557
} else {
···
6580
6559
}
6581
6560
return;
6582
6561
}
6583
-
6584
-
/* out-of-order frames reassembly */
6585
-
nv->firmware_options_3 |= BIT_6|BIT_9;
6586
6562
6587
6563
if (ha->tgt.enable_class_2) {
6588
6564
if (vha->flags.init_done)
···
6647
6629
/* Disable ini mode, if requested */
6648
6630
if (!qla_ini_mode_enabled(vha))
6649
6631
nv->firmware_options_1 |= cpu_to_le32(BIT_5);
6650
-
6651
6632
/* Disable Full Login after LIP */
6652
6633
nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
6653
6634
/* Enable initial LIP */
6654
6635
nv->firmware_options_1 &= cpu_to_le32(~BIT_9);
6636
+
/*
6637
+
* clear BIT 15 explicitly as we have seen at
6638
+
* least a couple of instances where this was set
6639
+
* and this was causing the firmware to not be
6640
+
* initialized.
6641
+
*/
6642
+
nv->firmware_options_1 &= cpu_to_le32(~BIT_15);
6655
6643
if (ql2xtgt_tape_enable)
6656
6644
/* Enable FC tape support */
6657
6645
nv->firmware_options_2 |= cpu_to_le32(BIT_12);
···
6681
6657
}
6682
6658
return;
6683
6659
}
6684
-
6685
-
/* out-of-order frames reassembly */
6686
-
nv->firmware_options_3 |= BIT_6|BIT_9;
6687
6660
6688
6661
if (ha->tgt.enable_class_2) {
6689
6662
if (vha->flags.init_done)
+21
-1
drivers/scsi/qla2xxx/qla_target.h
+21
-1
drivers/scsi/qla2xxx/qla_target.h
···
427
427
struct {
428
428
uint8_t entry_type; /* Entry type. */
429
429
uint8_t entry_count; /* Entry count. */
430
-
uint8_t data[58];
430
+
__le16 attr_n_length;
431
+
#define FCP_CMD_LENGTH_MASK 0x0fff
432
+
#define FCP_CMD_LENGTH_MIN 0x38
433
+
uint8_t data[56];
431
434
uint32_t signature;
432
435
#define ATIO_PROCESSED 0xDEADDEAD /* Signature */
433
436
} raw;
434
437
} u;
435
438
} __packed;
439
+
440
+
static inline int fcpcmd_is_corrupted(struct atio *atio)
441
+
{
442
+
if (atio->entry_type == ATIO_TYPE7 &&
443
+
(le16_to_cpu(atio->attr_n_length & FCP_CMD_LENGTH_MASK) <
444
+
FCP_CMD_LENGTH_MIN))
445
+
return 1;
446
+
else
447
+
return 0;
448
+
}
449
+
450
+
/* adjust corrupted atio so we won't trip over the same entry again. */
451
+
static inline void adjust_corrupted_atio(struct atio_from_isp *atio)
452
+
{
453
+
atio->u.raw.attr_n_length = cpu_to_le16(FCP_CMD_LENGTH_MIN);
454
+
atio->u.isp24.fcp_cmnd.add_cdb_len = 0;
455
+
}
436
456
437
457
#define CTIO_TYPE7 0x12 /* Continue target I/O entry (for 24xx) */
438
458
+24
drivers/scsi/qla2xxx/qla_tmpl.c
+24
drivers/scsi/qla2xxx/qla_tmpl.c
···
433
433
count++;
434
434
}
435
435
}
436
+
} else if (QLA_TGT_MODE_ENABLED() &&
437
+
ent->t263.queue_type == T263_QUEUE_TYPE_ATIO) {
438
+
struct qla_hw_data *ha = vha->hw;
439
+
struct atio *atr = ha->tgt.atio_ring;
440
+
441
+
if (atr || !buf) {
442
+
length = ha->tgt.atio_q_length;
443
+
qla27xx_insert16(0, buf, len);
444
+
qla27xx_insert16(length, buf, len);
445
+
qla27xx_insertbuf(atr, length * sizeof(*atr), buf, len);
446
+
count++;
447
+
}
436
448
} else {
437
449
ql_dbg(ql_dbg_misc, vha, 0xd026,
438
450
"%s: unknown queue %x\n", __func__, ent->t263.queue_type);
···
687
675
*rsp->in_ptr : 0, buf, len);
688
676
count++;
689
677
}
678
+
}
679
+
} else if (QLA_TGT_MODE_ENABLED() &&
680
+
ent->t274.queue_type == T274_QUEUE_TYPE_ATIO_SHAD) {
681
+
struct qla_hw_data *ha = vha->hw;
682
+
struct atio *atr = ha->tgt.atio_ring_ptr;
683
+
684
+
if (atr || !buf) {
685
+
qla27xx_insert16(0, buf, len);
686
+
qla27xx_insert16(1, buf, len);
687
+
qla27xx_insert32(ha->tgt.atio_q_in ?
688
+
readl(ha->tgt.atio_q_in) : 0, buf, len);
689
+
count++;
690
690
}
691
691
} else {
692
692
ql_dbg(ql_dbg_misc, vha, 0xd02f,
+2
-2
drivers/scsi/qla2xxx/tcm_qla2xxx.c
+2
-2
drivers/scsi/qla2xxx/tcm_qla2xxx.c
···
1800
1800
{
1801
1801
return sprintf(page,
1802
1802
"TCM QLOGIC QLA2XXX NPIV capable fabric module %s on %s/%s on "
1803
-
UTS_RELEASE"\n", TCM_QLA2XXX_VERSION, utsname()->sysname,
1803
+
UTS_RELEASE"\n", QLA2XXX_VERSION, utsname()->sysname,
1804
1804
utsname()->machine);
1805
1805
}
1806
1806
···
1906
1906
int ret;
1907
1907
1908
1908
pr_debug("TCM QLOGIC QLA2XXX fabric module %s on %s/%s on "
1909
-
UTS_RELEASE"\n", TCM_QLA2XXX_VERSION, utsname()->sysname,
1909
+
UTS_RELEASE"\n", QLA2XXX_VERSION, utsname()->sysname,
1910
1910
utsname()->machine);
1911
1911
1912
1912
ret = target_register_template(&tcm_qla2xxx_ops);