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tools/power turbostat: version 2026.02.14

Since release 2025.12.02:

Add L2 statistics columns for recent Intel processors:
L2MRPS = L2 Cache M-References Per Second
L2%hit = L2 Cache Hit %

Sort work and output by cpu# rather than core#

This commit:
Version number and white space (indent -l160)
No functional change.

Signed-off-by: Len Brown <len.brown@intel.com>

Len Brown 51496091 96718ad2

+21 -36
+21 -36
tools/power/x86/turbostat/turbostat.c
··· 3 3 * turbostat -- show CPU frequency and C-state residency 4 4 * on modern Intel and AMD processors. 5 5 * 6 - * Copyright (c) 2025 Intel Corporation. 6 + * Copyright (c) 2010 - 2026 Intel Corporation 7 7 * Len Brown <len.brown@intel.com> 8 8 */ 9 9 ··· 2735 2735 " sets the Thermal Control Circuit temperature in\n" 2736 2736 " degrees Celsius\n" 2737 2737 " -h, --help\n" 2738 - " print this help message\n" 2739 - " -v, --version\n\t\tprint version information\n\nFor more help, run \"man turbostat\"\n"); 2738 + " print this help message\n -v, --version\n\t\tprint version information\n\nFor more help, run \"man turbostat\"\n"); 2740 2739 } 2741 2740 2742 2741 /* ··· 3670 3671 if (DO_BIC(BIC_RAM_J)) 3671 3672 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&p->energy_dram, RAPL_UNIT_JOULES, interval_float)); 3672 3673 if (DO_BIC(BIC_PKG__)) 3673 - outp += 3674 - sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&p->rapl_pkg_perf_status, RAPL_UNIT_WATTS, interval_float)); 3674 + outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&p->rapl_pkg_perf_status, RAPL_UNIT_WATTS, interval_float)); 3675 3675 if (DO_BIC(BIC_RAM__)) 3676 - outp += 3677 - sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&p->rapl_dram_perf_status, RAPL_UNIT_WATTS, interval_float)); 3676 + outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&p->rapl_dram_perf_status, RAPL_UNIT_WATTS, interval_float)); 3678 3677 /* UncMHz */ 3679 3678 if (DO_BIC(BIC_UNCORE_MHZ)) 3680 3679 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->uncore_mhz); ··· 3722 3725 } 3723 3726 3724 3727 if (DO_BIC(BIC_SysWatt) && (t == average.threads)) 3725 - outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 3726 - rapl_counter_get_value(&pplat_cnt->energy_psys, RAPL_UNIT_WATTS, interval_float)); 3728 + outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&pplat_cnt->energy_psys, RAPL_UNIT_WATTS, interval_float)); 3727 3729 if (DO_BIC(BIC_Sys_J) && (t == average.threads)) 3728 - outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 3729 - rapl_counter_get_value(&pplat_cnt->energy_psys, RAPL_UNIT_JOULES, interval_float)); 3730 + outp += sprintf(outp, fmt8, (printed++ ? delim : ""), rapl_counter_get_value(&pplat_cnt->energy_psys, RAPL_UNIT_JOULES, interval_float)); 3730 3731 3731 3732 done: 3732 3733 if (*(outp - 1) != '\n') ··· 3937 3942 /* check for TSC < 1 Mcycles over interval */ 3938 3943 if (old->tsc < (1000 * 1000)) 3939 3944 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n" 3940 - "You can disable all c-states by booting with \"idle=poll\"\n" "or just the deep ones with \"processor.max_cstate=1\""); 3945 + "You can disable all c-states by booting with \"idle=poll\"\nor just the deep ones with \"processor.max_cstate=1\""); 3941 3946 3942 3947 old->c1 = new->c1 - old->c1; 3943 3948 ··· 5541 5546 int shift; 5542 5547 5543 5548 get_msr(master_cpu, trl_msr_offset, &msr); 5544 - fprintf(outf, "cpu%d: MSR_%sTURBO_RATIO_LIMIT: 0x%08llx\n", 5545 - master_cpu, trl_msr_offset == MSR_SECONDARY_TURBO_RATIO_LIMIT ? "SECONDARY_" : "", msr); 5549 + fprintf(outf, "cpu%d: MSR_%sTURBO_RATIO_LIMIT: 0x%08llx\n", master_cpu, trl_msr_offset == MSR_SECONDARY_TURBO_RATIO_LIMIT ? "SECONDARY_" : "", msr); 5546 5550 5547 5551 if (platform->trl_msrs & TRL_CORECOUNT) { 5548 5552 get_msr(master_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts); ··· 8013 8019 return -1; 8014 8020 } 8015 8021 8016 - fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr, 8017 - rapl_power_units, rapl_energy_units, rapl_time_units); 8022 + fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr, rapl_power_units, rapl_energy_units, rapl_time_units); 8018 8023 8019 8024 if (valid_rapl_msrs & RAPL_PKG_POWER_INFO) { 8020 8025 ··· 8045 8052 return -9; 8046 8053 8047 8054 fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr); 8048 - fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n", 8049 - cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN"); 8055 + fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n", cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN"); 8050 8056 } 8051 8057 8052 8058 if (valid_rapl_msrs & RAPL_DRAM_POWER_INFO) { ··· 8382 8390 if (!get_msr(master_cpu, MSR_MISC_FEATURE_CONTROL, &msr)) 8383 8391 fprintf(outf, 8384 8392 "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n", 8385 - master_cpu, msr, msr & (0 << 0) ? "No-" : "", msr & (1 << 0) ? "No-" : "", 8386 - msr & (2 << 0) ? "No-" : "", msr & (3 << 0) ? "No-" : ""); 8393 + master_cpu, msr, msr & (0 << 0) ? "No-" : "", msr & (1 << 0) ? "No-" : "", msr & (2 << 0) ? "No-" : "", msr & (3 << 0) ? "No-" : ""); 8387 8394 } 8388 8395 8389 8396 /* ··· 8424 8433 return; 8425 8434 8426 8435 if (!get_msr(master_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr)) 8427 - fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", 8428 - master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 8436 + fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 8429 8437 8430 8438 if (!get_msr(master_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr)) 8431 - fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", 8432 - master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 8439 + fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); 8433 8440 } 8434 8441 8435 8442 void print_dev_latency(void) ··· 8745 8756 /* Assumes msr_counter_info is populated */ 8746 8757 static int has_amperf_access(void) 8747 8758 { 8748 - return cpuid_has_aperf_mperf && msr_counter_arch_infos[MSR_ARCH_INFO_APERF_INDEX].present && 8749 - msr_counter_arch_infos[MSR_ARCH_INFO_MPERF_INDEX].present; 8759 + return cpuid_has_aperf_mperf && msr_counter_arch_infos[MSR_ARCH_INFO_APERF_INDEX].present && msr_counter_arch_infos[MSR_ARCH_INFO_MPERF_INDEX].present; 8750 8760 } 8751 8761 8752 8762 int *get_cstate_perf_group_fd(struct cstate_counter_info_t *cci, const char *group_name) ··· 8956 8968 if (!per_core && pkg_visited[pkg_id]) 8957 8969 continue; 8958 8970 8959 - const bool counter_needed = BIC_IS_ENABLED(cai->bic_number) || 8960 - (soft_c1 && (cai->flags & CSTATE_COUNTER_FLAG_SOFT_C1_DEPENDENCY)); 8971 + const bool counter_needed = BIC_IS_ENABLED(cai->bic_number) || (soft_c1 && (cai->flags & CSTATE_COUNTER_FLAG_SOFT_C1_DEPENDENCY)); 8961 8972 const bool counter_supported = (platform->supported_cstates & cai->feature_mask); 8962 8973 8963 8974 if (counter_needed && counter_supported) { ··· 9246 9259 if (crystal_hz) { 9247 9260 tsc_hz = (unsigned long long)crystal_hz *ebx_tsc / eax_crystal; 9248 9261 if (!quiet) 9249 - fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n", 9250 - tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal); 9262 + fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n", tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal); 9251 9263 } 9252 9264 } 9253 9265 } ··· 9631 9645 if (cpus[i].ht_id == 0) 9632 9646 topo.num_cores++; 9633 9647 } 9634 - topo.max_core_id = max_core_id; /* within a package */ 9648 + topo.max_core_id = max_core_id; /* within a package */ 9635 9649 topo.max_package_id = max_package_id; 9636 9650 topo.num_cores = (max_core_id + 1) * topo.num_packages; /* per system */ 9637 9651 ··· 9698 9712 error: 9699 9713 err(1, "calloc counters_1"); 9700 9714 } 9715 + 9701 9716 void allocate_counters(struct counters *counters) 9702 9717 { 9703 9718 int i; ··· 10355 10368 10356 10369 if (BIC_IS_ENABLED(BIC_Diec6)) { 10357 10370 pmt_add_counter(PMT_MTL_DC6_GUID, PMT_MTL_DC6_SEQ, "Die%c6", PMT_TYPE_XTAL_TIME, 10358 - PMT_COUNTER_MTL_DC6_LSB, PMT_COUNTER_MTL_DC6_MSB, PMT_COUNTER_MTL_DC6_OFFSET, 10359 - SCOPE_PACKAGE, FORMAT_DELTA, 0, PMT_OPEN_TRY); 10371 + PMT_COUNTER_MTL_DC6_LSB, PMT_COUNTER_MTL_DC6_MSB, PMT_COUNTER_MTL_DC6_OFFSET, SCOPE_PACKAGE, FORMAT_DELTA, 0, PMT_OPEN_TRY); 10360 10372 } 10361 10373 10362 10374 if (BIC_IS_ENABLED(BIC_CPU_c1e)) { ··· 10533 10547 10534 10548 void print_version() 10535 10549 { 10536 - fprintf(outf, "turbostat version 2026.02.04 - Len Brown <lenb@kernel.org>\n"); 10550 + fprintf(outf, "turbostat version 2026.02.14 - Len Brown <lenb@kernel.org>\n"); 10537 10551 } 10538 10552 10539 10553 #define COMMAND_LINE_SIZE 2048 ··· 11155 11169 } 11156 11170 11157 11171 if (direct_path && has_guid) { 11158 - printf("%s: path and guid+seq parameters are mutually exclusive\n" 11159 - "notice: passed guid=0x%x and path=%s\n", __func__, guid, direct_path); 11172 + printf("%s: path and guid+seq parameters are mutually exclusive\nnotice: passed guid=0x%x and path=%s\n", __func__, guid, direct_path); 11160 11173 exit(1); 11161 11174 } 11162 11175