Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
i2c: designware: Replace magic numbers with named constants
Replace various magic numbers with properly named constants to improve
code readability and maintainability. This includes constants for
register access, timing adjustments, timeouts, FIFO parameters,
and default values.
This makes the code more self-documenting without altering any
functionality.
Signed-off-by: Artem Shimko <a.shimko.dev@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20251211122947.1469666-1-a.shimko.dev@gmail.com
authored by
Artem Shimko
and committed by
Andi Shyti
518edab3
f6551f78
+31
-11
+18
-11
drivers/i2c/busses/i2c-designware-common.c
+18
-11
drivers/i2c/busses/i2c-designware-common.c
···
12
12
#define DEFAULT_SYMBOL_NAMESPACE "I2C_DW_COMMON"
13
13
14
14
#include <linux/acpi.h>
15
+
#include <linux/bitfield.h>
15
16
#include <linux/clk.h>
16
17
#include <linux/delay.h>
17
18
#include <linux/device.h>
···
34
33
#include <linux/units.h>
35
34
36
35
#include "i2c-designware-core.h"
36
+
37
+
#define DW_IC_DEFAULT_BUS_CAPACITANCE_pF 100
38
+
#define DW_IC_ABORT_TIMEOUT_US 10
39
+
#define DW_IC_BUSY_POLL_TIMEOUT_US (1 * USEC_PER_MSEC)
37
40
38
41
static const char *const abort_sources[] = {
39
42
[ABRT_7B_ADDR_NOACK] =
···
111
106
struct dw_i2c_dev *dev = context;
112
107
113
108
*val = readw(dev->base + reg) |
114
-
(readw(dev->base + reg + 2) << 16);
109
+
(readw(dev->base + reg + DW_IC_REG_STEP_BYTES) << DW_IC_REG_WORD_SHIFT);
115
110
116
111
return 0;
117
112
}
···
121
116
struct dw_i2c_dev *dev = context;
122
117
123
118
writew(val, dev->base + reg);
124
-
writew(val >> 16, dev->base + reg + 2);
119
+
writew(val >> DW_IC_REG_WORD_SHIFT, dev->base + reg + DW_IC_REG_STEP_BYTES);
125
120
126
121
return 0;
127
122
}
···
170
165
if (reg == swab32(DW_IC_COMP_TYPE_VALUE)) {
171
166
map_cfg.reg_read = dw_reg_read_swab;
172
167
map_cfg.reg_write = dw_reg_write_swab;
173
-
} else if (reg == (DW_IC_COMP_TYPE_VALUE & 0x0000ffff)) {
168
+
} else if (reg == lower_16_bits(DW_IC_COMP_TYPE_VALUE)) {
174
169
map_cfg.reg_read = dw_reg_read_word;
175
170
map_cfg.reg_write = dw_reg_write_word;
176
171
} else if (reg != DW_IC_COMP_TYPE_VALUE) {
···
389
384
i2c_parse_fw_timings(device, t, false);
390
385
391
386
if (device_property_read_u32(device, "snps,bus-capacitance-pf", &dev->bus_capacitance_pF))
392
-
dev->bus_capacitance_pF = 100;
387
+
dev->bus_capacitance_pF = DW_IC_DEFAULT_BUS_CAPACITANCE_pF;
393
388
394
389
dev->clk_freq_optimized = device_property_read_bool(device, "snps,clk-freq-optimized");
395
390
···
544
539
545
540
regmap_write(dev->map, DW_IC_ENABLE, enable | DW_IC_ENABLE_ABORT);
546
541
ret = regmap_read_poll_timeout(dev->map, DW_IC_ENABLE, enable,
547
-
!(enable & DW_IC_ENABLE_ABORT), 10,
548
-
100);
542
+
!(enable & DW_IC_ENABLE_ABORT),
543
+
DW_IC_ABORT_TIMEOUT_US,
544
+
10 * DW_IC_ABORT_TIMEOUT_US);
549
545
if (ret)
550
546
dev_err(dev->dev, "timeout while trying to abort current transfer\n");
551
547
}
···
558
552
* in that case this test reads zero and exits the loop.
559
553
*/
560
554
regmap_read(dev->map, DW_IC_ENABLE_STATUS, &status);
561
-
if ((status & 1) == 0)
555
+
if (!(status & 1))
562
556
return;
563
557
564
558
/*
···
641
635
642
636
ret = regmap_read_poll_timeout(dev->map, DW_IC_STATUS, status,
643
637
!(status & DW_IC_STATUS_ACTIVITY),
644
-
1100, 20000);
638
+
DW_IC_BUSY_POLL_TIMEOUT_US,
639
+
20 * DW_IC_BUSY_POLL_TIMEOUT_US);
645
640
if (ret) {
646
641
dev_warn(dev->dev, "timeout waiting for bus ready\n");
647
642
···
706
699
if (ret)
707
700
return ret;
708
701
709
-
tx_fifo_depth = ((param >> 16) & 0xff) + 1;
710
-
rx_fifo_depth = ((param >> 8) & 0xff) + 1;
702
+
tx_fifo_depth = FIELD_GET(DW_IC_FIFO_TX_FIELD, param) + 1;
703
+
rx_fifo_depth = FIELD_GET(DW_IC_FIFO_RX_FIELD, param) + 1;
711
704
if (!dev->tx_fifo_depth) {
712
705
dev->tx_fifo_depth = tx_fifo_depth;
713
706
dev->rx_fifo_depth = rx_fifo_depth;
714
-
} else if (tx_fifo_depth >= 2) {
707
+
} else if (tx_fifo_depth >= DW_IC_FIFO_MIN_DEPTH) {
715
708
dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
716
709
tx_fifo_depth);
717
710
dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
+13
drivers/i2c/busses/i2c-designware-core.h
+13
drivers/i2c/busses/i2c-designware-core.h
···
42
42
#define DW_IC_DATA_CMD_FIRST_DATA_BYTE BIT(11)
43
43
44
44
/*
45
+
* Register access parameters
46
+
*/
47
+
#define DW_IC_REG_STEP_BYTES 2
48
+
#define DW_IC_REG_WORD_SHIFT 16
49
+
50
+
/*
51
+
* FIFO depth configuration
52
+
*/
53
+
#define DW_IC_FIFO_TX_FIELD GENMASK(23, 16)
54
+
#define DW_IC_FIFO_RX_FIELD GENMASK(15, 8)
55
+
#define DW_IC_FIFO_MIN_DEPTH 2
56
+
57
+
/*
45
58
* Registers offset
46
59
*/
47
60
#define DW_IC_CON 0x00