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Merge branch 'ucc_geth-phylink-conversion'

Maxime Chevallier says:

====================
net: freescale: ucc_geth: Phylink conversion

This is V3 of the phylink conversion for ucc_geth.

The main changes in this V3 are related to error handling in the patches
1 and 10 to report an error when the deprecated "interface" property is
found in DT. Doing so, I found and addressed some issues with the jump
labels in the error paths, impacting patches 1 and 10.

The rest of the changes are just a rebase on net-next.

Some of the V2 changes haven't been reviewed, so I stress out that I'm
still uncertain about the way WoL is handled is patches 4 and 10.

Thanks,

Maxime

Link to V1: https://lore.kernel.org/netdev/20241107170255.1058124-1-maxime.chevallier@bootlin.com/
Link to V2: https://lore.kernel.org/netdev/20241114153603.307872-1-maxime.chevallier@bootlin.com/
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+266 -435
+1 -2
drivers/net/ethernet/freescale/Kconfig
··· 81 81 tristate "Freescale QE Gigabit Ethernet" 82 82 depends on QUICC_ENGINE && PPC32 83 83 select FSL_PQ_MDIO 84 - select PHYLIB 85 - select FIXED_PHY 84 + select PHYLINK 86 85 help 87 86 This driver supports the Gigabit Ethernet mode of the QUICC Engine, 88 87 which is available on some Freescale SOCs.
+226 -374
drivers/net/ethernet/freescale/ucc_geth.c
··· 26 26 #include <linux/dma-mapping.h> 27 27 #include <linux/mii.h> 28 28 #include <linux/phy.h> 29 - #include <linux/phy_fixed.h> 29 + #include <linux/phylink.h> 30 30 #include <linux/workqueue.h> 31 31 #include <linux/of.h> 32 32 #include <linux/of_address.h> ··· 34 34 #include <linux/of_mdio.h> 35 35 #include <linux/of_net.h> 36 36 #include <linux/platform_device.h> 37 + #include <linux/rtnetlink.h> 37 38 38 39 #include <linux/uaccess.h> 39 40 #include <asm/irq.h> ··· 133 132 .transmitFlowControl = 1, 134 133 .maxGroupAddrInHash = 4, 135 134 .maxIndAddrInHash = 4, 136 - .prel = 7, 137 135 .maxFrameLength = 1518+16, /* Add extra bytes for VLANs etc. */ 138 136 .minFrameLength = 64, 139 137 .maxD1Length = 1520+16, /* Add extra bytes for VLANs etc. */ ··· 1205 1205 return 0; 1206 1206 } 1207 1207 1208 - static int init_check_frame_length_mode(int length_check, 1209 - u32 __iomem *maccfg2_register) 1210 - { 1211 - u32 value = 0; 1212 - 1213 - value = in_be32(maccfg2_register); 1214 - 1215 - if (length_check) 1216 - value |= MACCFG2_LC; 1217 - else 1218 - value &= ~MACCFG2_LC; 1219 - 1220 - out_be32(maccfg2_register, value); 1221 - return 0; 1222 - } 1223 - 1224 - static int init_preamble_length(u8 preamble_length, 1225 - u32 __iomem *maccfg2_register) 1226 - { 1227 - if ((preamble_length < 3) || (preamble_length > 7)) 1228 - return -EINVAL; 1229 - 1230 - clrsetbits_be32(maccfg2_register, MACCFG2_PREL_MASK, 1231 - preamble_length << MACCFG2_PREL_SHIFT); 1232 - 1233 - return 0; 1234 - } 1235 - 1236 1208 static int init_rx_parameters(int reject_broadcast, 1237 1209 int receive_short_frames, 1238 1210 int promiscuous, u32 __iomem *upsmr_register) ··· 1259 1287 return 0; 1260 1288 } 1261 1289 1262 - static int adjust_enet_interface(struct ucc_geth_private *ugeth) 1290 + static bool phy_interface_mode_is_reduced(phy_interface_t interface) 1263 1291 { 1264 - struct ucc_geth_info *ug_info; 1265 - struct ucc_geth __iomem *ug_regs; 1266 - struct ucc_fast __iomem *uf_regs; 1267 - int ret_val; 1268 - u32 upsmr, maccfg2; 1269 - u16 value; 1270 - 1271 - ugeth_vdbg("%s: IN", __func__); 1272 - 1273 - ug_info = ugeth->ug_info; 1274 - ug_regs = ugeth->ug_regs; 1275 - uf_regs = ugeth->uccf->uf_regs; 1276 - 1277 - /* Set MACCFG2 */ 1278 - maccfg2 = in_be32(&ug_regs->maccfg2); 1279 - maccfg2 &= ~MACCFG2_INTERFACE_MODE_MASK; 1280 - if ((ugeth->max_speed == SPEED_10) || 1281 - (ugeth->max_speed == SPEED_100)) 1282 - maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE; 1283 - else if (ugeth->max_speed == SPEED_1000) 1284 - maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE; 1285 - maccfg2 |= ug_info->padAndCrc; 1286 - out_be32(&ug_regs->maccfg2, maccfg2); 1287 - 1288 - /* Set UPSMR */ 1289 - upsmr = in_be32(&uf_regs->upsmr); 1290 - upsmr &= ~(UCC_GETH_UPSMR_RPM | UCC_GETH_UPSMR_R10M | 1291 - UCC_GETH_UPSMR_TBIM | UCC_GETH_UPSMR_RMM); 1292 - if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || 1293 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || 1294 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || 1295 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || 1296 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || 1297 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { 1298 - if (ugeth->phy_interface != PHY_INTERFACE_MODE_RMII) 1299 - upsmr |= UCC_GETH_UPSMR_RPM; 1300 - switch (ugeth->max_speed) { 1301 - case SPEED_10: 1302 - upsmr |= UCC_GETH_UPSMR_R10M; 1303 - fallthrough; 1304 - case SPEED_100: 1305 - if (ugeth->phy_interface != PHY_INTERFACE_MODE_RTBI) 1306 - upsmr |= UCC_GETH_UPSMR_RMM; 1307 - } 1308 - } 1309 - if ((ugeth->phy_interface == PHY_INTERFACE_MODE_TBI) || 1310 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { 1311 - upsmr |= UCC_GETH_UPSMR_TBIM; 1312 - } 1313 - if (ugeth->phy_interface == PHY_INTERFACE_MODE_SGMII) 1314 - upsmr |= UCC_GETH_UPSMR_SGMM; 1315 - 1316 - out_be32(&uf_regs->upsmr, upsmr); 1317 - 1318 - /* Disable autonegotiation in tbi mode, because by default it 1319 - comes up in autonegotiation mode. */ 1320 - /* Note that this depends on proper setting in utbipar register. */ 1321 - if ((ugeth->phy_interface == PHY_INTERFACE_MODE_TBI) || 1322 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { 1323 - struct ucc_geth_info *ug_info = ugeth->ug_info; 1324 - struct phy_device *tbiphy; 1325 - 1326 - if (!ug_info->tbi_node) 1327 - pr_warn("TBI mode requires that the device tree specify a tbi-handle\n"); 1328 - 1329 - tbiphy = of_phy_find_device(ug_info->tbi_node); 1330 - if (!tbiphy) 1331 - pr_warn("Could not get TBI device\n"); 1332 - 1333 - value = phy_read(tbiphy, ENET_TBI_MII_CR); 1334 - value &= ~0x1000; /* Turn off autonegotiation */ 1335 - phy_write(tbiphy, ENET_TBI_MII_CR, value); 1336 - 1337 - put_device(&tbiphy->mdio.dev); 1338 - } 1339 - 1340 - init_check_frame_length_mode(ug_info->lengthCheckRx, &ug_regs->maccfg2); 1341 - 1342 - ret_val = init_preamble_length(ug_info->prel, &ug_regs->maccfg2); 1343 - if (ret_val != 0) { 1344 - if (netif_msg_probe(ugeth)) 1345 - pr_err("Preamble length must be between 3 and 7 inclusive\n"); 1346 - return ret_val; 1347 - } 1348 - 1349 - return 0; 1292 + return phy_interface_mode_is_rgmii(interface) || 1293 + interface == PHY_INTERFACE_MODE_RMII || 1294 + interface == PHY_INTERFACE_MODE_RTBI; 1350 1295 } 1351 1296 1352 1297 static int ugeth_graceful_stop_tx(struct ucc_geth_private *ugeth) ··· 1437 1548 __netdev_watchdog_up(ugeth->ndev); 1438 1549 } 1439 1550 1440 - /* Called every time the controller might need to be made 1441 - * aware of new link state. The PHY code conveys this 1442 - * information through variables in the ugeth structure, and this 1443 - * function converts those variables into the appropriate 1444 - * register values, and can bring down the device if needed. 1445 - */ 1446 - 1447 - static void adjust_link(struct net_device *dev) 1448 - { 1449 - struct ucc_geth_private *ugeth = netdev_priv(dev); 1450 - struct ucc_geth __iomem *ug_regs; 1451 - struct ucc_fast __iomem *uf_regs; 1452 - struct phy_device *phydev = ugeth->phydev; 1453 - int new_state = 0; 1454 - 1455 - ug_regs = ugeth->ug_regs; 1456 - uf_regs = ugeth->uccf->uf_regs; 1457 - 1458 - if (phydev->link) { 1459 - u32 tempval = in_be32(&ug_regs->maccfg2); 1460 - u32 upsmr = in_be32(&uf_regs->upsmr); 1461 - /* Now we make sure that we can be in full duplex mode. 1462 - * If not, we operate in half-duplex mode. */ 1463 - if (phydev->duplex != ugeth->oldduplex) { 1464 - new_state = 1; 1465 - if (!(phydev->duplex)) 1466 - tempval &= ~(MACCFG2_FDX); 1467 - else 1468 - tempval |= MACCFG2_FDX; 1469 - ugeth->oldduplex = phydev->duplex; 1470 - } 1471 - 1472 - if (phydev->speed != ugeth->oldspeed) { 1473 - new_state = 1; 1474 - switch (phydev->speed) { 1475 - case SPEED_1000: 1476 - tempval = ((tempval & 1477 - ~(MACCFG2_INTERFACE_MODE_MASK)) | 1478 - MACCFG2_INTERFACE_MODE_BYTE); 1479 - break; 1480 - case SPEED_100: 1481 - case SPEED_10: 1482 - tempval = ((tempval & 1483 - ~(MACCFG2_INTERFACE_MODE_MASK)) | 1484 - MACCFG2_INTERFACE_MODE_NIBBLE); 1485 - /* if reduced mode, re-set UPSMR.R10M */ 1486 - if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || 1487 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || 1488 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || 1489 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || 1490 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || 1491 - (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { 1492 - if (phydev->speed == SPEED_10) 1493 - upsmr |= UCC_GETH_UPSMR_R10M; 1494 - else 1495 - upsmr &= ~UCC_GETH_UPSMR_R10M; 1496 - } 1497 - break; 1498 - default: 1499 - if (netif_msg_link(ugeth)) 1500 - pr_warn( 1501 - "%s: Ack! Speed (%d) is not 10/100/1000!", 1502 - dev->name, phydev->speed); 1503 - break; 1504 - } 1505 - ugeth->oldspeed = phydev->speed; 1506 - } 1507 - 1508 - if (!ugeth->oldlink) { 1509 - new_state = 1; 1510 - ugeth->oldlink = 1; 1511 - } 1512 - 1513 - if (new_state) { 1514 - /* 1515 - * To change the MAC configuration we need to disable 1516 - * the controller. To do so, we have to either grab 1517 - * ugeth->lock, which is a bad idea since 'graceful 1518 - * stop' commands might take quite a while, or we can 1519 - * quiesce driver's activity. 1520 - */ 1521 - ugeth_quiesce(ugeth); 1522 - ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); 1523 - 1524 - out_be32(&ug_regs->maccfg2, tempval); 1525 - out_be32(&uf_regs->upsmr, upsmr); 1526 - 1527 - ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); 1528 - ugeth_activate(ugeth); 1529 - } 1530 - } else if (ugeth->oldlink) { 1531 - new_state = 1; 1532 - ugeth->oldlink = 0; 1533 - ugeth->oldspeed = 0; 1534 - ugeth->oldduplex = -1; 1535 - } 1536 - 1537 - if (new_state && netif_msg_link(ugeth)) 1538 - phy_print_status(phydev); 1539 - } 1540 - 1541 1551 /* Initialize TBI PHY interface for communicating with the 1542 1552 * SERDES lynx PHY on the chip. We communicate with this PHY 1543 1553 * through the MDIO bus on each controller, treating it as a ··· 1452 1664 struct phy_device *tbiphy; 1453 1665 1454 1666 if (!ug_info->tbi_node) { 1455 - dev_warn(&dev->dev, "SGMII mode requires that the device " 1456 - "tree specify a tbi-handle\n"); 1667 + dev_warn(&dev->dev, "SGMII mode requires that the device tree specify a tbi-handle\n"); 1457 1668 return; 1458 1669 } 1459 1670 ··· 1483 1696 put_device(&tbiphy->mdio.dev); 1484 1697 } 1485 1698 1486 - /* Configure the PHY for dev. 1487 - * returns 0 if success. -1 if failure 1488 - */ 1489 - static int init_phy(struct net_device *dev) 1699 + static void ugeth_mac_link_up(struct phylink_config *config, struct phy_device *phy, 1700 + unsigned int mode, phy_interface_t interface, 1701 + int speed, int duplex, bool tx_pause, bool rx_pause) 1490 1702 { 1491 - struct ucc_geth_private *priv = netdev_priv(dev); 1492 - struct ucc_geth_info *ug_info = priv->ug_info; 1493 - struct phy_device *phydev; 1703 + struct net_device *ndev = to_net_dev(config->dev); 1704 + struct ucc_geth_private *ugeth = netdev_priv(ndev); 1705 + struct ucc_geth_info *ug_info = ugeth->ug_info; 1706 + struct ucc_geth __iomem *ug_regs = ugeth->ug_regs; 1707 + struct ucc_fast __iomem *uf_regs = ugeth->uccf->uf_regs; 1708 + u32 old_maccfg2, maccfg2 = in_be32(&ug_regs->maccfg2); 1709 + u32 old_upsmr, upsmr = in_be32(&uf_regs->upsmr); 1494 1710 1495 - priv->oldlink = 0; 1496 - priv->oldspeed = 0; 1497 - priv->oldduplex = -1; 1711 + old_maccfg2 = maccfg2; 1712 + old_upsmr = upsmr; 1498 1713 1499 - phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0, 1500 - priv->phy_interface); 1501 - if (!phydev) { 1502 - dev_err(&dev->dev, "Could not attach to PHY\n"); 1503 - return -ENODEV; 1714 + /* No length check */ 1715 + maccfg2 &= ~MACCFG2_LC; 1716 + maccfg2 &= ~MACCFG2_INTERFACE_MODE_MASK; 1717 + upsmr &= ~(UCC_GETH_UPSMR_RPM | UCC_GETH_UPSMR_R10M | 1718 + UCC_GETH_UPSMR_TBIM | UCC_GETH_UPSMR_RMM); 1719 + 1720 + if (speed == SPEED_10 || speed == SPEED_100) 1721 + maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE; 1722 + else if (speed == SPEED_1000) 1723 + maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE; 1724 + 1725 + maccfg2 |= ug_info->padAndCrc; 1726 + 1727 + if (phy_interface_mode_is_reduced(interface)) { 1728 + 1729 + if (interface != PHY_INTERFACE_MODE_RMII) 1730 + upsmr |= UCC_GETH_UPSMR_RPM; 1731 + 1732 + switch (speed) { 1733 + case SPEED_10: 1734 + upsmr |= UCC_GETH_UPSMR_R10M; 1735 + fallthrough; 1736 + case SPEED_100: 1737 + if (interface != PHY_INTERFACE_MODE_RTBI) 1738 + upsmr |= UCC_GETH_UPSMR_RMM; 1739 + } 1504 1740 } 1505 1741 1506 - if (priv->phy_interface == PHY_INTERFACE_MODE_SGMII) 1507 - uec_configure_serdes(dev); 1742 + if (interface == PHY_INTERFACE_MODE_TBI || 1743 + interface == PHY_INTERFACE_MODE_RTBI) 1744 + upsmr |= UCC_GETH_UPSMR_TBIM; 1508 1745 1509 - phy_set_max_speed(phydev, priv->max_speed); 1746 + if (interface == PHY_INTERFACE_MODE_SGMII) 1747 + upsmr |= UCC_GETH_UPSMR_SGMM; 1510 1748 1511 - priv->phydev = phydev; 1749 + if (duplex == DUPLEX_HALF) 1750 + maccfg2 &= ~(MACCFG2_FDX); 1751 + else 1752 + maccfg2 |= MACCFG2_FDX; 1512 1753 1513 - return 0; 1754 + if (maccfg2 != old_maccfg2 || upsmr != old_upsmr) { 1755 + /* 1756 + * To change the MAC configuration we need to disable 1757 + * the controller. To do so, we have to either grab 1758 + * ugeth->lock, which is a bad idea since 'graceful 1759 + * stop' commands might take quite a while, or we can 1760 + * quiesce driver's activity. 1761 + */ 1762 + ugeth_quiesce(ugeth); 1763 + ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); 1764 + 1765 + out_be32(&ug_regs->maccfg2, maccfg2); 1766 + out_be32(&uf_regs->upsmr, upsmr); 1767 + 1768 + ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); 1769 + ugeth_activate(ugeth); 1770 + } 1771 + 1772 + if (interface == PHY_INTERFACE_MODE_SGMII) 1773 + uec_configure_serdes(ndev); 1774 + 1775 + if (!phylink_autoneg_inband(mode)) { 1776 + ug_info->aufc = 0; 1777 + ug_info->receiveFlowControl = rx_pause; 1778 + ug_info->transmitFlowControl = tx_pause; 1779 + 1780 + init_flow_control_params(ug_info->aufc, 1781 + ug_info->receiveFlowControl, 1782 + ug_info->transmitFlowControl, 1783 + ug_info->pausePeriod, 1784 + ug_info->extensionField, 1785 + &ugeth->uccf->uf_regs->upsmr, 1786 + &ugeth->ug_regs->uempr, 1787 + &ugeth->ug_regs->maccfg1); 1788 + } 1789 + 1790 + ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); 1791 + } 1792 + 1793 + static void ugeth_mac_link_down(struct phylink_config *config, 1794 + unsigned int mode, phy_interface_t interface) 1795 + { 1796 + struct net_device *ndev = to_net_dev(config->dev); 1797 + struct ucc_geth_private *ugeth = netdev_priv(ndev); 1798 + 1799 + ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); 1800 + } 1801 + 1802 + static void ugeth_mac_config(struct phylink_config *config, unsigned int mode, 1803 + const struct phylink_link_state *state) 1804 + { 1805 + struct net_device *ndev = to_net_dev(config->dev); 1806 + struct ucc_geth_private *ugeth = netdev_priv(ndev); 1807 + struct ucc_geth_info *ug_info = ugeth->ug_info; 1808 + u16 value; 1809 + 1810 + if (state->interface == PHY_INTERFACE_MODE_TBI || 1811 + state->interface == PHY_INTERFACE_MODE_RTBI) { 1812 + struct phy_device *tbiphy; 1813 + 1814 + if (!ug_info->tbi_node) 1815 + pr_warn("TBI mode requires that the device tree specify a tbi-handle\n"); 1816 + 1817 + tbiphy = of_phy_find_device(ug_info->tbi_node); 1818 + if (!tbiphy) 1819 + pr_warn("Could not get TBI device\n"); 1820 + 1821 + value = phy_read(tbiphy, ENET_TBI_MII_CR); 1822 + value &= ~0x1000; /* Turn off autonegotiation */ 1823 + phy_write(tbiphy, ENET_TBI_MII_CR, value); 1824 + 1825 + put_device(&tbiphy->mdio.dev); 1826 + } 1827 + 1828 + if (phylink_autoneg_inband(mode)) { 1829 + ug_info->aufc = 1; 1830 + 1831 + init_flow_control_params(ug_info->aufc, 1, 1, 1832 + ug_info->pausePeriod, 1833 + ug_info->extensionField, 1834 + &ugeth->uccf->uf_regs->upsmr, 1835 + &ugeth->ug_regs->uempr, 1836 + &ugeth->ug_regs->maccfg1); 1837 + } 1514 1838 } 1515 1839 1516 1840 static void ugeth_dump_regs(struct ucc_geth_private *ugeth) ··· 1893 1995 static void ucc_geth_stop(struct ucc_geth_private *ugeth) 1894 1996 { 1895 1997 struct ucc_geth __iomem *ug_regs = ugeth->ug_regs; 1896 - struct phy_device *phydev = ugeth->phydev; 1897 1998 1898 1999 ugeth_vdbg("%s: IN", __func__); 1899 2000 ··· 1901 2004 * Must be done before disabling the controller 1902 2005 * or deadlock may happen. 1903 2006 */ 1904 - phy_stop(phydev); 2007 + phylink_stop(ugeth->phylink); 1905 2008 1906 2009 /* Disable the controller */ 1907 2010 ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); ··· 3143 3246 goto err; 3144 3247 } 3145 3248 3146 - err = adjust_enet_interface(ugeth); 3147 - if (err) { 3148 - netif_err(ugeth, ifup, dev, "Cannot configure net device, aborting\n"); 3149 - goto err; 3150 - } 3151 - 3152 3249 /* Set MACSTNADDR1, MACSTNADDR2 */ 3153 3250 /* For more details see the hardware spec. */ 3154 3251 init_mac_station_addr_regs(dev->dev_addr[0], ··· 3153 3262 dev->dev_addr[5], 3154 3263 &ugeth->ug_regs->macstnaddr1, 3155 3264 &ugeth->ug_regs->macstnaddr2); 3156 - 3157 - err = ugeth_enable(ugeth, COMM_DIR_RX_AND_TX); 3158 - if (err) { 3159 - netif_err(ugeth, ifup, dev, "Cannot enable net device, aborting\n"); 3160 - goto err; 3161 - } 3162 3265 3163 3266 return 0; 3164 3267 err: ··· 3176 3291 return -EINVAL; 3177 3292 } 3178 3293 3179 - err = init_phy(dev); 3294 + err = phylink_of_phy_connect(ugeth->phylink, ugeth->dev->of_node, 0); 3180 3295 if (err) { 3181 - netif_err(ugeth, ifup, dev, "Cannot initialize PHY, aborting\n"); 3182 - return err; 3296 + dev_err(&dev->dev, "Could not attach to PHY\n"); 3297 + return -ENODEV; 3183 3298 } 3184 3299 3185 3300 err = ucc_geth_init_mac(ugeth); ··· 3195 3310 goto err; 3196 3311 } 3197 3312 3198 - phy_start(ugeth->phydev); 3313 + phylink_start(ugeth->phylink); 3199 3314 napi_enable(&ugeth->napi); 3200 3315 netdev_reset_queue(dev); 3201 3316 netif_start_queue(dev); 3202 3317 3203 3318 device_set_wakeup_capable(&dev->dev, 3204 - qe_alive_during_sleep() || ugeth->phydev->irq); 3319 + qe_alive_during_sleep() || dev->phydev->irq); 3205 3320 device_set_wakeup_enable(&dev->dev, ugeth->wol_en); 3206 3321 3207 3322 return err; ··· 3222 3337 3223 3338 cancel_work_sync(&ugeth->timeout_work); 3224 3339 ucc_geth_stop(ugeth); 3225 - phy_disconnect(ugeth->phydev); 3226 - ugeth->phydev = NULL; 3340 + phylink_disconnect_phy(ugeth->phylink); 3227 3341 3228 3342 free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev); 3229 3343 ··· 3256 3372 ucc_geth_stop(ugeth); 3257 3373 ucc_geth_init_mac(ugeth); 3258 3374 /* Must start PHY here */ 3259 - phy_start(ugeth->phydev); 3375 + phylink_start(ugeth->phylink); 3260 3376 netif_tx_start_all_queues(dev); 3261 3377 } 3262 3378 ··· 3281 3397 { 3282 3398 struct net_device *ndev = platform_get_drvdata(ofdev); 3283 3399 struct ucc_geth_private *ugeth = netdev_priv(ndev); 3400 + bool mac_wol = false; 3284 3401 3285 3402 if (!netif_running(ndev)) 3286 3403 return 0; ··· 3295 3410 */ 3296 3411 ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); 3297 3412 3298 - if (ugeth->wol_en & WAKE_MAGIC) { 3413 + if (ugeth->wol_en & WAKE_MAGIC && !ugeth->phy_wol_en) { 3299 3414 setbits32(ugeth->uccf->p_uccm, UCC_GETH_UCCE_MPD); 3300 3415 setbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE); 3301 3416 ucc_fast_enable(ugeth->uccf, COMM_DIR_RX_AND_TX); 3302 - } else if (!(ugeth->wol_en & WAKE_PHY)) { 3303 - phy_stop(ugeth->phydev); 3417 + mac_wol = true; 3304 3418 } 3419 + 3420 + rtnl_lock(); 3421 + phylink_suspend(ugeth->phylink, mac_wol); 3422 + rtnl_unlock(); 3305 3423 3306 3424 return 0; 3307 3425 } ··· 3339 3451 } 3340 3452 } 3341 3453 3342 - ugeth->oldlink = 0; 3343 - ugeth->oldspeed = 0; 3344 - ugeth->oldduplex = -1; 3345 - 3346 - phy_stop(ugeth->phydev); 3347 - phy_start(ugeth->phydev); 3454 + rtnl_lock(); 3455 + phylink_resume(ugeth->phylink); 3456 + rtnl_unlock(); 3348 3457 3349 3458 napi_enable(&ugeth->napi); 3350 3459 netif_device_attach(ndev); ··· 3354 3469 #define ucc_geth_resume NULL 3355 3470 #endif 3356 3471 3357 - static phy_interface_t to_phy_interface(const char *phy_connection_type) 3358 - { 3359 - if (strcasecmp(phy_connection_type, "mii") == 0) 3360 - return PHY_INTERFACE_MODE_MII; 3361 - if (strcasecmp(phy_connection_type, "gmii") == 0) 3362 - return PHY_INTERFACE_MODE_GMII; 3363 - if (strcasecmp(phy_connection_type, "tbi") == 0) 3364 - return PHY_INTERFACE_MODE_TBI; 3365 - if (strcasecmp(phy_connection_type, "rmii") == 0) 3366 - return PHY_INTERFACE_MODE_RMII; 3367 - if (strcasecmp(phy_connection_type, "rgmii") == 0) 3368 - return PHY_INTERFACE_MODE_RGMII; 3369 - if (strcasecmp(phy_connection_type, "rgmii-id") == 0) 3370 - return PHY_INTERFACE_MODE_RGMII_ID; 3371 - if (strcasecmp(phy_connection_type, "rgmii-txid") == 0) 3372 - return PHY_INTERFACE_MODE_RGMII_TXID; 3373 - if (strcasecmp(phy_connection_type, "rgmii-rxid") == 0) 3374 - return PHY_INTERFACE_MODE_RGMII_RXID; 3375 - if (strcasecmp(phy_connection_type, "rtbi") == 0) 3376 - return PHY_INTERFACE_MODE_RTBI; 3377 - if (strcasecmp(phy_connection_type, "sgmii") == 0) 3378 - return PHY_INTERFACE_MODE_SGMII; 3379 - 3380 - return PHY_INTERFACE_MODE_MII; 3381 - } 3382 - 3383 3472 static int ucc_geth_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 3384 3473 { 3385 3474 struct ucc_geth_private *ugeth = netdev_priv(dev); ··· 3361 3502 if (!netif_running(dev)) 3362 3503 return -EINVAL; 3363 3504 3364 - if (!ugeth->phydev) 3365 - return -ENODEV; 3366 - 3367 - return phy_mii_ioctl(ugeth->phydev, rq, cmd); 3505 + return phylink_mii_ioctl(ugeth->phylink, rq, cmd); 3368 3506 } 3369 3507 3370 3508 static const struct net_device_ops ucc_geth_netdev_ops = { ··· 3369 3513 .ndo_stop = ucc_geth_close, 3370 3514 .ndo_start_xmit = ucc_geth_start_xmit, 3371 3515 .ndo_validate_addr = eth_validate_addr, 3372 - .ndo_change_carrier = fixed_phy_change_carrier, 3373 3516 .ndo_set_mac_address = ucc_geth_set_mac_addr, 3374 3517 .ndo_set_rx_mode = ucc_geth_set_multi, 3375 3518 .ndo_tx_timeout = ucc_geth_timeout, ··· 3408 3553 return 0; 3409 3554 } 3410 3555 3556 + struct phylink_mac_ops ugeth_mac_ops = { 3557 + .mac_link_up = ugeth_mac_link_up, 3558 + .mac_link_down = ugeth_mac_link_down, 3559 + .mac_config = ugeth_mac_config, 3560 + }; 3561 + 3411 3562 static int ucc_geth_probe(struct platform_device* ofdev) 3412 3563 { 3413 3564 struct device *device = &ofdev->dev; ··· 3421 3560 struct net_device *dev = NULL; 3422 3561 struct ucc_geth_private *ugeth = NULL; 3423 3562 struct ucc_geth_info *ug_info; 3563 + struct device_node *phy_node; 3564 + struct phylink *phylink; 3424 3565 struct resource res; 3425 - int err, ucc_num, max_speed = 0; 3566 + int err, ucc_num; 3426 3567 const unsigned int *prop; 3427 3568 phy_interface_t phy_interface; 3428 - static const int enet_to_speed[] = { 3429 - SPEED_10, SPEED_10, SPEED_10, 3430 - SPEED_100, SPEED_100, SPEED_100, 3431 - SPEED_1000, SPEED_1000, SPEED_1000, SPEED_1000, 3432 - }; 3433 - static const phy_interface_t enet_to_phy_interface[] = { 3434 - PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_RMII, 3435 - PHY_INTERFACE_MODE_RGMII, PHY_INTERFACE_MODE_MII, 3436 - PHY_INTERFACE_MODE_RMII, PHY_INTERFACE_MODE_RGMII, 3437 - PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_RGMII, 3438 - PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_RTBI, 3439 - PHY_INTERFACE_MODE_SGMII, 3440 - }; 3441 3569 3442 3570 ugeth_vdbg("%s: IN", __func__); 3443 3571 ··· 3462 3612 ug_info->uf_info.regs = res.start; 3463 3613 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); 3464 3614 3465 - ug_info->phy_node = of_parse_phandle(np, "phy-handle", 0); 3466 - if (!ug_info->phy_node && of_phy_is_fixed_link(np)) { 3467 - /* 3468 - * In the case of a fixed PHY, the DT node associated 3469 - * to the PHY is the Ethernet MAC DT node. 3470 - */ 3471 - err = of_phy_register_fixed_link(np); 3472 - if (err) 3473 - return err; 3474 - ug_info->phy_node = of_node_get(np); 3475 - } 3476 - 3477 3615 /* Find the TBI PHY node. If it's not there, we don't support SGMII */ 3478 3616 ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0); 3479 3617 3480 - /* get the phy interface type, or default to MII */ 3481 - prop = of_get_property(np, "phy-connection-type", NULL); 3482 - if (!prop) { 3483 - /* handle interface property present in old trees */ 3484 - prop = of_get_property(ug_info->phy_node, "interface", NULL); 3485 - if (prop != NULL) { 3486 - phy_interface = enet_to_phy_interface[*prop]; 3487 - max_speed = enet_to_speed[*prop]; 3488 - } else 3489 - phy_interface = PHY_INTERFACE_MODE_MII; 3490 - } else { 3491 - phy_interface = to_phy_interface((const char *)prop); 3618 + phy_node = of_parse_phandle(np, "phy-handle", 0); 3619 + if (phy_node) { 3620 + prop = of_get_property(phy_node, "interface", NULL); 3621 + if (prop) { 3622 + dev_err(&ofdev->dev, 3623 + "Device-tree property 'interface' is no longer supported. Please use 'phy-connection-type' instead."); 3624 + of_node_put(phy_node); 3625 + err = -EINVAL; 3626 + goto err_put_tbi; 3627 + } 3628 + of_node_put(phy_node); 3492 3629 } 3493 3630 3494 - /* get speed, or derive from PHY interface */ 3495 - if (max_speed == 0) 3496 - switch (phy_interface) { 3497 - case PHY_INTERFACE_MODE_GMII: 3498 - case PHY_INTERFACE_MODE_RGMII: 3499 - case PHY_INTERFACE_MODE_RGMII_ID: 3500 - case PHY_INTERFACE_MODE_RGMII_RXID: 3501 - case PHY_INTERFACE_MODE_RGMII_TXID: 3502 - case PHY_INTERFACE_MODE_TBI: 3503 - case PHY_INTERFACE_MODE_RTBI: 3504 - case PHY_INTERFACE_MODE_SGMII: 3505 - max_speed = SPEED_1000; 3506 - break; 3507 - default: 3508 - max_speed = SPEED_100; 3509 - break; 3510 - } 3631 + err = of_get_phy_mode(np, &phy_interface); 3632 + if (err) { 3633 + dev_err(&ofdev->dev, "Invalid phy-connection-type"); 3634 + goto err_put_tbi; 3635 + } 3511 3636 3512 - if (max_speed == SPEED_1000) { 3637 + if (phy_interface == PHY_INTERFACE_MODE_GMII || 3638 + phy_interface_mode_is_rgmii(phy_interface) || 3639 + phy_interface == PHY_INTERFACE_MODE_TBI || 3640 + phy_interface == PHY_INTERFACE_MODE_RTBI || 3641 + phy_interface == PHY_INTERFACE_MODE_SGMII) { 3513 3642 unsigned int snums = qe_get_num_of_snums(); 3514 3643 3515 - /* configure muram FIFOs for gigabit operation */ 3516 3644 ug_info->uf_info.urfs = UCC_GETH_URFS_GIGA_INIT; 3517 3645 ug_info->uf_info.urfet = UCC_GETH_URFET_GIGA_INIT; 3518 3646 ug_info->uf_info.urfset = UCC_GETH_URFSET_GIGA_INIT; ··· 3519 3691 dev = devm_alloc_etherdev(&ofdev->dev, sizeof(*ugeth)); 3520 3692 if (!dev) { 3521 3693 err = -ENOMEM; 3522 - goto err_deregister_fixed_link; 3694 + goto err_put_tbi; 3523 3695 } 3524 3696 3525 3697 ugeth = netdev_priv(dev); ··· 3546 3718 dev->max_mtu = 1518; 3547 3719 3548 3720 ugeth->msg_enable = netif_msg_init(debug.msg_enable, UGETH_MSG_DEFAULT); 3549 - ugeth->phy_interface = phy_interface; 3550 - ugeth->max_speed = max_speed; 3551 3721 3552 - /* Carrier starts down, phylib will bring it up */ 3553 - netif_carrier_off(dev); 3722 + ugeth->phylink_config.dev = &dev->dev; 3723 + ugeth->phylink_config.type = PHYLINK_NETDEV; 3724 + 3725 + ugeth->phylink_config.mac_capabilities = 3726 + MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; 3727 + 3728 + __set_bit(PHY_INTERFACE_MODE_MII, 3729 + ugeth->phylink_config.supported_interfaces); 3730 + __set_bit(PHY_INTERFACE_MODE_RMII, 3731 + ugeth->phylink_config.supported_interfaces); 3732 + __set_bit(PHY_INTERFACE_MODE_GMII, 3733 + ugeth->phylink_config.supported_interfaces); 3734 + phy_interface_set_rgmii(ugeth->phylink_config.supported_interfaces); 3735 + 3736 + if (ug_info->tbi_node) { 3737 + __set_bit(PHY_INTERFACE_MODE_SGMII, 3738 + ugeth->phylink_config.supported_interfaces); 3739 + __set_bit(PHY_INTERFACE_MODE_TBI, 3740 + ugeth->phylink_config.supported_interfaces); 3741 + __set_bit(PHY_INTERFACE_MODE_RTBI, 3742 + ugeth->phylink_config.supported_interfaces); 3743 + } 3744 + 3745 + phylink = phylink_create(&ugeth->phylink_config, dev_fwnode(&dev->dev), 3746 + phy_interface, &ugeth_mac_ops); 3747 + if (IS_ERR(phylink)) { 3748 + err = PTR_ERR(phylink); 3749 + goto err_put_tbi; 3750 + } 3751 + 3752 + ugeth->phylink = phylink; 3554 3753 3555 3754 err = devm_register_netdev(&ofdev->dev, dev); 3556 3755 if (err) { 3557 3756 if (netif_msg_probe(ugeth)) 3558 3757 pr_err("%s: Cannot register net device, aborting\n", 3559 3758 dev->name); 3560 - goto err_deregister_fixed_link; 3759 + goto err_destroy_phylink; 3561 3760 } 3562 3761 3563 3762 err = of_get_ethdev_address(np, dev); 3564 3763 if (err == -EPROBE_DEFER) 3565 - goto err_deregister_fixed_link; 3764 + goto err_destroy_phylink; 3566 3765 3567 3766 ugeth->ug_info = ug_info; 3568 3767 ugeth->dev = device; ··· 3598 3743 3599 3744 return 0; 3600 3745 3601 - err_deregister_fixed_link: 3602 - if (of_phy_is_fixed_link(np)) 3603 - of_phy_deregister_fixed_link(np); 3746 + err_destroy_phylink: 3747 + phylink_destroy(phylink); 3748 + err_put_tbi: 3604 3749 of_node_put(ug_info->tbi_node); 3605 - of_node_put(ug_info->phy_node); 3750 + 3606 3751 return err; 3607 3752 } 3608 3753 ··· 3610 3755 { 3611 3756 struct net_device *dev = platform_get_drvdata(ofdev); 3612 3757 struct ucc_geth_private *ugeth = netdev_priv(dev); 3613 - struct device_node *np = ofdev->dev.of_node; 3614 3758 3615 3759 ucc_geth_memclean(ugeth); 3616 - if (of_phy_is_fixed_link(np)) 3617 - of_phy_deregister_fixed_link(np); 3760 + phylink_destroy(ugeth->phylink); 3618 3761 of_node_put(ugeth->ug_info->tbi_node); 3619 - of_node_put(ugeth->ug_info->phy_node); 3620 3762 } 3621 3763 3622 3764 static const struct of_device_id ucc_geth_match[] = {
+11 -11
drivers/net/ethernet/freescale/ucc_geth.h
··· 16 16 17 17 #include <linux/kernel.h> 18 18 #include <linux/list.h> 19 + #include <linux/phylink.h> 19 20 #include <linux/if_ether.h> 20 21 21 22 #include <soc/fsl/qe/immap_qe.h> ··· 922 921 #define UCC_GETH_UPSMR_INIT UCC_GETH_UPSMR_RES1 923 922 924 923 #define UCC_GETH_MACCFG1_INIT 0 925 - #define UCC_GETH_MACCFG2_INIT (MACCFG2_RESERVED_1) 924 + #define UCC_GETH_MACCFG2_INIT (MACCFG2_RESERVED_1 | \ 925 + (7 << MACCFG2_PREL_SHIFT)) 926 926 927 927 /* Ethernet Address Type. */ 928 928 enum enet_addr_type { ··· 1075 1073 u16 vid; 1076 1074 }; 1077 1075 1076 + struct phylink; 1077 + struct phylink_config; 1078 + 1078 1079 /* GETH protocol initialization structure */ 1079 1080 struct ucc_geth_info { 1080 1081 struct ucc_fast_info uf_info; ··· 1093 1088 u8 miminumInterFrameGapEnforcement; 1094 1089 u8 backToBackInterFrameGap; 1095 1090 int ipAddressAlignment; 1096 - int lengthCheckRx; 1097 1091 u32 mblinterval; 1098 1092 u16 nortsrbytetime; 1099 1093 u8 fracsiz; ··· 1118 1114 int transmitFlowControl; 1119 1115 u8 maxGroupAddrInHash; 1120 1116 u8 maxIndAddrInHash; 1121 - u8 prel; 1122 1117 u16 maxFrameLength; 1123 1118 u16 minFrameLength; 1124 1119 u16 maxD1Length; ··· 1128 1125 u32 eventRegMask; 1129 1126 u16 pausePeriod; 1130 1127 u16 extensionField; 1131 - struct device_node *phy_node; 1132 1128 struct device_node *tbi_node; 1133 1129 u8 weightfactor[NUM_TX_QUEUES]; 1134 1130 u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES]; ··· 1212 1210 u16 skb_dirtytx[NUM_TX_QUEUES]; 1213 1211 1214 1212 struct ugeth_mii_info *mii_info; 1215 - struct phy_device *phydev; 1216 - phy_interface_t phy_interface; 1217 - int max_speed; 1218 1213 uint32_t msg_enable; 1219 - int oldspeed; 1220 - int oldduplex; 1221 - int oldlink; 1222 - int wol_en; 1214 + u32 wol_en; 1215 + u32 phy_wol_en; 1216 + 1217 + struct phylink *phylink; 1218 + struct phylink_config phylink_config; 1223 1219 1224 1220 struct device_node *node; 1225 1221 };
+28 -48
drivers/net/ethernet/freescale/ucc_geth_ethtool.c
··· 104 104 uec_get_ksettings(struct net_device *netdev, struct ethtool_link_ksettings *cmd) 105 105 { 106 106 struct ucc_geth_private *ugeth = netdev_priv(netdev); 107 - struct phy_device *phydev = ugeth->phydev; 108 107 109 - if (!phydev) 110 - return -ENODEV; 111 - 112 - phy_ethtool_ksettings_get(phydev, cmd); 113 - 114 - return 0; 108 + return phylink_ethtool_ksettings_get(ugeth->phylink, cmd); 115 109 } 116 110 117 111 static int ··· 113 119 const struct ethtool_link_ksettings *cmd) 114 120 { 115 121 struct ucc_geth_private *ugeth = netdev_priv(netdev); 116 - struct phy_device *phydev = ugeth->phydev; 117 122 118 - if (!phydev) 119 - return -ENODEV; 120 - 121 - return phy_ethtool_ksettings_set(phydev, cmd); 123 + return phylink_ethtool_ksettings_set(ugeth->phylink, cmd); 122 124 } 123 125 124 126 static void ··· 123 133 { 124 134 struct ucc_geth_private *ugeth = netdev_priv(netdev); 125 135 126 - pause->autoneg = ugeth->phydev->autoneg; 127 - 128 - if (ugeth->ug_info->receiveFlowControl) 129 - pause->rx_pause = 1; 130 - if (ugeth->ug_info->transmitFlowControl) 131 - pause->tx_pause = 1; 136 + return phylink_ethtool_get_pauseparam(ugeth->phylink, pause); 132 137 } 133 138 134 139 static int ··· 131 146 struct ethtool_pauseparam *pause) 132 147 { 133 148 struct ucc_geth_private *ugeth = netdev_priv(netdev); 134 - int ret = 0; 135 149 136 150 ugeth->ug_info->receiveFlowControl = pause->rx_pause; 137 151 ugeth->ug_info->transmitFlowControl = pause->tx_pause; 138 152 139 - if (ugeth->phydev->autoneg) { 140 - if (netif_running(netdev)) { 141 - /* FIXME: automatically restart */ 142 - netdev_info(netdev, "Please re-open the interface\n"); 143 - } 144 - } else { 145 - struct ucc_geth_info *ug_info = ugeth->ug_info; 146 - 147 - ret = init_flow_control_params(ug_info->aufc, 148 - ug_info->receiveFlowControl, 149 - ug_info->transmitFlowControl, 150 - ug_info->pausePeriod, 151 - ug_info->extensionField, 152 - &ugeth->uccf->uf_regs->upsmr, 153 - &ugeth->ug_regs->uempr, 154 - &ugeth->ug_regs->maccfg1); 155 - } 156 - 157 - return ret; 153 + return phylink_ethtool_set_pauseparam(ugeth->phylink, pause); 158 154 } 159 155 160 156 static uint32_t ··· 309 343 static void uec_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 310 344 { 311 345 struct ucc_geth_private *ugeth = netdev_priv(netdev); 312 - struct phy_device *phydev = ugeth->phydev; 313 346 314 - if (phydev && phydev->irq) 315 - wol->supported |= WAKE_PHY; 347 + phylink_ethtool_get_wol(ugeth->phylink, wol); 348 + 316 349 if (qe_alive_during_sleep()) 317 350 wol->supported |= WAKE_MAGIC; 318 351 319 - wol->wolopts = ugeth->wol_en; 352 + wol->wolopts |= ugeth->wol_en; 320 353 } 321 354 322 355 static int uec_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 323 356 { 324 357 struct ucc_geth_private *ugeth = netdev_priv(netdev); 325 - struct phy_device *phydev = ugeth->phydev; 358 + int ret = 0; 326 359 327 - if (wol->wolopts & ~(WAKE_PHY | WAKE_MAGIC)) 328 - return -EINVAL; 329 - else if (wol->wolopts & WAKE_PHY && (!phydev || !phydev->irq)) 330 - return -EINVAL; 331 - else if (wol->wolopts & WAKE_MAGIC && !qe_alive_during_sleep()) 360 + ret = phylink_ethtool_set_wol(ugeth->phylink, wol); 361 + if (ret == -EOPNOTSUPP) { 362 + ugeth->phy_wol_en = 0; 363 + } else if (ret) { 364 + return ret; 365 + } else { 366 + ugeth->phy_wol_en = wol->wolopts; 367 + goto out; 368 + } 369 + 370 + /* If the PHY isn't handling the WoL and the MAC is asked to more than 371 + * WAKE_MAGIC, error-out 372 + */ 373 + if (!ugeth->phy_wol_en && 374 + wol->wolopts & ~WAKE_MAGIC) 332 375 return -EINVAL; 333 376 377 + if (wol->wolopts & WAKE_MAGIC && 378 + !qe_alive_during_sleep()) 379 + return -EINVAL; 380 + 381 + out: 334 382 ugeth->wol_en = wol->wolopts; 335 383 device_set_wakeup_enable(&netdev->dev, ugeth->wol_en); 336 384