Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc LE updates from Ben Herrenschmidt:
"With my previous pull request I mentioned some remaining Little Endian
patches, notably support for our new ABI, which I was sitting on
making sure it was all finalized.
The toolchain folks confirmed it now, the new ABI is stable and merged
with gcc, so we are all good. Oh and we actually missed the actual
Kconfig switch for LE so here it is, along with a couple more bug
fixes.
I have more fixes but not related to LE so I'll send them as a
separate pull request tomorrow, let's get this one out of the way.
Note that this supports running user space binaries using the new ABI,
but the kernel itself still needs to be built with the old one. We'll
bring fixes for that after -rc1.
Here's Anton log that goes with this series:
This patch series adds support for the new ABI, LPAR support for
H_SET_MODE and finally adds a kconfig option and defconfig.
ABIv2 support was recently committed to binutils and gcc, and should
be merged into glibc soon. There are a number of very nice
improvements including the removal of function descriptors. Rusty's
kernel patches allow binaries of either ABI to work, easing the
transition"
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Wrong DWARF CFI in the kernel vdso for little-endian / ELFv2
powerpc: Add pseries_le_defconfig
powerpc: Add CONFIG_CPU_LITTLE_ENDIAN kernel config option.
powerpc: Don't use ELFv2 ABI to build the kernel
powerpc: ELF2 binaries signal handling
powerpc: ELF2 binaries launched directly.
powerpc: Set eflags correctly for ELF ABIv2 core dumps.
powerpc: Add TIF_ELF2ABI flag.
pseries: Add H_SET_MODE to change exception endianness
powerpc/pseries: Fix endian issues in pseries EEH code
+542
-34
+1
arch/powerpc/Makefile
+1
arch/powerpc/Makefile
···
111
111
endif
112
112
113
113
CFLAGS-$(CONFIG_PPC64) := -mtraceback=no -mcall-aixdesc
114
+
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv1)
114
115
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,-mminimal-toc)
115
116
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
116
117
CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
+352
arch/powerpc/configs/pseries_le_defconfig
+352
arch/powerpc/configs/pseries_le_defconfig
···
1
+
CONFIG_PPC64=y
2
+
CONFIG_ALTIVEC=y
3
+
CONFIG_VSX=y
4
+
CONFIG_SMP=y
5
+
CONFIG_NR_CPUS=2048
6
+
CONFIG_CPU_LITTLE_ENDIAN=y
7
+
CONFIG_SYSVIPC=y
8
+
CONFIG_POSIX_MQUEUE=y
9
+
CONFIG_AUDIT=y
10
+
CONFIG_AUDITSYSCALL=y
11
+
CONFIG_IRQ_DOMAIN_DEBUG=y
12
+
CONFIG_NO_HZ=y
13
+
CONFIG_HIGH_RES_TIMERS=y
14
+
CONFIG_TASKSTATS=y
15
+
CONFIG_TASK_DELAY_ACCT=y
16
+
CONFIG_TASK_XACCT=y
17
+
CONFIG_TASK_IO_ACCOUNTING=y
18
+
CONFIG_IKCONFIG=y
19
+
CONFIG_IKCONFIG_PROC=y
20
+
CONFIG_CGROUPS=y
21
+
CONFIG_CGROUP_FREEZER=y
22
+
CONFIG_CGROUP_DEVICE=y
23
+
CONFIG_CPUSETS=y
24
+
CONFIG_CGROUP_CPUACCT=y
25
+
CONFIG_BLK_DEV_INITRD=y
26
+
# CONFIG_COMPAT_BRK is not set
27
+
CONFIG_PROFILING=y
28
+
CONFIG_OPROFILE=y
29
+
CONFIG_KPROBES=y
30
+
CONFIG_JUMP_LABEL=y
31
+
CONFIG_MODULES=y
32
+
CONFIG_MODULE_UNLOAD=y
33
+
CONFIG_MODVERSIONS=y
34
+
CONFIG_MODULE_SRCVERSION_ALL=y
35
+
CONFIG_PARTITION_ADVANCED=y
36
+
CONFIG_PPC_SPLPAR=y
37
+
CONFIG_SCANLOG=m
38
+
CONFIG_PPC_SMLPAR=y
39
+
CONFIG_DTL=y
40
+
# CONFIG_PPC_PMAC is not set
41
+
CONFIG_RTAS_FLASH=m
42
+
CONFIG_IBMEBUS=y
43
+
CONFIG_HZ_100=y
44
+
CONFIG_BINFMT_MISC=m
45
+
CONFIG_PPC_TRANSACTIONAL_MEM=y
46
+
CONFIG_KEXEC=y
47
+
CONFIG_IRQ_ALL_CPUS=y
48
+
CONFIG_MEMORY_HOTPLUG=y
49
+
CONFIG_MEMORY_HOTREMOVE=y
50
+
CONFIG_CMA=y
51
+
CONFIG_PPC_64K_PAGES=y
52
+
CONFIG_PPC_SUBPAGE_PROT=y
53
+
CONFIG_SCHED_SMT=y
54
+
CONFIG_HOTPLUG_PCI=y
55
+
CONFIG_HOTPLUG_PCI_RPA=m
56
+
CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
57
+
CONFIG_PACKET=y
58
+
CONFIG_UNIX=y
59
+
CONFIG_XFRM_USER=m
60
+
CONFIG_NET_KEY=m
61
+
CONFIG_INET=y
62
+
CONFIG_IP_MULTICAST=y
63
+
CONFIG_NET_IPIP=y
64
+
CONFIG_SYN_COOKIES=y
65
+
CONFIG_INET_AH=m
66
+
CONFIG_INET_ESP=m
67
+
CONFIG_INET_IPCOMP=m
68
+
# CONFIG_IPV6 is not set
69
+
CONFIG_NETFILTER=y
70
+
CONFIG_NF_CONNTRACK=m
71
+
CONFIG_NF_CONNTRACK_EVENTS=y
72
+
CONFIG_NF_CT_PROTO_UDPLITE=m
73
+
CONFIG_NF_CONNTRACK_FTP=m
74
+
CONFIG_NF_CONNTRACK_IRC=m
75
+
CONFIG_NF_CONNTRACK_TFTP=m
76
+
CONFIG_NF_CT_NETLINK=m
77
+
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
78
+
CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
79
+
CONFIG_NETFILTER_XT_TARGET_MARK=m
80
+
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
81
+
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
82
+
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
83
+
CONFIG_NETFILTER_XT_MATCH_COMMENT=m
84
+
CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
85
+
CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
86
+
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
87
+
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
88
+
CONFIG_NETFILTER_XT_MATCH_DCCP=m
89
+
CONFIG_NETFILTER_XT_MATCH_DSCP=m
90
+
CONFIG_NETFILTER_XT_MATCH_ESP=m
91
+
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
92
+
CONFIG_NETFILTER_XT_MATCH_HELPER=m
93
+
CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
94
+
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
95
+
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
96
+
CONFIG_NETFILTER_XT_MATCH_MAC=m
97
+
CONFIG_NETFILTER_XT_MATCH_MARK=m
98
+
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
99
+
CONFIG_NETFILTER_XT_MATCH_OWNER=m
100
+
CONFIG_NETFILTER_XT_MATCH_POLICY=m
101
+
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
102
+
CONFIG_NETFILTER_XT_MATCH_QUOTA=m
103
+
CONFIG_NETFILTER_XT_MATCH_RATEEST=m
104
+
CONFIG_NETFILTER_XT_MATCH_REALM=m
105
+
CONFIG_NETFILTER_XT_MATCH_RECENT=m
106
+
CONFIG_NETFILTER_XT_MATCH_SCTP=m
107
+
CONFIG_NETFILTER_XT_MATCH_STATE=m
108
+
CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
109
+
CONFIG_NETFILTER_XT_MATCH_STRING=m
110
+
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
111
+
CONFIG_NETFILTER_XT_MATCH_TIME=m
112
+
CONFIG_NETFILTER_XT_MATCH_U32=m
113
+
CONFIG_NF_CONNTRACK_IPV4=m
114
+
CONFIG_IP_NF_IPTABLES=m
115
+
CONFIG_IP_NF_MATCH_AH=m
116
+
CONFIG_IP_NF_MATCH_ECN=m
117
+
CONFIG_IP_NF_MATCH_TTL=m
118
+
CONFIG_IP_NF_FILTER=m
119
+
CONFIG_IP_NF_TARGET_REJECT=m
120
+
CONFIG_IP_NF_TARGET_ULOG=m
121
+
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
122
+
CONFIG_DEVTMPFS=y
123
+
CONFIG_DEVTMPFS_MOUNT=y
124
+
CONFIG_PROC_DEVICETREE=y
125
+
CONFIG_PARPORT=m
126
+
CONFIG_PARPORT_PC=m
127
+
CONFIG_BLK_DEV_FD=m
128
+
CONFIG_BLK_DEV_LOOP=y
129
+
CONFIG_BLK_DEV_NBD=m
130
+
CONFIG_BLK_DEV_RAM=y
131
+
CONFIG_BLK_DEV_RAM_SIZE=65536
132
+
CONFIG_VIRTIO_BLK=m
133
+
CONFIG_IDE=y
134
+
CONFIG_BLK_DEV_IDECD=y
135
+
CONFIG_BLK_DEV_GENERIC=y
136
+
CONFIG_BLK_DEV_AMD74XX=y
137
+
CONFIG_BLK_DEV_SD=y
138
+
CONFIG_CHR_DEV_ST=y
139
+
CONFIG_BLK_DEV_SR=y
140
+
CONFIG_BLK_DEV_SR_VENDOR=y
141
+
CONFIG_CHR_DEV_SG=y
142
+
CONFIG_SCSI_MULTI_LUN=y
143
+
CONFIG_SCSI_CONSTANTS=y
144
+
CONFIG_SCSI_FC_ATTRS=y
145
+
CONFIG_SCSI_CXGB3_ISCSI=m
146
+
CONFIG_SCSI_CXGB4_ISCSI=m
147
+
CONFIG_SCSI_BNX2_ISCSI=m
148
+
CONFIG_BE2ISCSI=m
149
+
CONFIG_SCSI_MPT2SAS=m
150
+
CONFIG_SCSI_IBMVSCSI=y
151
+
CONFIG_SCSI_IBMVFC=m
152
+
CONFIG_SCSI_SYM53C8XX_2=y
153
+
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
154
+
CONFIG_SCSI_IPR=y
155
+
CONFIG_SCSI_QLA_FC=m
156
+
CONFIG_SCSI_QLA_ISCSI=m
157
+
CONFIG_SCSI_LPFC=m
158
+
CONFIG_SCSI_VIRTIO=m
159
+
CONFIG_SCSI_DH=m
160
+
CONFIG_SCSI_DH_RDAC=m
161
+
CONFIG_SCSI_DH_ALUA=m
162
+
CONFIG_ATA=y
163
+
# CONFIG_ATA_SFF is not set
164
+
CONFIG_MD=y
165
+
CONFIG_BLK_DEV_MD=y
166
+
CONFIG_MD_LINEAR=y
167
+
CONFIG_MD_RAID0=y
168
+
CONFIG_MD_RAID1=y
169
+
CONFIG_MD_RAID10=m
170
+
CONFIG_MD_RAID456=m
171
+
CONFIG_MD_MULTIPATH=m
172
+
CONFIG_MD_FAULTY=m
173
+
CONFIG_BLK_DEV_DM=y
174
+
CONFIG_DM_CRYPT=m
175
+
CONFIG_DM_SNAPSHOT=m
176
+
CONFIG_DM_MIRROR=m
177
+
CONFIG_DM_ZERO=m
178
+
CONFIG_DM_MULTIPATH=m
179
+
CONFIG_DM_MULTIPATH_QL=m
180
+
CONFIG_DM_MULTIPATH_ST=m
181
+
CONFIG_DM_UEVENT=y
182
+
CONFIG_BONDING=m
183
+
CONFIG_DUMMY=m
184
+
CONFIG_NETCONSOLE=y
185
+
CONFIG_NETPOLL_TRAP=y
186
+
CONFIG_TUN=m
187
+
CONFIG_VIRTIO_NET=m
188
+
CONFIG_VORTEX=y
189
+
CONFIG_ACENIC=m
190
+
CONFIG_ACENIC_OMIT_TIGON_I=y
191
+
CONFIG_PCNET32=y
192
+
CONFIG_TIGON3=y
193
+
CONFIG_CHELSIO_T1=m
194
+
CONFIG_BE2NET=m
195
+
CONFIG_S2IO=m
196
+
CONFIG_IBMVETH=y
197
+
CONFIG_EHEA=y
198
+
CONFIG_E100=y
199
+
CONFIG_E1000=y
200
+
CONFIG_E1000E=y
201
+
CONFIG_IXGB=m
202
+
CONFIG_IXGBE=m
203
+
CONFIG_MLX4_EN=m
204
+
CONFIG_MYRI10GE=m
205
+
CONFIG_QLGE=m
206
+
CONFIG_NETXEN_NIC=m
207
+
CONFIG_PPP=m
208
+
CONFIG_PPP_BSDCOMP=m
209
+
CONFIG_PPP_DEFLATE=m
210
+
CONFIG_PPPOE=m
211
+
CONFIG_PPP_ASYNC=m
212
+
CONFIG_PPP_SYNC_TTY=m
213
+
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
214
+
CONFIG_INPUT_EVDEV=m
215
+
CONFIG_INPUT_MISC=y
216
+
CONFIG_INPUT_PCSPKR=m
217
+
# CONFIG_SERIO_SERPORT is not set
218
+
CONFIG_SERIAL_8250=y
219
+
CONFIG_SERIAL_8250_CONSOLE=y
220
+
CONFIG_SERIAL_ICOM=m
221
+
CONFIG_SERIAL_JSM=m
222
+
CONFIG_HVC_CONSOLE=y
223
+
CONFIG_HVC_RTAS=y
224
+
CONFIG_HVCS=m
225
+
CONFIG_VIRTIO_CONSOLE=m
226
+
CONFIG_IBM_BSR=m
227
+
CONFIG_GEN_RTC=y
228
+
CONFIG_RAW_DRIVER=y
229
+
CONFIG_MAX_RAW_DEVS=1024
230
+
CONFIG_FB=y
231
+
CONFIG_FIRMWARE_EDID=y
232
+
CONFIG_FB_OF=y
233
+
CONFIG_FB_MATROX=y
234
+
CONFIG_FB_MATROX_MILLENIUM=y
235
+
CONFIG_FB_MATROX_MYSTIQUE=y
236
+
CONFIG_FB_MATROX_G=y
237
+
CONFIG_FB_RADEON=y
238
+
CONFIG_FB_IBM_GXT4500=y
239
+
CONFIG_LCD_PLATFORM=m
240
+
# CONFIG_VGA_CONSOLE is not set
241
+
CONFIG_FRAMEBUFFER_CONSOLE=y
242
+
CONFIG_LOGO=y
243
+
CONFIG_HID_GYRATION=y
244
+
CONFIG_HID_PANTHERLORD=y
245
+
CONFIG_HID_PETALYNX=y
246
+
CONFIG_HID_SAMSUNG=y
247
+
CONFIG_HID_SUNPLUS=y
248
+
CONFIG_USB_HIDDEV=y
249
+
CONFIG_USB=y
250
+
CONFIG_USB_MON=m
251
+
CONFIG_USB_EHCI_HCD=y
252
+
# CONFIG_USB_EHCI_HCD_PPC_OF is not set
253
+
CONFIG_USB_OHCI_HCD=y
254
+
CONFIG_USB_STORAGE=m
255
+
CONFIG_INFINIBAND=m
256
+
CONFIG_INFINIBAND_USER_MAD=m
257
+
CONFIG_INFINIBAND_USER_ACCESS=m
258
+
CONFIG_INFINIBAND_MTHCA=m
259
+
CONFIG_INFINIBAND_EHCA=m
260
+
CONFIG_INFINIBAND_CXGB3=m
261
+
CONFIG_INFINIBAND_CXGB4=m
262
+
CONFIG_MLX4_INFINIBAND=m
263
+
CONFIG_INFINIBAND_IPOIB=m
264
+
CONFIG_INFINIBAND_IPOIB_CM=y
265
+
CONFIG_INFINIBAND_SRP=m
266
+
CONFIG_INFINIBAND_ISER=m
267
+
CONFIG_VIRTIO_PCI=m
268
+
CONFIG_VIRTIO_BALLOON=m
269
+
CONFIG_EXT2_FS=y
270
+
CONFIG_EXT2_FS_XATTR=y
271
+
CONFIG_EXT2_FS_POSIX_ACL=y
272
+
CONFIG_EXT2_FS_SECURITY=y
273
+
CONFIG_EXT2_FS_XIP=y
274
+
CONFIG_EXT3_FS=y
275
+
CONFIG_EXT3_FS_POSIX_ACL=y
276
+
CONFIG_EXT3_FS_SECURITY=y
277
+
CONFIG_EXT4_FS=y
278
+
CONFIG_EXT4_FS_POSIX_ACL=y
279
+
CONFIG_EXT4_FS_SECURITY=y
280
+
CONFIG_REISERFS_FS=y
281
+
CONFIG_REISERFS_FS_XATTR=y
282
+
CONFIG_REISERFS_FS_POSIX_ACL=y
283
+
CONFIG_REISERFS_FS_SECURITY=y
284
+
CONFIG_JFS_FS=m
285
+
CONFIG_JFS_POSIX_ACL=y
286
+
CONFIG_JFS_SECURITY=y
287
+
CONFIG_XFS_FS=m
288
+
CONFIG_XFS_POSIX_ACL=y
289
+
CONFIG_BTRFS_FS=m
290
+
CONFIG_BTRFS_FS_POSIX_ACL=y
291
+
CONFIG_NILFS2_FS=m
292
+
CONFIG_AUTOFS4_FS=m
293
+
CONFIG_FUSE_FS=m
294
+
CONFIG_ISO9660_FS=y
295
+
CONFIG_UDF_FS=m
296
+
CONFIG_MSDOS_FS=y
297
+
CONFIG_VFAT_FS=y
298
+
CONFIG_PROC_KCORE=y
299
+
CONFIG_TMPFS=y
300
+
CONFIG_TMPFS_POSIX_ACL=y
301
+
CONFIG_HUGETLBFS=y
302
+
CONFIG_CRAMFS=m
303
+
CONFIG_SQUASHFS=m
304
+
CONFIG_SQUASHFS_XATTR=y
305
+
CONFIG_SQUASHFS_LZO=y
306
+
CONFIG_SQUASHFS_XZ=y
307
+
CONFIG_PSTORE=y
308
+
CONFIG_NFS_FS=y
309
+
CONFIG_NFS_V3_ACL=y
310
+
CONFIG_NFS_V4=y
311
+
CONFIG_NFSD=m
312
+
CONFIG_NFSD_V3_ACL=y
313
+
CONFIG_NFSD_V4=y
314
+
CONFIG_CIFS=m
315
+
CONFIG_CIFS_XATTR=y
316
+
CONFIG_CIFS_POSIX=y
317
+
CONFIG_NLS_DEFAULT="utf8"
318
+
CONFIG_NLS_CODEPAGE_437=y
319
+
CONFIG_NLS_ASCII=y
320
+
CONFIG_NLS_ISO8859_1=y
321
+
CONFIG_NLS_UTF8=y
322
+
CONFIG_CRC_T10DIF=y
323
+
CONFIG_MAGIC_SYSRQ=y
324
+
CONFIG_DEBUG_KERNEL=y
325
+
CONFIG_DEBUG_STACK_USAGE=y
326
+
CONFIG_DEBUG_STACKOVERFLOW=y
327
+
CONFIG_LOCKUP_DETECTOR=y
328
+
CONFIG_LATENCYTOP=y
329
+
CONFIG_SCHED_TRACER=y
330
+
CONFIG_BLK_DEV_IO_TRACE=y
331
+
CONFIG_CODE_PATCHING_SELFTEST=y
332
+
CONFIG_FTR_FIXUP_SELFTEST=y
333
+
CONFIG_MSI_BITMAP_SELFTEST=y
334
+
CONFIG_XMON=y
335
+
CONFIG_CRYPTO_TEST=m
336
+
CONFIG_CRYPTO_PCBC=m
337
+
CONFIG_CRYPTO_HMAC=y
338
+
CONFIG_CRYPTO_MICHAEL_MIC=m
339
+
CONFIG_CRYPTO_TGR192=m
340
+
CONFIG_CRYPTO_WP512=m
341
+
CONFIG_CRYPTO_ANUBIS=m
342
+
CONFIG_CRYPTO_BLOWFISH=m
343
+
CONFIG_CRYPTO_CAST6=m
344
+
CONFIG_CRYPTO_KHAZAD=m
345
+
CONFIG_CRYPTO_SALSA20=m
346
+
CONFIG_CRYPTO_SERPENT=m
347
+
CONFIG_CRYPTO_TEA=m
348
+
CONFIG_CRYPTO_TWOFISH=m
349
+
CONFIG_CRYPTO_LZO=m
350
+
# CONFIG_CRYPTO_ANSI_CPRNG is not set
351
+
CONFIG_CRYPTO_DEV_NX=y
352
+
CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
+4
arch/powerpc/include/asm/elf.h
+4
arch/powerpc/include/asm/elf.h
···
31
31
extern unsigned long randomize_et_dyn(unsigned long base);
32
32
#define ELF_ET_DYN_BASE (randomize_et_dyn(0x20000000))
33
33
34
+
#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
35
+
34
36
/*
35
37
* Our registers are always unsigned longs, whether we're a 32 bit
36
38
* process or 64 bit, on either a 64 bit or 32 bit kernel.
···
88
86
#ifdef __powerpc64__
89
87
# define SET_PERSONALITY(ex) \
90
88
do { \
89
+
if (((ex).e_flags & 0x3) == 2) \
90
+
set_thread_flag(TIF_ELF2ABI); \
91
91
if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
92
92
set_thread_flag(TIF_32BIT); \
93
93
else \
+2
arch/powerpc/include/asm/hvcall.h
+2
arch/powerpc/include/asm/hvcall.h
+26
arch/powerpc/include/asm/plpar_wrappers.h
+26
arch/powerpc/include/asm/plpar_wrappers.h
···
287
287
return plpar_set_mode(0, 3, 0, 0);
288
288
}
289
289
290
+
/*
291
+
* Take exceptions in big endian mode on this partition
292
+
*
293
+
* Note: this call has a partition wide scope and can take a while to complete.
294
+
* If it returns H_LONG_BUSY_* it should be retried periodically until it
295
+
* returns H_SUCCESS.
296
+
*/
297
+
static inline long enable_big_endian_exceptions(void)
298
+
{
299
+
/* mflags = 0: big endian exceptions */
300
+
return plpar_set_mode(0, 4, 0, 0);
301
+
}
302
+
303
+
/*
304
+
* Take exceptions in little endian mode on this partition
305
+
*
306
+
* Note: this call has a partition wide scope and can take a while to complete.
307
+
* If it returns H_LONG_BUSY_* it should be retried periodically until it
308
+
* returns H_SUCCESS.
309
+
*/
310
+
static inline long enable_little_endian_exceptions(void)
311
+
{
312
+
/* mflags = 1: little endian exceptions */
313
+
return plpar_set_mode(1, 4, 0, 0);
314
+
}
315
+
290
316
static inline long plapr_set_ciabr(unsigned long ciabr)
291
317
{
292
318
return plpar_set_mode(0, 1, ciabr, 0);
+9
arch/powerpc/include/asm/thread_info.h
+9
arch/powerpc/include/asm/thread_info.h
···
105
105
#define TIF_EMULATE_STACK_STORE 16 /* Is an instruction emulation
106
106
for stack store? */
107
107
#define TIF_MEMDIE 17 /* is terminating due to OOM killer */
108
+
#if defined(CONFIG_PPC64)
109
+
#define TIF_ELF2ABI 18 /* function descriptors must die! */
110
+
#endif
108
111
109
112
/* as above, but as bit values */
110
113
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
···
184
181
#define is_32bit_task() (test_thread_flag(TIF_32BIT))
185
182
#else
186
183
#define is_32bit_task() (1)
184
+
#endif
185
+
186
+
#if defined(CONFIG_PPC64)
187
+
#define is_elf2_task() (test_thread_flag(TIF_ELF2ABI))
188
+
#else
189
+
#define is_elf2_task() (0)
187
190
#endif
188
191
189
192
#endif /* !__ASSEMBLY__ */
+35
-15
arch/powerpc/kernel/process.c
+35
-15
arch/powerpc/kernel/process.c
···
1086
1086
regs->msr = MSR_USER;
1087
1087
#else
1088
1088
if (!is_32bit_task()) {
1089
-
unsigned long entry, toc;
1089
+
unsigned long entry;
1090
1090
1091
-
/* start is a relocated pointer to the function descriptor for
1092
-
* the elf _start routine. The first entry in the function
1093
-
* descriptor is the entry address of _start and the second
1094
-
* entry is the TOC value we need to use.
1095
-
*/
1096
-
__get_user(entry, (unsigned long __user *)start);
1097
-
__get_user(toc, (unsigned long __user *)start+1);
1091
+
if (is_elf2_task()) {
1092
+
/* Look ma, no function descriptors! */
1093
+
entry = start;
1098
1094
1099
-
/* Check whether the e_entry function descriptor entries
1100
-
* need to be relocated before we can use them.
1101
-
*/
1102
-
if (load_addr != 0) {
1103
-
entry += load_addr;
1104
-
toc += load_addr;
1095
+
/*
1096
+
* Ulrich says:
1097
+
* The latest iteration of the ABI requires that when
1098
+
* calling a function (at its global entry point),
1099
+
* the caller must ensure r12 holds the entry point
1100
+
* address (so that the function can quickly
1101
+
* establish addressability).
1102
+
*/
1103
+
regs->gpr[12] = start;
1104
+
/* Make sure that's restored on entry to userspace. */
1105
+
set_thread_flag(TIF_RESTOREALL);
1106
+
} else {
1107
+
unsigned long toc;
1108
+
1109
+
/* start is a relocated pointer to the function
1110
+
* descriptor for the elf _start routine. The first
1111
+
* entry in the function descriptor is the entry
1112
+
* address of _start and the second entry is the TOC
1113
+
* value we need to use.
1114
+
*/
1115
+
__get_user(entry, (unsigned long __user *)start);
1116
+
__get_user(toc, (unsigned long __user *)start+1);
1117
+
1118
+
/* Check whether the e_entry function descriptor entries
1119
+
* need to be relocated before we can use them.
1120
+
*/
1121
+
if (load_addr != 0) {
1122
+
entry += load_addr;
1123
+
toc += load_addr;
1124
+
}
1125
+
regs->gpr[2] = toc;
1105
1126
}
1106
1127
regs->nip = entry;
1107
-
regs->gpr[2] = toc;
1108
1128
regs->msr = MSR_USER64;
1109
1129
} else {
1110
1130
regs->nip = start;
+16
-9
arch/powerpc/kernel/signal_64.c
+16
-9
arch/powerpc/kernel/signal_64.c
···
701
701
int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
702
702
sigset_t *set, struct pt_regs *regs)
703
703
{
704
-
/* Handler is *really* a pointer to the function descriptor for
705
-
* the signal routine. The first entry in the function
706
-
* descriptor is the entry address of signal and the second
707
-
* entry is the TOC value we need to use.
708
-
*/
709
-
func_descr_t __user *funct_desc_ptr;
710
704
struct rt_sigframe __user *frame;
711
705
unsigned long newsp = 0;
712
706
long err = 0;
···
760
766
goto badframe;
761
767
regs->link = (unsigned long) &frame->tramp[0];
762
768
}
763
-
funct_desc_ptr = (func_descr_t __user *) ka->sa.sa_handler;
764
769
765
770
/* Allocate a dummy caller frame for the signal handler. */
766
771
newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
767
772
err |= put_user(regs->gpr[1], (unsigned long __user *)newsp);
768
773
769
774
/* Set up "regs" so we "return" to the signal handler. */
770
-
err |= get_user(regs->nip, &funct_desc_ptr->entry);
775
+
if (is_elf2_task()) {
776
+
regs->nip = (unsigned long) ka->sa.sa_handler;
777
+
regs->gpr[12] = regs->nip;
778
+
} else {
779
+
/* Handler is *really* a pointer to the function descriptor for
780
+
* the signal routine. The first entry in the function
781
+
* descriptor is the entry address of signal and the second
782
+
* entry is the TOC value we need to use.
783
+
*/
784
+
func_descr_t __user *funct_desc_ptr =
785
+
(func_descr_t __user *) ka->sa.sa_handler;
786
+
787
+
err |= get_user(regs->nip, &funct_desc_ptr->entry);
788
+
err |= get_user(regs->gpr[2], &funct_desc_ptr->toc);
789
+
}
790
+
771
791
/* enter the signal handler in native-endian mode */
772
792
regs->msr &= ~MSR_LE;
773
793
regs->msr |= (MSR_KERNEL & MSR_LE);
774
794
regs->gpr[1] = newsp;
775
-
err |= get_user(regs->gpr[2], &funct_desc_ptr->toc);
776
795
regs->gpr[3] = signr;
777
796
regs->result = 0;
778
797
if (ka->sa.sa_flags & SA_SIGINFO) {
+15
-1
arch/powerpc/kernel/vdso64/sigtramp.S
+15
-1
arch/powerpc/kernel/vdso64/sigtramp.S
···
142
142
/* Size of CR reg in DWARF unwind info. */
143
143
#define CRSIZE 4
144
144
145
+
/* Offset of CR reg within a full word. */
146
+
#ifdef __LITTLE_ENDIAN__
147
+
#define CROFF 0
148
+
#else
149
+
#define CROFF (RSIZE - CRSIZE)
150
+
#endif
151
+
145
152
/* This is the offset of the VMX reg pointer. */
146
153
#define VREGS 48*RSIZE+33*8
147
154
···
188
181
rsave (31, 31*RSIZE); \
189
182
rsave (67, 32*RSIZE); /* ap, used as temp for nip */ \
190
183
rsave (65, 36*RSIZE); /* lr */ \
191
-
rsave (70, 38*RSIZE + (RSIZE - CRSIZE)) /* cr */
184
+
rsave (68, 38*RSIZE + CROFF); /* cr fields */ \
185
+
rsave (69, 38*RSIZE + CROFF); \
186
+
rsave (70, 38*RSIZE + CROFF); \
187
+
rsave (71, 38*RSIZE + CROFF); \
188
+
rsave (72, 38*RSIZE + CROFF); \
189
+
rsave (73, 38*RSIZE + CROFF); \
190
+
rsave (74, 38*RSIZE + CROFF); \
191
+
rsave (75, 38*RSIZE + CROFF)
192
192
193
193
/* Describe where the FP regs are saved. */
194
194
#define EH_FRAME_FP \
+11
arch/powerpc/platforms/Kconfig.cputype
+11
arch/powerpc/platforms/Kconfig.cputype
···
403
403
default n
404
404
405
405
endmenu
406
+
407
+
config CPU_LITTLE_ENDIAN
408
+
bool "Build little endian kernel"
409
+
default n
410
+
help
411
+
This option selects whether a big endian or little endian kernel will
412
+
be built.
413
+
414
+
Note that if cross compiling a little endian kernel,
415
+
CROSS_COMPILE must point to a toolchain capable of targeting
416
+
little endian powerpc.
+12
-9
arch/powerpc/platforms/pseries/eeh_pseries.c
+12
-9
arch/powerpc/platforms/pseries/eeh_pseries.c
···
189
189
struct eeh_dev *edev;
190
190
struct eeh_pe pe;
191
191
struct pci_dn *pdn = PCI_DN(dn);
192
-
const u32 *class_code, *vendor_id, *device_id;
193
-
const u32 *regs;
192
+
const __be32 *classp, *vendorp, *devicep;
193
+
u32 class_code;
194
+
const __be32 *regs;
194
195
u32 pcie_flags;
195
196
int enable = 0;
196
197
int ret;
···
202
201
return NULL;
203
202
204
203
/* Retrieve class/vendor/device IDs */
205
-
class_code = of_get_property(dn, "class-code", NULL);
206
-
vendor_id = of_get_property(dn, "vendor-id", NULL);
207
-
device_id = of_get_property(dn, "device-id", NULL);
204
+
classp = of_get_property(dn, "class-code", NULL);
205
+
vendorp = of_get_property(dn, "vendor-id", NULL);
206
+
devicep = of_get_property(dn, "device-id", NULL);
208
207
209
208
/* Skip for bad OF node or PCI-ISA bridge */
210
-
if (!class_code || !vendor_id || !device_id)
209
+
if (!classp || !vendorp || !devicep)
211
210
return NULL;
212
211
if (dn->type && !strcmp(dn->type, "isa"))
213
212
return NULL;
213
+
214
+
class_code = of_read_number(classp, 1);
214
215
215
216
/*
216
217
* Update class code and mode of eeh device. We need
217
218
* correctly reflects that current device is root port
218
219
* or PCIe switch downstream port.
219
220
*/
220
-
edev->class_code = *class_code;
221
+
edev->class_code = class_code;
221
222
edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
222
223
edev->mode &= 0xFFFFFF00;
223
224
if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
···
246
243
/* Initialize the fake PE */
247
244
memset(&pe, 0, sizeof(struct eeh_pe));
248
245
pe.phb = edev->phb;
249
-
pe.config_addr = regs[0];
246
+
pe.config_addr = of_read_number(regs, 1);
250
247
251
248
/* Enable EEH on the device */
252
249
ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
253
250
if (!ret) {
254
-
edev->config_addr = regs[0];
251
+
edev->config_addr = of_read_number(regs, 1);
255
252
/* Retrieve PE address */
256
253
edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
257
254
pe.addr = edev->pe_config_addr;
+17
arch/powerpc/platforms/pseries/lpar.c
+17
arch/powerpc/platforms/pseries/lpar.c
···
245
245
&(ptes[j].pteh), &(ptes[j].ptel));
246
246
}
247
247
}
248
+
249
+
#ifdef __LITTLE_ENDIAN__
250
+
/* Reset exceptions to big endian */
251
+
if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
252
+
long rc;
253
+
254
+
rc = pseries_big_endian_exceptions();
255
+
/*
256
+
* At this point it is unlikely panic() will get anything
257
+
* out to the user, but at least this will stop us from
258
+
* continuing on further and creating an even more
259
+
* difficult to debug situation.
260
+
*/
261
+
if (rc)
262
+
panic("Could not enable big endian exceptions");
263
+
}
264
+
#endif
248
265
}
249
266
250
267
/*
+42
arch/powerpc/platforms/pseries/setup.c
+42
arch/powerpc/platforms/pseries/setup.c
···
442
442
}
443
443
#endif
444
444
445
+
#ifdef __LITTLE_ENDIAN__
446
+
long pseries_big_endian_exceptions(void)
447
+
{
448
+
long rc;
449
+
450
+
while (1) {
451
+
rc = enable_big_endian_exceptions();
452
+
if (!H_IS_LONG_BUSY(rc))
453
+
return rc;
454
+
mdelay(get_longbusy_msecs(rc));
455
+
}
456
+
}
457
+
458
+
static long pseries_little_endian_exceptions(void)
459
+
{
460
+
long rc;
461
+
462
+
while (1) {
463
+
rc = enable_little_endian_exceptions();
464
+
if (!H_IS_LONG_BUSY(rc))
465
+
return rc;
466
+
mdelay(get_longbusy_msecs(rc));
467
+
}
468
+
}
469
+
#endif
470
+
445
471
static void __init pSeries_setup_arch(void)
446
472
{
447
473
panic_timeout = 10;
···
723
697
724
698
/* Now try to figure out if we are running on LPAR */
725
699
of_scan_flat_dt(pseries_probe_fw_features, NULL);
700
+
701
+
#ifdef __LITTLE_ENDIAN__
702
+
if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
703
+
long rc;
704
+
/*
705
+
* Tell the hypervisor that we want our exceptions to
706
+
* be taken in little endian mode. If this fails we don't
707
+
* want to use BUG() because it will trigger an exception.
708
+
*/
709
+
rc = pseries_little_endian_exceptions();
710
+
if (rc) {
711
+
ppc_md.progress("H_SET_MODE LE exception fail", 0);
712
+
panic("Could not enable little endian exceptions");
713
+
}
714
+
}
715
+
#endif
726
716
727
717
if (firmware_has_feature(FW_FEATURE_LPAR))
728
718
hpte_init_lpar();