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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:
- __cpu_suspend mm switching fix after warm boot
- arch_setup_dma_ops implementation
- pgd_page compilation error fix
- defconfig updates

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: mm: Add pgd_page to support RCU fast_gup
arm64: defconfig: defconfig update for 3.19
arm64: kernel: fix __cpu_suspend mm switch on warm-boot
arm64: Replace set_arch_dma_coherent_ops with arch_setup_dma_ops

+27 -12
+5 -4
arch/arm64/configs/defconfig
··· 1 1 # CONFIG_LOCALVERSION_AUTO is not set 2 2 CONFIG_SYSVIPC=y 3 3 CONFIG_POSIX_MQUEUE=y 4 + CONFIG_FHANDLE=y 4 5 CONFIG_AUDIT=y 5 6 CONFIG_NO_HZ_IDLE=y 6 7 CONFIG_HIGH_RES_TIMERS=y ··· 14 13 CONFIG_IKCONFIG=y 15 14 CONFIG_IKCONFIG_PROC=y 16 15 CONFIG_LOG_BUF_SHIFT=14 17 - CONFIG_RESOURCE_COUNTERS=y 18 16 CONFIG_MEMCG=y 19 17 CONFIG_MEMCG_SWAP=y 20 18 CONFIG_MEMCG_KMEM=y 21 19 CONFIG_CGROUP_HUGETLB=y 22 20 # CONFIG_UTS_NS is not set 23 21 # CONFIG_IPC_NS is not set 24 - # CONFIG_PID_NS is not set 25 22 # CONFIG_NET_NS is not set 26 23 CONFIG_SCHED_AUTOGROUP=y 27 24 CONFIG_BLK_DEV_INITRD=y ··· 91 92 CONFIG_SERIAL_OF_PLATFORM=y 92 93 CONFIG_VIRTIO_CONSOLE=y 93 94 # CONFIG_HW_RANDOM is not set 94 - # CONFIG_HMC_DRV is not set 95 95 CONFIG_SPI=y 96 96 CONFIG_SPI_PL022=y 97 97 CONFIG_GPIO_PL061=y ··· 131 133 CONFIG_EXT4_FS=y 132 134 CONFIG_FANOTIFY=y 133 135 CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y 136 + CONFIG_QUOTA=y 137 + CONFIG_AUTOFS4_FS=y 134 138 CONFIG_FUSE_FS=y 135 139 CONFIG_CUSE=y 136 140 CONFIG_VFAT_FS=y ··· 152 152 CONFIG_DEBUG_KERNEL=y 153 153 CONFIG_LOCKUP_DETECTOR=y 154 154 # CONFIG_SCHED_DEBUG is not set 155 + # CONFIG_DEBUG_PREEMPT is not set 155 156 # CONFIG_FTRACE is not set 157 + CONFIG_KEYS=y 156 158 CONFIG_SECURITY=y 157 159 CONFIG_CRYPTO_ANSI_CPRNG=y 158 160 CONFIG_ARM64_CRYPTO=y 159 161 CONFIG_CRYPTO_SHA1_ARM64_CE=y 160 162 CONFIG_CRYPTO_SHA2_ARM64_CE=y 161 163 CONFIG_CRYPTO_GHASH_ARM64_CE=y 162 - CONFIG_CRYPTO_AES_ARM64_CE=y 163 164 CONFIG_CRYPTO_AES_ARM64_CE_CCM=y 164 165 CONFIG_CRYPTO_AES_ARM64_CE_BLK=y 165 166 CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y
+6 -5
arch/arm64/include/asm/dma-mapping.h
··· 52 52 dev->archdata.dma_ops = ops; 53 53 } 54 54 55 - static inline int set_arch_dma_coherent_ops(struct device *dev) 55 + static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 56 + struct iommu_ops *iommu, bool coherent) 56 57 { 57 - dev->archdata.dma_coherent = true; 58 - set_dma_ops(dev, &coherent_swiotlb_dma_ops); 59 - return 0; 58 + dev->archdata.dma_coherent = coherent; 59 + if (coherent) 60 + set_dma_ops(dev, &coherent_swiotlb_dma_ops); 60 61 } 61 - #define set_arch_dma_coherent_ops set_arch_dma_coherent_ops 62 + #define arch_setup_dma_ops arch_setup_dma_ops 62 63 63 64 /* do not use this function in a driver */ 64 65 static inline bool is_device_dma_coherent(struct device *dev)
+3 -2
arch/arm64/include/asm/pgtable.h
··· 298 298 #define pfn_pmd(pfn,prot) (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))) 299 299 #define mk_pmd(page,prot) pfn_pmd(page_to_pfn(page),prot) 300 300 301 - #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) 302 301 #define pud_write(pud) pte_write(pud_pte(pud)) 303 302 #define pud_pfn(pud) (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT) 304 303 ··· 400 401 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr); 401 402 } 402 403 403 - #define pud_page(pud) pmd_page(pud_pmd(pud)) 404 + #define pud_page(pud) pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK)) 404 405 405 406 #endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */ 406 407 ··· 435 436 { 436 437 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr); 437 438 } 439 + 440 + #define pgd_page(pgd) pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK)) 438 441 439 442 #endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */ 440 443
+13 -1
arch/arm64/kernel/suspend.c
··· 5 5 #include <asm/debug-monitors.h> 6 6 #include <asm/pgtable.h> 7 7 #include <asm/memory.h> 8 + #include <asm/mmu_context.h> 8 9 #include <asm/smp_plat.h> 9 10 #include <asm/suspend.h> 10 11 #include <asm/tlbflush.h> ··· 99 98 */ 100 99 ret = __cpu_suspend_enter(arg, fn); 101 100 if (ret == 0) { 102 - cpu_switch_mm(mm->pgd, mm); 101 + /* 102 + * We are resuming from reset with TTBR0_EL1 set to the 103 + * idmap to enable the MMU; restore the active_mm mappings in 104 + * TTBR0_EL1 unless the active_mm == &init_mm, in which case 105 + * the thread entered __cpu_suspend with TTBR0_EL1 set to 106 + * reserved TTBR0 page tables and should be restored as such. 107 + */ 108 + if (mm == &init_mm) 109 + cpu_set_reserved_ttbr0(); 110 + else 111 + cpu_switch_mm(mm->pgd, mm); 112 + 103 113 flush_tlb_all(); 104 114 105 115 /*