Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"A few ARM fixes:
- Robin Murphy noticed that the non-secure privileged entry was
relying on undefined behaviour, which needed to be fixed.
- Vladimir Murzin noticed that prov-v7 fails to build for MMUless
configurations because a required header file wasn't included.
- A bunch of fixes for StrongARM regressions found while testing
4.8-rc on such platforms"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: sa1100: clear reset status prior to reboot
ARM: 8600/1: Enforce some NS-SVC initialisation
ARM: 8599/1: mm: pull asm/memory.h explicitly
ARM: sa1100: register clocks early
ARM: sa1100: fix 3.6864MHz clock
+23
-2
+13
arch/arm/kernel/hyp-stub.S
+13
arch/arm/kernel/hyp-stub.S
···
142
142
and r7, #0x1f @ Preserve HPMN
143
143
mcr p15, 4, r7, c1, c1, 1 @ HDCR
144
144
145
+
@ Make sure NS-SVC is initialised appropriately
146
+
mrc p15, 0, r7, c1, c0, 0 @ SCTLR
147
+
orr r7, #(1 << 5) @ CP15 barriers enabled
148
+
bic r7, #(3 << 7) @ Clear SED/ITD for v8 (RES0 for v7)
149
+
bic r7, #(3 << 19) @ WXN and UWXN disabled
150
+
mcr p15, 0, r7, c1, c0, 0 @ SCTLR
151
+
152
+
mrc p15, 0, r7, c0, c0, 0 @ MIDR
153
+
mcr p15, 4, r7, c0, c0, 0 @ VPIDR
154
+
155
+
mrc p15, 0, r7, c0, c0, 5 @ MPIDR
156
+
mcr p15, 4, r7, c0, c0, 5 @ VMPIDR
157
+
145
158
#if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
146
159
@ make CNTP_* and CNTPCT accessible from PL1
147
160
mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
+3
-2
arch/arm/mach-sa1100/clock.c
+3
-2
arch/arm/mach-sa1100/clock.c
···
125
125
}
126
126
127
127
static struct clkops clk_36864_ops = {
128
+
.enable = clk_cpu_enable,
129
+
.disable = clk_cpu_disable,
128
130
.get_rate = clk_36864_get_rate,
129
131
};
130
132
···
142
140
CLKDEV_INIT(NULL, "OSTIMER0", &clk_36864),
143
141
};
144
142
145
-
static int __init sa11xx_clk_init(void)
143
+
int __init sa11xx_clk_init(void)
146
144
{
147
145
clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
148
146
return 0;
149
147
}
150
-
core_initcall(sa11xx_clk_init);
+4
arch/arm/mach-sa1100/generic.c
+4
arch/arm/mach-sa1100/generic.c
···
34
34
35
35
#include <mach/hardware.h>
36
36
#include <mach/irqs.h>
37
+
#include <mach/reset.h>
37
38
38
39
#include "generic.h"
39
40
#include <clocksource/pxa.h>
···
96
95
97
96
void sa11x0_restart(enum reboot_mode mode, const char *cmd)
98
97
{
98
+
clear_reset_status(RESET_STATUS_ALL);
99
+
99
100
if (mode == REBOOT_SOFT) {
100
101
/* Jump into ROM at address 0 */
101
102
soft_restart(0);
···
391
388
sa11x0_init_irq_nodt(IRQ_GPIO0_SC, irq_resource.start);
392
389
393
390
sa1100_init_gpio();
391
+
sa11xx_clk_init();
394
392
}
395
393
396
394
/*
+2
arch/arm/mach-sa1100/generic.h
+2
arch/arm/mach-sa1100/generic.h