Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'parisc-for-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc architecture updates from Helge Deller:
- On parisc we now use the generic clockevent framework for timekeeping
- Although there is no 64-bit glibc/userspace for parisc yet, for
testing purposes one can run statically linked 64-bit binaries. This
patchset contains two patches which fix 64-bit userspace which has
been broken since kernel 4.19
- Fix the userspace stack position and size when the ADDR_NO_RANDOMIZE
personality is enabled
- On other architectures mmap(MAP_GROWSDOWN | MAP_STACK) creates a
downward-growing stack. On parisc mmap(MAP_STACK) is now sufficient
to create an upward-growing stack
* tag 'parisc-for-6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Allow mmap(MAP_STACK) memory to automatically expand upwards
parisc: Use PRIV_USER instead of hardcoded value
parisc: Fix itlb miss handler for 64-bit programs
parisc: Fix 64-bit userspace syscall path
parisc: Fix stack start for ADDR_NO_RANDOMIZE personality
parisc: Convert to generic clockevents
parisc: pdc_stable: Constify struct kobj_type
+131
-167
+1
-1
arch/parisc/Kconfig
+1
-1
arch/parisc/Kconfig
+14
arch/parisc/include/asm/mman.h
+14
arch/parisc/include/asm/mman.h
···
11
11
}
12
12
#define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported
13
13
14
+
static inline unsigned long arch_calc_vm_flag_bits(unsigned long flags)
15
+
{
16
+
/*
17
+
* The stack on parisc grows upwards, so if userspace requests memory
18
+
* for a stack, mark it with VM_GROWSUP so that the stack expansion in
19
+
* the fault handler will work.
20
+
*/
21
+
if (flags & MAP_STACK)
22
+
return VM_GROWSUP;
23
+
24
+
return 0;
25
+
}
26
+
#define arch_calc_vm_flag_bits(flags) arch_calc_vm_flag_bits(flags)
27
+
14
28
#endif /* __ASM_MMAN_H__ */
+1
-1
arch/parisc/include/asm/processor.h
+1
-1
arch/parisc/include/asm/processor.h
···
298
298
extern void do_cpu_irq_mask(struct pt_regs *);
299
299
extern irqreturn_t timer_interrupt(int, void *);
300
300
extern irqreturn_t ipi_interrupt(int, void *);
301
-
extern void start_cpu_itimer(void);
301
+
extern void parisc_clockevent_init(void);
302
302
extern void handle_interruption(int, struct pt_regs *);
303
303
304
304
/* called from assembly code: */
+2
-4
arch/parisc/kernel/entry.S
+2
-4
arch/parisc/kernel/entry.S
···
1051
1051
STREG %r16, PT_ISR(%r29)
1052
1052
STREG %r17, PT_IOR(%r29)
1053
1053
1054
-
#if 0 && defined(CONFIG_64BIT)
1055
-
/* Revisit when we have 64-bit code above 4Gb */
1054
+
#if defined(CONFIG_64BIT)
1056
1055
b,n intr_save2
1057
1056
1058
1057
skip_save_ior:
···
1059
1060
* need to adjust iasq/iaoq here in the same way we adjusted isr/ior
1060
1061
* above.
1061
1062
*/
1062
-
extrd,u,* %r8,PSW_W_BIT,1,%r1
1063
-
cmpib,COND(=),n 1,%r1,intr_save2
1063
+
bb,COND(>=),n %r8,PSW_W_BIT,intr_save2
1064
1064
LDREG PT_IASQ0(%r29), %r16
1065
1065
LDREG PT_IAOQ0(%r29), %r17
1066
1066
/* adjust iasq/iaoq */
+1
-1
arch/parisc/kernel/smp.c
+1
-1
arch/parisc/kernel/smp.c
+8
-6
arch/parisc/kernel/syscall.S
+8
-6
arch/parisc/kernel/syscall.S
···
243
243
244
244
#ifdef CONFIG_64BIT
245
245
ldil L%sys_call_table, %r1
246
-
or,= %r2,%r2,%r2
247
-
addil L%(sys_call_table64-sys_call_table), %r1
246
+
or,ev %r2,%r2,%r2
247
+
ldil L%sys_call_table64, %r1
248
248
ldo R%sys_call_table(%r1), %r19
249
-
or,= %r2,%r2,%r2
249
+
or,ev %r2,%r2,%r2
250
250
ldo R%sys_call_table64(%r1), %r19
251
251
#else
252
252
load32 sys_call_table, %r19
···
379
379
extrd,u %r19,63,1,%r2 /* W hidden in bottom bit */
380
380
381
381
ldil L%sys_call_table, %r1
382
-
or,= %r2,%r2,%r2
383
-
addil L%(sys_call_table64-sys_call_table), %r1
382
+
or,ev %r2,%r2,%r2
383
+
ldil L%sys_call_table64, %r1
384
384
ldo R%sys_call_table(%r1), %r19
385
-
or,= %r2,%r2,%r2
385
+
or,ev %r2,%r2,%r2
386
386
ldo R%sys_call_table64(%r1), %r19
387
387
#else
388
388
load32 sys_call_table, %r19
···
1327
1327
END(sys_call_table)
1328
1328
1329
1329
#ifdef CONFIG_64BIT
1330
+
#undef __SYSCALL_WITH_COMPAT
1331
+
#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)
1330
1332
.align 8
1331
1333
ENTRY(sys_call_table64)
1332
1334
#include <asm/syscall_table_64.h> /* 64-bit syscalls */
+100
-151
arch/parisc/kernel/time.c
+100
-151
arch/parisc/kernel/time.c
···
1
1
// SPDX-License-Identifier: GPL-2.0
2
2
/*
3
-
* linux/arch/parisc/kernel/time.c
3
+
* Common time service routines for parisc machines.
4
+
* based on arch/loongarch/kernel/time.c
4
5
*
5
-
* Copyright (C) 1991, 1992, 1995 Linus Torvalds
6
-
* Modifications for ARM (C) 1994, 1995, 1996,1997 Russell King
7
-
* Copyright (C) 1999 SuSE GmbH, (Philipp Rumpf, prumpf@tux.org)
8
-
*
9
-
* 1994-07-02 Alan Modra
10
-
* fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
11
-
* 1998-12-20 Updated NTP code according to technical memorandum Jan '96
12
-
* "A Kernel Model for Precision Timekeeping" by Dave Mills
6
+
* Copyright (C) 2024 Helge Deller <deller@gmx.de>
13
7
*/
14
-
#include <linux/errno.h>
15
-
#include <linux/module.h>
16
-
#include <linux/rtc.h>
17
-
#include <linux/sched.h>
18
-
#include <linux/sched/clock.h>
19
-
#include <linux/sched_clock.h>
20
-
#include <linux/kernel.h>
21
-
#include <linux/param.h>
22
-
#include <linux/string.h>
23
-
#include <linux/mm.h>
24
-
#include <linux/interrupt.h>
25
-
#include <linux/time.h>
8
+
#include <linux/clockchips.h>
9
+
#include <linux/delay.h>
10
+
#include <linux/export.h>
26
11
#include <linux/init.h>
27
-
#include <linux/smp.h>
28
-
#include <linux/profile.h>
29
-
#include <linux/clocksource.h>
12
+
#include <linux/interrupt.h>
13
+
#include <linux/kernel.h>
14
+
#include <linux/sched_clock.h>
15
+
#include <linux/spinlock.h>
16
+
#include <linux/rtc.h>
30
17
#include <linux/platform_device.h>
31
-
#include <linux/ftrace.h>
18
+
#include <asm/processor.h>
32
19
33
-
#include <linux/uaccess.h>
34
-
#include <asm/io.h>
35
-
#include <asm/irq.h>
36
-
#include <asm/page.h>
37
-
#include <asm/param.h>
38
-
#include <asm/pdc.h>
39
-
#include <asm/led.h>
20
+
static u64 cr16_clock_freq;
21
+
static unsigned long clocktick;
40
22
41
-
#include <linux/timex.h>
23
+
int time_keeper_id; /* CPU used for timekeeping */
42
24
43
-
int time_keeper_id __read_mostly; /* CPU used for timekeeping. */
25
+
static DEFINE_PER_CPU(struct clock_event_device, parisc_clockevent_device);
44
26
45
-
static unsigned long clocktick __ro_after_init; /* timer cycles per tick */
46
-
47
-
/*
48
-
* We keep time on PA-RISC Linux by using the Interval Timer which is
49
-
* a pair of registers; one is read-only and one is write-only; both
50
-
* accessed through CR16. The read-only register is 32 or 64 bits wide,
51
-
* and increments by 1 every CPU clock tick. The architecture only
52
-
* guarantees us a rate between 0.5 and 2, but all implementations use a
53
-
* rate of 1. The write-only register is 32-bits wide. When the lowest
54
-
* 32 bits of the read-only register compare equal to the write-only
55
-
* register, it raises a maskable external interrupt. Each processor has
56
-
* an Interval Timer of its own and they are not synchronised.
57
-
*
58
-
* We want to generate an interrupt every 1/HZ seconds. So we program
59
-
* CR16 to interrupt every @clocktick cycles. The it_value in cpu_data
60
-
* is programmed with the intended time of the next tick. We can be
61
-
* held off for an arbitrarily long period of time by interrupts being
62
-
* disabled, so we may miss one or more ticks.
63
-
*/
64
-
irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
27
+
static void parisc_event_handler(struct clock_event_device *dev)
65
28
{
66
-
unsigned long now;
67
-
unsigned long next_tick;
68
-
unsigned long ticks_elapsed = 0;
69
-
unsigned int cpu = smp_processor_id();
70
-
struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
29
+
}
71
30
72
-
/* gcc can optimize for "read-only" case with a local clocktick */
73
-
unsigned long cpt = clocktick;
31
+
static int parisc_timer_next_event(unsigned long delta, struct clock_event_device *evt)
32
+
{
33
+
unsigned long new_cr16;
74
34
75
-
/* Initialize next_tick to the old expected tick time. */
76
-
next_tick = cpuinfo->it_value;
35
+
new_cr16 = mfctl(16) + delta;
36
+
mtctl(new_cr16, 16);
77
37
78
-
/* Calculate how many ticks have elapsed. */
79
-
now = mfctl(16);
80
-
do {
81
-
++ticks_elapsed;
82
-
next_tick += cpt;
83
-
} while (next_tick - now > cpt);
38
+
return 0;
39
+
}
84
40
85
-
/* Store (in CR16 cycles) up to when we are accounting right now. */
86
-
cpuinfo->it_value = next_tick;
41
+
irqreturn_t timer_interrupt(int irq, void *data)
42
+
{
43
+
struct clock_event_device *cd;
44
+
int cpu = smp_processor_id();
87
45
88
-
/* Go do system house keeping. */
89
-
if (IS_ENABLED(CONFIG_SMP) && (cpu != time_keeper_id))
90
-
ticks_elapsed = 0;
91
-
legacy_timer_tick(ticks_elapsed);
46
+
cd = &per_cpu(parisc_clockevent_device, cpu);
92
47
93
-
/* Skip clockticks on purpose if we know we would miss those.
94
-
* The new CR16 must be "later" than current CR16 otherwise
95
-
* itimer would not fire until CR16 wrapped - e.g 4 seconds
96
-
* later on a 1Ghz processor. We'll account for the missed
97
-
* ticks on the next timer interrupt.
98
-
* We want IT to fire modulo clocktick even if we miss/skip some.
99
-
* But those interrupts don't in fact get delivered that regularly.
100
-
*
101
-
* "next_tick - now" will always give the difference regardless
102
-
* if one or the other wrapped. If "now" is "bigger" we'll end up
103
-
* with a very large unsigned number.
104
-
*/
105
-
now = mfctl(16);
106
-
while (next_tick - now > cpt)
107
-
next_tick += cpt;
48
+
if (clockevent_state_periodic(cd))
49
+
parisc_timer_next_event(clocktick, cd);
108
50
109
-
/* Program the IT when to deliver the next interrupt.
110
-
* Only bottom 32-bits of next_tick are writable in CR16!
111
-
* Timer interrupt will be delivered at least a few hundred cycles
112
-
* after the IT fires, so if we are too close (<= 8000 cycles) to the
113
-
* next cycle, simply skip it.
114
-
*/
115
-
if (next_tick - now <= 8000)
116
-
next_tick += cpt;
117
-
mtctl(next_tick, 16);
51
+
if (clockevent_state_periodic(cd) || clockevent_state_oneshot(cd))
52
+
cd->event_handler(cd);
118
53
119
54
return IRQ_HANDLED;
120
55
}
121
56
57
+
static int parisc_set_state_oneshot(struct clock_event_device *evt)
58
+
{
59
+
parisc_timer_next_event(clocktick, evt);
122
60
123
-
unsigned long profile_pc(struct pt_regs *regs)
61
+
return 0;
62
+
}
63
+
64
+
static int parisc_set_state_periodic(struct clock_event_device *evt)
65
+
{
66
+
parisc_timer_next_event(clocktick, evt);
67
+
68
+
return 0;
69
+
}
70
+
71
+
static int parisc_set_state_shutdown(struct clock_event_device *evt)
72
+
{
73
+
return 0;
74
+
}
75
+
76
+
void parisc_clockevent_init(void)
77
+
{
78
+
unsigned int cpu = smp_processor_id();
79
+
unsigned long min_delta = 0x600; /* XXX */
80
+
unsigned long max_delta = (1UL << (BITS_PER_LONG - 1));
81
+
struct clock_event_device *cd;
82
+
83
+
cd = &per_cpu(parisc_clockevent_device, cpu);
84
+
85
+
cd->name = "cr16_clockevent";
86
+
cd->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC |
87
+
CLOCK_EVT_FEAT_PERCPU;
88
+
89
+
cd->irq = TIMER_IRQ;
90
+
cd->rating = 320;
91
+
cd->cpumask = cpumask_of(cpu);
92
+
cd->set_state_oneshot = parisc_set_state_oneshot;
93
+
cd->set_state_oneshot_stopped = parisc_set_state_shutdown;
94
+
cd->set_state_periodic = parisc_set_state_periodic;
95
+
cd->set_state_shutdown = parisc_set_state_shutdown;
96
+
cd->set_next_event = parisc_timer_next_event;
97
+
cd->event_handler = parisc_event_handler;
98
+
99
+
clockevents_config_and_register(cd, cr16_clock_freq, min_delta, max_delta);
100
+
}
101
+
102
+
unsigned long notrace profile_pc(struct pt_regs *regs)
124
103
{
125
104
unsigned long pc = instruction_pointer(regs);
126
105
···
114
135
return pc;
115
136
}
116
137
EXPORT_SYMBOL(profile_pc);
117
-
118
-
119
-
/* clock source code */
120
-
121
-
static u64 notrace read_cr16(struct clocksource *cs)
122
-
{
123
-
return get_cycles();
124
-
}
125
-
126
-
static struct clocksource clocksource_cr16 = {
127
-
.name = "cr16",
128
-
.rating = 300,
129
-
.read = read_cr16,
130
-
.mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
131
-
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
132
-
};
133
-
134
-
void start_cpu_itimer(void)
135
-
{
136
-
unsigned int cpu = smp_processor_id();
137
-
unsigned long next_tick = mfctl(16) + clocktick;
138
-
139
-
mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */
140
-
141
-
per_cpu(cpu_data, cpu).it_value = next_tick;
142
-
}
143
138
144
139
#if IS_ENABLED(CONFIG_RTC_DRV_GENERIC)
145
140
static int rtc_generic_get_time(struct device *dev, struct rtc_time *tm)
···
177
224
}
178
225
}
179
226
180
-
181
227
static u64 notrace read_cr16_sched_clock(void)
182
228
{
183
229
return get_cycles();
184
230
}
231
+
232
+
static u64 notrace read_cr16(struct clocksource *cs)
233
+
{
234
+
return get_cycles();
235
+
}
236
+
237
+
static struct clocksource clocksource_cr16 = {
238
+
.name = "cr16",
239
+
.rating = 300,
240
+
.read = read_cr16,
241
+
.mask = CLOCKSOURCE_MASK(BITS_PER_LONG),
242
+
.flags = CLOCK_SOURCE_IS_CONTINUOUS |
243
+
CLOCK_SOURCE_VALID_FOR_HRES |
244
+
CLOCK_SOURCE_MUST_VERIFY |
245
+
CLOCK_SOURCE_VERIFY_PERCPU,
246
+
};
185
247
186
248
187
249
/*
···
205
237
206
238
void __init time_init(void)
207
239
{
208
-
unsigned long cr16_hz;
209
-
210
-
clocktick = (100 * PAGE0->mem_10msec) / HZ;
211
-
start_cpu_itimer(); /* get CPU 0 started */
212
-
213
-
cr16_hz = 100 * PAGE0->mem_10msec; /* Hz */
240
+
cr16_clock_freq = 100 * PAGE0->mem_10msec; /* Hz */
241
+
clocktick = cr16_clock_freq / HZ;
214
242
215
243
/* register as sched_clock source */
216
-
sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_hz);
217
-
}
244
+
sched_clock_register(read_cr16_sched_clock, BITS_PER_LONG, cr16_clock_freq);
218
245
219
-
static int __init init_cr16_clocksource(void)
220
-
{
221
-
/*
222
-
* The cr16 interval timers are not synchronized across CPUs.
223
-
*/
224
-
if (num_online_cpus() > 1 && !running_on_qemu) {
225
-
clocksource_cr16.name = "cr16_unstable";
226
-
clocksource_cr16.flags = CLOCK_SOURCE_UNSTABLE;
227
-
clocksource_cr16.rating = 0;
228
-
}
246
+
parisc_clockevent_init();
229
247
230
248
/* register at clocksource framework */
231
-
clocksource_register_hz(&clocksource_cr16,
232
-
100 * PAGE0->mem_10msec);
233
-
234
-
return 0;
249
+
clocksource_register_hz(&clocksource_cr16, cr16_clock_freq);
235
250
}
236
-
237
-
device_initcall(init_cr16_clocksource);
+1
-1
arch/parisc/kernel/traps.c
+1
-1
arch/parisc/kernel/traps.c
···
504
504
if (((unsigned long)regs->iaoq[0] & 3) &&
505
505
((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
506
506
/* Kill the user process later */
507
-
regs->iaoq[0] = 0 | 3;
507
+
regs->iaoq[0] = 0 | PRIV_USER;
508
508
regs->iaoq[1] = regs->iaoq[0] + 4;
509
509
regs->iasq[0] = regs->iasq[1] = regs->sr[7];
510
510
regs->gr[0] &= ~PSW_B;
+1
-1
drivers/parisc/pdc_stable.c
+1
-1
drivers/parisc/pdc_stable.c
···
483
483
ATTRIBUTE_GROUPS(paths_subsys);
484
484
485
485
/* Specific kobject type for our PDC paths */
486
-
static struct kobj_type ktype_pdcspath = {
486
+
static const struct kobj_type ktype_pdcspath = {
487
487
.sysfs_ops = &pdcspath_attr_ops,
488
488
.default_groups = paths_subsys_groups,
489
489
};
+2
-1
fs/exec.c
+2
-1
fs/exec.c
···
811
811
stack_base = calc_max_stack_size(stack_base);
812
812
813
813
/* Add space for stack randomization. */
814
-
stack_base += (STACK_RND_MASK << PAGE_SHIFT);
814
+
if (current->flags & PF_RANDOMIZE)
815
+
stack_base += (STACK_RND_MASK << PAGE_SHIFT);
815
816
816
817
/* Make sure we didn't let the argument array grow too large. */
817
818
if (vma->vm_end - vma->vm_start > stack_base)