Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'perf_urgent_for_v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fixes from Borislav Petkov:
- Drop the __weak attribute from a function prototype as it otherwise
leads to the function getting replaced by a dummy stub
- Fix the umask value setup of the frontend event as former is
different on two Intel cores
* tag 'perf_urgent_for_v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: Fix the FRONTEND encoding on GNR and MTL
perf/core: Drop __weak attribute from arch_perf_update_userpage() prototype
+17
-4
+14
-1
arch/x86/events/intel/core.c
+14
-1
arch/x86/events/intel/core.c
···
349
349
EVENT_CONSTRAINT_END
350
350
};
351
351
352
+
static struct extra_reg intel_gnr_extra_regs[] __read_mostly = {
353
+
INTEL_UEVENT_EXTRA_REG(0x012a, MSR_OFFCORE_RSP_0, 0x3fffffffffull, RSP_0),
354
+
INTEL_UEVENT_EXTRA_REG(0x012b, MSR_OFFCORE_RSP_1, 0x3fffffffffull, RSP_1),
355
+
INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd),
356
+
INTEL_UEVENT_EXTRA_REG(0x02c6, MSR_PEBS_FRONTEND, 0x9, FE),
357
+
INTEL_UEVENT_EXTRA_REG(0x03c6, MSR_PEBS_FRONTEND, 0x7fff1f, FE),
358
+
INTEL_UEVENT_EXTRA_REG(0x40ad, MSR_PEBS_FRONTEND, 0x7, FE),
359
+
INTEL_UEVENT_EXTRA_REG(0x04c2, MSR_PEBS_FRONTEND, 0x8, FE),
360
+
EVENT_EXTRA_END
361
+
};
352
362
353
363
EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3");
354
364
EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3");
···
6506
6496
case INTEL_FAM6_SAPPHIRERAPIDS_X:
6507
6497
case INTEL_FAM6_EMERALDRAPIDS_X:
6508
6498
x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX;
6499
+
x86_pmu.extra_regs = intel_spr_extra_regs;
6509
6500
fallthrough;
6510
6501
case INTEL_FAM6_GRANITERAPIDS_X:
6511
6502
case INTEL_FAM6_GRANITERAPIDS_D:
···
6517
6506
6518
6507
x86_pmu.event_constraints = intel_spr_event_constraints;
6519
6508
x86_pmu.pebs_constraints = intel_spr_pebs_event_constraints;
6520
-
x86_pmu.extra_regs = intel_spr_extra_regs;
6509
+
if (!x86_pmu.extra_regs)
6510
+
x86_pmu.extra_regs = intel_gnr_extra_regs;
6521
6511
x86_pmu.limit_period = spr_limit_period;
6522
6512
x86_pmu.pebs_ept = 1;
6523
6513
x86_pmu.pebs_aliases = NULL;
···
6662
6650
pmu->pebs_constraints = intel_grt_pebs_event_constraints;
6663
6651
pmu->extra_regs = intel_grt_extra_regs;
6664
6652
if (is_mtl(boot_cpu_data.x86_model)) {
6653
+
x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX].extra_regs = intel_gnr_extra_regs;
6665
6654
x86_pmu.pebs_latency_data = mtl_latency_data_small;
6666
6655
extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
6667
6656
mtl_hybrid_extra_attr_rtm : mtl_hybrid_extra_attr;
+3
-3
include/linux/perf_event.h
+3
-3
include/linux/perf_event.h
···
1845
1845
#define perf_event_exit_cpu NULL
1846
1846
#endif
1847
1847
1848
-
extern void __weak arch_perf_update_userpage(struct perf_event *event,
1849
-
struct perf_event_mmap_page *userpg,
1850
-
u64 now);
1848
+
extern void arch_perf_update_userpage(struct perf_event *event,
1849
+
struct perf_event_mmap_page *userpg,
1850
+
u64 now);
1851
1851
1852
1852
#ifdef CONFIG_MMU
1853
1853
extern __weak u64 arch_perf_get_page_size(struct mm_struct *mm, unsigned long addr);