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KVM: arm64: Always populate FGT masks at boot time

We currently only populate the FGT masks if the underlying HW does
support FEAT_FGT. However, with the addition of the RES1 support for
system registers, this results in a lot of noise at boot time, as
reported by Nathan.

That's because even if FGT isn't supported, we still check for the
attribution of the bits to particular features, and not keeping the
masks up-to-date leads to (fairly harmess) warnings.

Given that we want these checks to be enforced even if the HW doesn't
support FGT, enable the generation of FGT masks unconditionally (this
is rather cheap anyway). Only the storage of the FGT configuration is
avoided, which will save a tiny bit of memory on these machines.

Reported-by: Nathan Chancellor <nathan@kernel.org>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Fixes: c259d763e6b09 ("KVM: arm64: Account for RES1 bits in DECLARE_FEAT_MAP() and co")
Link: https://lore.kernel.org/r/20260120211558.GA834868@ax162
Link: https://patch.msgid.link/20260122085153.535538-1-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>

+9 -9
+9 -9
arch/arm64/kvm/emulate-nested.c
··· 2276 2276 kvm_info("nv: %ld coarse grained trap handlers\n", 2277 2277 ARRAY_SIZE(encoding_to_cgt)); 2278 2278 2279 - if (!cpus_have_final_cap(ARM64_HAS_FGT)) 2280 - goto check_mcb; 2281 - 2282 2279 for (int i = 0; i < ARRAY_SIZE(encoding_to_fgt); i++) { 2283 2280 const struct encoding_to_trap_config *fgt = &encoding_to_fgt[i]; 2284 2281 union trap_config tc; ··· 2295 2298 } 2296 2299 2297 2300 tc.val |= fgt->tc.val; 2301 + 2302 + if (!aggregate_fgt(tc)) { 2303 + ret = -EINVAL; 2304 + print_nv_trap_error(fgt, "FGT bit is reserved", ret); 2305 + } 2306 + 2307 + if (!cpus_have_final_cap(ARM64_HAS_FGT)) 2308 + continue; 2309 + 2298 2310 prev = xa_store(&sr_forward_xa, enc, 2299 2311 xa_mk_value(tc.val), GFP_KERNEL); 2300 2312 2301 2313 if (xa_is_err(prev)) { 2302 2314 ret = xa_err(prev); 2303 2315 print_nv_trap_error(fgt, "Failed FGT insertion", ret); 2304 - } 2305 - 2306 - if (!aggregate_fgt(tc)) { 2307 - ret = -EINVAL; 2308 - print_nv_trap_error(fgt, "FGT bit is reserved", ret); 2309 2316 } 2310 2317 } 2311 2318 } ··· 2326 2325 kvm_info("nv: %ld fine grained trap handlers\n", 2327 2326 ARRAY_SIZE(encoding_to_fgt)); 2328 2327 2329 - check_mcb: 2330 2328 for (int id = __MULTIPLE_CONTROL_BITS__; id < __COMPLEX_CONDITIONS__; id++) { 2331 2329 const enum cgt_group_id *cgids; 2332 2330