Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu/pm: move additional logic into amdgpu_dpm_force_performance_level
This is part of the forced performance level. Move it from
the sysfs handler into amdgpu_dpm_force_performance_level.
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+59
-52
+59
-2
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+59
-2
drivers/gpu/drm/amd/pm/amdgpu_dpm.c
···
692
692
amdgpu_dpm_compute_clocks(adev);
693
693
}
694
694
695
-
enum amd_dpm_forced_level amdgpu_dpm_get_performance_level(struct amdgpu_device *adev)
695
+
static enum amd_dpm_forced_level amdgpu_dpm_get_performance_level_locked(struct amdgpu_device *adev)
696
696
{
697
697
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
698
698
enum amd_dpm_forced_level level;
699
699
700
-
mutex_lock(&adev->pm.mutex);
701
700
if (pp_funcs->get_performance_level)
702
701
level = pp_funcs->get_performance_level(adev->powerplay.pp_handle);
703
702
else
704
703
level = adev->pm.dpm.forced_level;
704
+
705
+
return level;
706
+
}
707
+
708
+
enum amd_dpm_forced_level amdgpu_dpm_get_performance_level(struct amdgpu_device *adev)
709
+
{
710
+
enum amd_dpm_forced_level level;
711
+
712
+
mutex_lock(&adev->pm.mutex);
713
+
level = amdgpu_dpm_get_performance_level_locked(adev);
705
714
mutex_unlock(&adev->pm.mutex);
706
715
707
716
return level;
···
720
711
enum amd_dpm_forced_level level)
721
712
{
722
713
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
714
+
enum amd_dpm_forced_level current_level;
715
+
uint32_t profile_mode_mask = AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD |
716
+
AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK |
717
+
AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK |
718
+
AMD_DPM_FORCED_LEVEL_PROFILE_PEAK;
723
719
int ret = 0;
724
720
725
721
if (!pp_funcs->force_performance_level)
···
735
721
if (adev->pm.dpm.thermal_active) {
736
722
ret = -EINVAL;
737
723
goto out;
724
+
}
725
+
726
+
current_level = amdgpu_dpm_get_performance_level_locked(adev);
727
+
if (current_level == level) {
728
+
ret = 0;
729
+
goto out;
730
+
}
731
+
732
+
if (adev->asic_type == CHIP_RAVEN) {
733
+
if (!(adev->apu_flags & AMD_APU_IS_RAVEN2)) {
734
+
if (current_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
735
+
level == AMD_DPM_FORCED_LEVEL_MANUAL)
736
+
amdgpu_gfx_off_ctrl(adev, false);
737
+
else if (current_level == AMD_DPM_FORCED_LEVEL_MANUAL &&
738
+
level != AMD_DPM_FORCED_LEVEL_MANUAL)
739
+
amdgpu_gfx_off_ctrl(adev, true);
740
+
}
741
+
}
742
+
743
+
if (!(current_level & profile_mode_mask) &&
744
+
(level == AMD_DPM_FORCED_LEVEL_PROFILE_EXIT)) {
745
+
ret = -EINVAL;
746
+
goto out;
747
+
}
748
+
749
+
if (!(current_level & profile_mode_mask) &&
750
+
(level & profile_mode_mask)) {
751
+
/* enter UMD Pstate */
752
+
amdgpu_device_ip_set_powergating_state(adev,
753
+
AMD_IP_BLOCK_TYPE_GFX,
754
+
AMD_PG_STATE_UNGATE);
755
+
amdgpu_device_ip_set_clockgating_state(adev,
756
+
AMD_IP_BLOCK_TYPE_GFX,
757
+
AMD_CG_STATE_UNGATE);
758
+
} else if ((current_level & profile_mode_mask) &&
759
+
!(level & profile_mode_mask)) {
760
+
/* exit UMD Pstate */
761
+
amdgpu_device_ip_set_clockgating_state(adev,
762
+
AMD_IP_BLOCK_TYPE_GFX,
763
+
AMD_CG_STATE_GATE);
764
+
amdgpu_device_ip_set_powergating_state(adev,
765
+
AMD_IP_BLOCK_TYPE_GFX,
766
+
AMD_PG_STATE_GATE);
738
767
}
739
768
740
769
if (pp_funcs->force_performance_level(adev->powerplay.pp_handle,
-50
drivers/gpu/drm/amd/pm/amdgpu_pm.c
-50
drivers/gpu/drm/amd/pm/amdgpu_pm.c
···
299
299
struct drm_device *ddev = dev_get_drvdata(dev);
300
300
struct amdgpu_device *adev = drm_to_adev(ddev);
301
301
enum amd_dpm_forced_level level;
302
-
enum amd_dpm_forced_level current_level;
303
-
uint32_t profile_mode_mask = AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD |
304
-
AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK |
305
-
AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK |
306
-
AMD_DPM_FORCED_LEVEL_PROFILE_PEAK;
307
302
int ret = 0;
308
303
309
304
if (amdgpu_in_reset(adev))
···
334
339
if (ret < 0) {
335
340
pm_runtime_put_autosuspend(ddev->dev);
336
341
return ret;
337
-
}
338
-
339
-
current_level = amdgpu_dpm_get_performance_level(adev);
340
-
if (current_level == level) {
341
-
pm_runtime_mark_last_busy(ddev->dev);
342
-
pm_runtime_put_autosuspend(ddev->dev);
343
-
return count;
344
-
}
345
-
346
-
if (adev->asic_type == CHIP_RAVEN) {
347
-
if (!(adev->apu_flags & AMD_APU_IS_RAVEN2)) {
348
-
if (current_level != AMD_DPM_FORCED_LEVEL_MANUAL && level == AMD_DPM_FORCED_LEVEL_MANUAL)
349
-
amdgpu_gfx_off_ctrl(adev, false);
350
-
else if (current_level == AMD_DPM_FORCED_LEVEL_MANUAL && level != AMD_DPM_FORCED_LEVEL_MANUAL)
351
-
amdgpu_gfx_off_ctrl(adev, true);
352
-
}
353
-
}
354
-
355
-
/* profile_exit setting is valid only when current mode is in profile mode */
356
-
if (!(current_level & profile_mode_mask) &&
357
-
(level == AMD_DPM_FORCED_LEVEL_PROFILE_EXIT)) {
358
-
pr_err("Currently not in any profile mode!\n");
359
-
pm_runtime_mark_last_busy(ddev->dev);
360
-
pm_runtime_put_autosuspend(ddev->dev);
361
-
return -EINVAL;
362
-
}
363
-
364
-
if (!(current_level & profile_mode_mask) &&
365
-
(level & profile_mode_mask)) {
366
-
/* enter UMD Pstate */
367
-
amdgpu_device_ip_set_powergating_state(adev,
368
-
AMD_IP_BLOCK_TYPE_GFX,
369
-
AMD_PG_STATE_UNGATE);
370
-
amdgpu_device_ip_set_clockgating_state(adev,
371
-
AMD_IP_BLOCK_TYPE_GFX,
372
-
AMD_CG_STATE_UNGATE);
373
-
} else if ((current_level & profile_mode_mask) &&
374
-
!(level & profile_mode_mask)) {
375
-
/* exit UMD Pstate */
376
-
amdgpu_device_ip_set_clockgating_state(adev,
377
-
AMD_IP_BLOCK_TYPE_GFX,
378
-
AMD_CG_STATE_GATE);
379
-
amdgpu_device_ip_set_powergating_state(adev,
380
-
AMD_IP_BLOCK_TYPE_GFX,
381
-
AMD_PG_STATE_GATE);
382
342
}
383
343
384
344
if (amdgpu_dpm_force_performance_level(adev, level)) {