Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
KVM: arm64: Deduplicate ASID retrieval code
We currently have three versions of the ASID retrieval code, one
in the S1 walker, and two in the VNCR handling (although the last
two are limited to the EL2&0 translation regime).
Make this code common, and take this opportunity to also simplify
the code a bit while switching over to the TTBRx_EL1_ASID macro.
Reviewed-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Link: https://patch.msgid.link/20260225104718.14209-1-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
+35
-54
+2
arch/arm64/include/asm/kvm_nested.h
+2
arch/arm64/include/asm/kvm_nested.h
···
397
397
int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu);
398
398
void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val);
399
399
400
+
u16 get_asid_by_regime(struct kvm_vcpu *vcpu, enum trans_regime regime);
401
+
400
402
#define vncr_fixmap(c) \
401
403
({ \
402
404
u32 __c = (c); \
+2
-25
arch/arm64/kvm/at.c
+2
-25
arch/arm64/kvm/at.c
···
540
540
wr->pa |= va & GENMASK_ULL(va_bottom - 1, 0);
541
541
542
542
wr->nG = (wi->regime != TR_EL2) && (desc & PTE_NG);
543
-
if (wr->nG) {
544
-
u64 asid_ttbr, tcr;
545
-
546
-
switch (wi->regime) {
547
-
case TR_EL10:
548
-
tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);
549
-
asid_ttbr = ((tcr & TCR_A1) ?
550
-
vcpu_read_sys_reg(vcpu, TTBR1_EL1) :
551
-
vcpu_read_sys_reg(vcpu, TTBR0_EL1));
552
-
break;
553
-
case TR_EL20:
554
-
tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
555
-
asid_ttbr = ((tcr & TCR_A1) ?
556
-
vcpu_read_sys_reg(vcpu, TTBR1_EL2) :
557
-
vcpu_read_sys_reg(vcpu, TTBR0_EL2));
558
-
break;
559
-
default:
560
-
BUG();
561
-
}
562
-
563
-
wr->asid = FIELD_GET(TTBR_ASID_MASK, asid_ttbr);
564
-
if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
565
-
!(tcr & TCR_ASID16))
566
-
wr->asid &= GENMASK(7, 0);
567
-
}
543
+
if (wr->nG)
544
+
wr->asid = get_asid_by_regime(vcpu, wi->regime);
568
545
569
546
return 0;
570
547
+31
-29
arch/arm64/kvm/nested.c
+31
-29
arch/arm64/kvm/nested.c
···
854
854
return kvm_inject_nested_sync(vcpu, esr_el2);
855
855
}
856
856
857
+
u16 get_asid_by_regime(struct kvm_vcpu *vcpu, enum trans_regime regime)
858
+
{
859
+
enum vcpu_sysreg ttbr_elx;
860
+
u64 tcr;
861
+
u16 asid;
862
+
863
+
switch (regime) {
864
+
case TR_EL10:
865
+
tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);
866
+
ttbr_elx = (tcr & TCR_A1) ? TTBR1_EL1 : TTBR0_EL1;
867
+
break;
868
+
case TR_EL20:
869
+
tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
870
+
ttbr_elx = (tcr & TCR_A1) ? TTBR1_EL2 : TTBR0_EL2;
871
+
break;
872
+
default:
873
+
BUG();
874
+
}
875
+
876
+
asid = FIELD_GET(TTBRx_EL1_ASID, vcpu_read_sys_reg(vcpu, ttbr_elx));
877
+
if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
878
+
!(tcr & TCR_ASID16))
879
+
asid &= GENMASK(7, 0);
880
+
881
+
return asid;
882
+
}
883
+
857
884
static void invalidate_vncr(struct vncr_tlb *vt)
858
885
{
859
886
vt->valid = false;
···
1360
1333
if (read_vncr_el2(vcpu) != vt->gva)
1361
1334
return false;
1362
1335
1363
-
if (vt->wr.nG) {
1364
-
u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
1365
-
u64 ttbr = ((tcr & TCR_A1) ?
1366
-
vcpu_read_sys_reg(vcpu, TTBR1_EL2) :
1367
-
vcpu_read_sys_reg(vcpu, TTBR0_EL2));
1368
-
u16 asid;
1369
-
1370
-
asid = FIELD_GET(TTBR_ASID_MASK, ttbr);
1371
-
if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
1372
-
!(tcr & TCR_ASID16))
1373
-
asid &= GENMASK(7, 0);
1374
-
1375
-
return asid == vt->wr.asid;
1376
-
}
1336
+
if (vt->wr.nG)
1337
+
return get_asid_by_regime(vcpu, TR_EL20) == vt->wr.asid;
1377
1338
1378
1339
return true;
1379
1340
}
···
1464
1449
if (read_vncr_el2(vcpu) != vt->gva)
1465
1450
return;
1466
1451
1467
-
if (vt->wr.nG) {
1468
-
u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
1469
-
u64 ttbr = ((tcr & TCR_A1) ?
1470
-
vcpu_read_sys_reg(vcpu, TTBR1_EL2) :
1471
-
vcpu_read_sys_reg(vcpu, TTBR0_EL2));
1472
-
u16 asid;
1473
-
1474
-
asid = FIELD_GET(TTBR_ASID_MASK, ttbr);
1475
-
if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
1476
-
!(tcr & TCR_ASID16))
1477
-
asid &= GENMASK(7, 0);
1478
-
1479
-
if (asid != vt->wr.asid)
1480
-
return;
1481
-
}
1452
+
if (vt->wr.nG && get_asid_by_regime(vcpu, TR_EL20) != vt->wr.asid)
1453
+
return;
1482
1454
1483
1455
vt->cpu = smp_processor_id();
1484
1456