Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A couple of late-arriving fixes before final 4.13:
- A few reverts of DT bindings on Allwinner for their ethernet
driver. Discussion didn't converge, and since bindings are
considered ABI it makes sense to revert instead of having to
support two bindings long-term.
- A fix to enumerate GPIOs properly on Marvell Armada AP806"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: dts: marvell: fix number of GPIOs in Armada AP806 description
arm: dts: sunxi: Revert EMAC changes
arm64: dts: allwinner: Revert EMAC changes
dt-bindings: net: Revert sun8i dwmac binding
+2
-349
-84
Documentation/devicetree/bindings/net/dwmac-sun8i.txt
-84
Documentation/devicetree/bindings/net/dwmac-sun8i.txt
···
1
-
* Allwinner sun8i GMAC ethernet controller
2
-
3
-
This device is a platform glue layer for stmmac.
4
-
Please see stmmac.txt for the other unchanged properties.
5
-
6
-
Required properties:
7
-
- compatible: should be one of the following string:
8
-
"allwinner,sun8i-a83t-emac"
9
-
"allwinner,sun8i-h3-emac"
10
-
"allwinner,sun8i-v3s-emac"
11
-
"allwinner,sun50i-a64-emac"
12
-
- reg: address and length of the register for the device.
13
-
- interrupts: interrupt for the device
14
-
- interrupt-names: should be "macirq"
15
-
- clocks: A phandle to the reference clock for this device
16
-
- clock-names: should be "stmmaceth"
17
-
- resets: A phandle to the reset control for this device
18
-
- reset-names: should be "stmmaceth"
19
-
- phy-mode: See ethernet.txt
20
-
- phy-handle: See ethernet.txt
21
-
- #address-cells: shall be 1
22
-
- #size-cells: shall be 0
23
-
- syscon: A phandle to the syscon of the SoC with one of the following
24
-
compatible string:
25
-
- allwinner,sun8i-h3-system-controller
26
-
- allwinner,sun8i-v3s-system-controller
27
-
- allwinner,sun50i-a64-system-controller
28
-
- allwinner,sun8i-a83t-system-controller
29
-
30
-
Optional properties:
31
-
- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)
32
-
- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)
33
-
Both delay properties need to be a multiple of 100. They control the delay for
34
-
external PHY.
35
-
36
-
Optional properties for the following compatibles:
37
-
- "allwinner,sun8i-h3-emac",
38
-
- "allwinner,sun8i-v3s-emac":
39
-
- allwinner,leds-active-low: EPHY LEDs are active low
40
-
41
-
Required child node of emac:
42
-
- mdio bus node: should be named mdio
43
-
44
-
Required properties of the mdio node:
45
-
- #address-cells: shall be 1
46
-
- #size-cells: shall be 0
47
-
48
-
The device node referenced by "phy" or "phy-handle" should be a child node
49
-
of the mdio node. See phy.txt for the generic PHY bindings.
50
-
51
-
Required properties of the phy node with the following compatibles:
52
-
- "allwinner,sun8i-h3-emac",
53
-
- "allwinner,sun8i-v3s-emac":
54
-
- clocks: a phandle to the reference clock for the EPHY
55
-
- resets: a phandle to the reset control for the EPHY
56
-
57
-
Example:
58
-
59
-
emac: ethernet@1c0b000 {
60
-
compatible = "allwinner,sun8i-h3-emac";
61
-
syscon = <&syscon>;
62
-
reg = <0x01c0b000 0x104>;
63
-
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
64
-
interrupt-names = "macirq";
65
-
resets = <&ccu RST_BUS_EMAC>;
66
-
reset-names = "stmmaceth";
67
-
clocks = <&ccu CLK_BUS_EMAC>;
68
-
clock-names = "stmmaceth";
69
-
#address-cells = <1>;
70
-
#size-cells = <0>;
71
-
72
-
phy-handle = <&int_mii_phy>;
73
-
phy-mode = "mii";
74
-
allwinner,leds-active-low;
75
-
mdio: mdio {
76
-
#address-cells = <1>;
77
-
#size-cells = <0>;
78
-
int_mii_phy: ethernet-phy@1 {
79
-
reg = <1>;
80
-
clocks = <&ccu CLK_BUS_EPHY>;
81
-
resets = <&ccu RST_BUS_EPHY>;
82
-
};
83
-
};
84
-
};
-9
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-9
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
···
56
56
57
57
aliases {
58
58
serial0 = &uart0;
59
-
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
60
-
ethernet0 = &emac;
61
59
ethernet1 = &xr819;
62
60
};
63
61
···
99
101
};
100
102
101
103
&ehci1 {
102
-
status = "okay";
103
-
};
104
-
105
-
&emac {
106
-
phy-handle = <&int_mii_phy>;
107
-
phy-mode = "mii";
108
-
allwinner,leds-active-low;
109
104
status = "okay";
110
105
};
111
106
-19
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
-19
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
···
52
52
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
53
53
54
54
aliases {
55
-
ethernet0 = &emac;
56
55
serial0 = &uart0;
57
56
serial1 = &uart1;
58
57
};
···
114
115
status = "okay";
115
116
};
116
117
117
-
&emac {
118
-
pinctrl-names = "default";
119
-
pinctrl-0 = <&emac_rgmii_pins>;
120
-
phy-supply = <®_gmac_3v3>;
121
-
phy-handle = <&ext_rgmii_phy>;
122
-
phy-mode = "rgmii";
123
-
124
-
allwinner,leds-active-low;
125
-
status = "okay";
126
-
};
127
-
128
118
&ir {
129
119
pinctrl-names = "default";
130
120
pinctrl-0 = <&ir_pins_a>;
131
121
status = "okay";
132
-
};
133
-
134
-
&mdio {
135
-
ext_rgmii_phy: ethernet-phy@1 {
136
-
compatible = "ethernet-phy-ieee802.3-c22";
137
-
reg = <0>;
138
-
};
139
122
};
140
123
141
124
&mmc0 {
-7
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-7
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-8
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
-8
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
···
54
54
aliases {
55
55
serial0 = &uart0;
56
56
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
57
-
ethernet0 = &emac;
58
57
ethernet1 = &rtl8189;
59
58
};
60
59
···
114
115
};
115
116
116
117
&ehci1 {
117
-
status = "okay";
118
-
};
119
-
120
-
&emac {
121
-
phy-handle = <&int_mii_phy>;
122
-
phy-mode = "mii";
123
-
allwinner,leds-active-low;
124
118
status = "okay";
125
119
};
126
120
-8
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
-8
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
···
52
52
compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
53
53
54
54
aliases {
55
-
ethernet0 = &emac;
56
55
serial0 = &uart0;
57
56
};
58
57
···
94
95
};
95
96
96
97
&ehci1 {
97
-
status = "okay";
98
-
};
99
-
100
-
&emac {
101
-
phy-handle = <&int_mii_phy>;
102
-
phy-mode = "mii";
103
-
allwinner,leds-active-low;
104
98
status = "okay";
105
99
};
106
100
-5
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-5
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-8
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
-8
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
···
52
52
compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
53
53
54
54
aliases {
55
-
ethernet0 = &emac;
56
55
serial0 = &uart0;
57
56
};
58
57
···
110
111
};
111
112
112
113
&ehci3 {
113
-
status = "okay";
114
-
};
115
-
116
-
&emac {
117
-
phy-handle = <&int_mii_phy>;
118
-
phy-mode = "mii";
119
-
allwinner,leds-active-low;
120
114
status = "okay";
121
115
};
122
116
-22
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-22
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
···
47
47
model = "Xunlong Orange Pi Plus / Plus 2";
48
48
compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
49
49
50
-
aliases {
51
-
ethernet0 = &emac;
52
-
};
53
-
54
50
reg_gmac_3v3: gmac-3v3 {
55
51
compatible = "regulator-fixed";
56
52
regulator-name = "gmac-3v3";
···
72
76
73
77
&ehci3 {
74
78
status = "okay";
75
-
};
76
-
77
-
&emac {
78
-
pinctrl-names = "default";
79
-
pinctrl-0 = <&emac_rgmii_pins>;
80
-
phy-supply = <®_gmac_3v3>;
81
-
phy-handle = <&ext_rgmii_phy>;
82
-
phy-mode = "rgmii";
83
-
84
-
allwinner,leds-active-low;
85
-
status = "okay";
86
-
};
87
-
88
-
&mdio {
89
-
ext_rgmii_phy: ethernet-phy@1 {
90
-
compatible = "ethernet-phy-ieee802.3-c22";
91
-
reg = <0>;
92
-
};
93
79
};
94
80
95
81
&mmc2 {
-16
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
-16
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
···
61
61
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
62
62
};
63
63
};
64
-
65
-
&emac {
66
-
pinctrl-names = "default";
67
-
pinctrl-0 = <&emac_rgmii_pins>;
68
-
phy-supply = <®_gmac_3v3>;
69
-
phy-handle = <&ext_rgmii_phy>;
70
-
phy-mode = "rgmii";
71
-
status = "okay";
72
-
};
73
-
74
-
&mdio {
75
-
ext_rgmii_phy: ethernet-phy@1 {
76
-
compatible = "ethernet-phy-ieee802.3-c22";
77
-
reg = <1>;
78
-
};
79
-
};
-26
arch/arm/boot/dts/sunxi-h3-h5.dtsi
-26
arch/arm/boot/dts/sunxi-h3-h5.dtsi
···
391
391
clocks = <&osc24M>;
392
392
};
393
393
394
-
emac: ethernet@1c30000 {
395
-
compatible = "allwinner,sun8i-h3-emac";
396
-
syscon = <&syscon>;
397
-
reg = <0x01c30000 0x10000>;
398
-
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
399
-
interrupt-names = "macirq";
400
-
resets = <&ccu RST_BUS_EMAC>;
401
-
reset-names = "stmmaceth";
402
-
clocks = <&ccu CLK_BUS_EMAC>;
403
-
clock-names = "stmmaceth";
404
-
#address-cells = <1>;
405
-
#size-cells = <0>;
406
-
status = "disabled";
407
-
408
-
mdio: mdio {
409
-
#address-cells = <1>;
410
-
#size-cells = <0>;
411
-
int_mii_phy: ethernet-phy@1 {
412
-
compatible = "ethernet-phy-ieee802.3-c22";
413
-
reg = <1>;
414
-
clocks = <&ccu CLK_BUS_EPHY>;
415
-
resets = <&ccu RST_BUS_EPHY>;
416
-
};
417
-
};
418
-
};
419
-
420
394
spi0: spi@01c68000 {
421
395
compatible = "allwinner,sun8i-h3-spi";
422
396
reg = <0x01c68000 0x1000>;
-16
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-16
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
···
51
51
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
52
52
53
53
aliases {
54
-
ethernet0 = &emac;
55
54
serial0 = &uart0;
56
55
serial1 = &uart1;
57
56
};
···
67
68
};
68
69
};
69
70
70
-
&emac {
71
-
pinctrl-names = "default";
72
-
pinctrl-0 = <&rgmii_pins>;
73
-
phy-mode = "rgmii";
74
-
phy-handle = <&ext_rgmii_phy>;
75
-
status = "okay";
76
-
};
77
-
78
71
&i2c1 {
79
72
pinctrl-names = "default";
80
73
pinctrl-0 = <&i2c1_pins>;
···
75
84
76
85
&i2c1_pins {
77
86
bias-pull-up;
78
-
};
79
-
80
-
&mdio {
81
-
ext_rgmii_phy: ethernet-phy@1 {
82
-
compatible = "ethernet-phy-ieee802.3-c22";
83
-
reg = <1>;
84
-
};
85
87
};
86
88
87
89
&mmc0 {
-15
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-15
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
···
48
48
49
49
/* TODO: Camera, touchscreen, etc. */
50
50
};
51
-
52
-
&emac {
53
-
pinctrl-names = "default";
54
-
pinctrl-0 = <&rgmii_pins>;
55
-
phy-mode = "rgmii";
56
-
phy-handle = <&ext_rgmii_phy>;
57
-
status = "okay";
58
-
};
59
-
60
-
&mdio {
61
-
ext_rgmii_phy: ethernet-phy@1 {
62
-
compatible = "ethernet-phy-ieee802.3-c22";
63
-
reg = <1>;
64
-
};
65
-
};
-17
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-17
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
···
51
51
compatible = "pine64,pine64", "allwinner,sun50i-a64";
52
52
53
53
aliases {
54
-
ethernet0 = &emac;
55
54
serial0 = &uart0;
56
55
serial1 = &uart1;
57
56
serial2 = &uart2;
···
78
79
status = "okay";
79
80
};
80
81
81
-
&emac {
82
-
pinctrl-names = "default";
83
-
pinctrl-0 = <&rmii_pins>;
84
-
phy-mode = "rmii";
85
-
phy-handle = <&ext_rmii_phy1>;
86
-
status = "okay";
87
-
88
-
};
89
-
90
82
&i2c1 {
91
83
pinctrl-names = "default";
92
84
pinctrl-0 = <&i2c1_pins>;
···
86
96
87
97
&i2c1_pins {
88
98
bias-pull-up;
89
-
};
90
-
91
-
&mdio {
92
-
ext_rmii_phy1: ethernet-phy@1 {
93
-
compatible = "ethernet-phy-ieee802.3-c22";
94
-
reg = <1>;
95
-
};
96
99
};
97
100
98
101
&mmc0 {
-16
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-16
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
···
53
53
"allwinner,sun50i-a64";
54
54
55
55
aliases {
56
-
ethernet0 = &emac;
57
56
serial0 = &uart0;
58
57
};
59
58
···
74
75
75
76
&ehci1 {
76
77
status = "okay";
77
-
};
78
-
79
-
&emac {
80
-
pinctrl-names = "default";
81
-
pinctrl-0 = <&rgmii_pins>;
82
-
phy-mode = "rgmii";
83
-
phy-handle = <&ext_rgmii_phy>;
84
-
status = "okay";
85
-
};
86
-
87
-
&mdio {
88
-
ext_rgmii_phy: ethernet-phy@1 {
89
-
compatible = "ethernet-phy-ieee802.3-c22";
90
-
reg = <1>;
91
-
};
92
78
};
93
79
94
80
&mmc2 {
-20
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-20
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
···
449
449
#size-cells = <0>;
450
450
};
451
451
452
-
emac: ethernet@1c30000 {
453
-
compatible = "allwinner,sun50i-a64-emac";
454
-
syscon = <&syscon>;
455
-
reg = <0x01c30000 0x10000>;
456
-
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
457
-
interrupt-names = "macirq";
458
-
resets = <&ccu RST_BUS_EMAC>;
459
-
reset-names = "stmmaceth";
460
-
clocks = <&ccu CLK_BUS_EMAC>;
461
-
clock-names = "stmmaceth";
462
-
status = "disabled";
463
-
#address-cells = <1>;
464
-
#size-cells = <0>;
465
-
466
-
mdio: mdio {
467
-
#address-cells = <1>;
468
-
#size-cells = <0>;
469
-
};
470
-
};
471
-
472
452
gic: interrupt-controller@1c81000 {
473
453
compatible = "arm,gic-400";
474
454
reg = <0x01c81000 0x1000>,
-17
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
-17
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
···
50
50
compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
51
51
52
52
aliases {
53
-
ethernet0 = &emac;
54
53
serial0 = &uart0;
55
54
};
56
55
···
106
107
107
108
&ehci3 {
108
109
status = "okay";
109
-
};
110
-
111
-
&emac {
112
-
pinctrl-names = "default";
113
-
pinctrl-0 = <&emac_rgmii_pins>;
114
-
phy-supply = <®_gmac_3v3>;
115
-
phy-handle = <&ext_rgmii_phy>;
116
-
phy-mode = "rgmii";
117
-
status = "okay";
118
-
};
119
-
120
-
&mdio {
121
-
ext_rgmii_phy: ethernet-phy@7 {
122
-
compatible = "ethernet-phy-ieee802.3-c22";
123
-
reg = <7>;
124
-
};
125
110
};
126
111
127
112
&mmc0 {
-17
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-17
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
···
59
59
};
60
60
61
61
aliases {
62
-
ethernet0 = &emac;
63
62
serial0 = &uart0;
64
63
};
65
64
···
136
137
status = "okay";
137
138
};
138
139
139
-
&emac {
140
-
pinctrl-names = "default";
141
-
pinctrl-0 = <&emac_rgmii_pins>;
142
-
phy-supply = <®_gmac_3v3>;
143
-
phy-handle = <&ext_rgmii_phy>;
144
-
phy-mode = "rgmii";
145
-
status = "okay";
146
-
};
147
-
148
140
&ir {
149
141
pinctrl-names = "default";
150
142
pinctrl-0 = <&ir_pins_a>;
151
143
status = "okay";
152
-
};
153
-
154
-
&mdio {
155
-
ext_rgmii_phy: ethernet-phy@1 {
156
-
compatible = "ethernet-phy-ieee802.3-c22";
157
-
reg = <1>;
158
-
};
159
144
};
160
145
161
146
&mmc0 {
-17
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
-17
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
···
54
54
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
55
55
56
56
aliases {
57
-
ethernet0 = &emac;
58
57
serial0 = &uart0;
59
58
};
60
59
···
143
144
status = "okay";
144
145
};
145
146
146
-
&emac {
147
-
pinctrl-names = "default";
148
-
pinctrl-0 = <&emac_rgmii_pins>;
149
-
phy-supply = <®_gmac_3v3>;
150
-
phy-handle = <&ext_rgmii_phy>;
151
-
phy-mode = "rgmii";
152
-
status = "okay";
153
-
};
154
-
155
147
&ir {
156
148
pinctrl-names = "default";
157
149
pinctrl-0 = <&ir_pins_a>;
158
150
status = "okay";
159
-
};
160
-
161
-
&mdio {
162
-
ext_rgmii_phy: ethernet-phy@1 {
163
-
compatible = "ethernet-phy-ieee802.3-c22";
164
-
reg = <1>;
165
-
};
166
151
};
167
152
168
153
&mmc0 {
+2
-2
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+2
-2
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
···
268
268
ap_gpio: gpio {
269
269
compatible = "marvell,armada-8k-gpio";
270
270
offset = <0x1040>;
271
-
ngpios = <19>;
271
+
ngpios = <20>;
272
272
gpio-controller;
273
273
#gpio-cells = <2>;
274
-
gpio-ranges = <&ap_pinctrl 0 0 19>;
274
+
gpio-ranges = <&ap_pinctrl 0 0 20>;
275
275
};
276
276
};
277
277
};