Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915: add .fence_priority_display to parent interface
Add .fence_priority_display() to display parent interface, removing a
display dependency on gem/i915_gem_object.h.
This allows us to remove the xe compat gem/i915_gem_object.h.
v2: Don't mix this with the rps interface (Ville)
v3: Rebase
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/c7782862956e3aa59eaeb6dcf80906c1fc063ae1.1763370931.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+20
-16
+6
drivers/gpu/drm/i915/display/intel_parent.c
+6
drivers/gpu/drm/i915/display/intel_parent.c
···
64
64
{
65
65
return display->parent->has_fenced_regions && display->parent->has_fenced_regions(display->drm);
66
66
}
67
+
68
+
void intel_parent_fence_priority_display(struct intel_display *display, struct dma_fence *fence)
69
+
{
70
+
if (display->parent->fence_priority_display)
71
+
display->parent->fence_priority_display(fence);
72
+
}
+2
drivers/gpu/drm/i915/display/intel_parent.h
+2
drivers/gpu/drm/i915/display/intel_parent.h
+2
-3
drivers/gpu/drm/i915/display/intel_plane.c
+2
-3
drivers/gpu/drm/i915/display/intel_plane.c
···
45
45
#include <drm/drm_panic.h>
46
46
#include <drm/drm_print.h>
47
47
48
-
#include "gem/i915_gem_object.h"
49
48
#include "i9xx_plane_regs.h"
50
49
#include "intel_cdclk.h"
51
50
#include "intel_cursor.h"
···
55
56
#include "intel_fb_pin.h"
56
57
#include "intel_fbdev.h"
57
58
#include "intel_panic.h"
59
+
#include "intel_parent.h"
58
60
#include "intel_plane.h"
59
61
#include "intel_psr.h"
60
62
#include "skl_scaler.h"
···
1180
1180
goto unpin_fb;
1181
1181
1182
1182
if (new_plane_state->uapi.fence) {
1183
-
i915_gem_fence_wait_priority_display(new_plane_state->uapi.fence);
1184
-
1183
+
intel_parent_fence_priority_display(display, new_plane_state->uapi.fence);
1185
1184
intel_display_rps_boost_after_vblank(new_plane_state->hw.crtc,
1186
1185
new_plane_state->uapi.fence);
1187
1186
}
+7
drivers/gpu/drm/i915/i915_driver.c
+7
drivers/gpu/drm/i915/i915_driver.c
···
750
750
return intel_gt_support_legacy_fencing(to_gt(to_i915(drm)));
751
751
}
752
752
753
+
static void fence_priority_display(struct dma_fence *fence)
754
+
{
755
+
if (dma_fence_is_i915(fence))
756
+
i915_gem_fence_wait_priority_display(fence);
757
+
}
758
+
753
759
static const struct intel_display_parent_interface parent = {
754
760
.rpm = &i915_display_rpm_interface,
755
761
.irq = &i915_display_irq_interface,
756
762
.rps = &i915_display_rps_interface,
757
763
.vgpu_active = vgpu_active,
758
764
.has_fenced_regions = has_fenced_regions,
765
+
.fence_priority_display = fence_priority_display,
759
766
};
760
767
761
768
const struct intel_display_parent_interface *i915_driver_parent_interface(void)
-13
drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
-13
drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h
···
1
-
/* SPDX-License-Identifier: MIT */
2
-
/* Copyright © 2025 Intel Corporation */
3
-
4
-
#ifndef __I915_GEM_OBJECT_H__
5
-
#define __I915_GEM_OBJECT_H__
6
-
7
-
struct dma_fence;
8
-
9
-
static inline void i915_gem_fence_wait_priority_display(struct dma_fence *fence)
10
-
{
11
-
}
12
-
13
-
#endif
+3
include/drm/intel/display_parent_interface.h
+3
include/drm/intel/display_parent_interface.h