Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: rkvdec: Move h264 functions to common file
This is a preparation commit to add support for new variants of the
decoder.
The functions will later be shared with vdpu381 (rk3588) and vdpu383
(rk3576).
Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock 5B
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
authored by
Detlev Casanova
and committed by
Hans Verkuil
560438ed
cf29115a
+348
-304
+1
drivers/media/platform/rockchip/rkvdec/Makefile
+1
drivers/media/platform/rockchip/rkvdec/Makefile
+258
drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.c
+258
drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* Rockchip video decoder h264 common functions
4
+
*
5
+
* Copyright (C) 2025 Collabora, Ltd.
6
+
* Detlev Casanova <detlev.casanova@collabora.com>
7
+
*
8
+
* Copyright (C) 2019 Collabora, Ltd.
9
+
* Boris Brezillon <boris.brezillon@collabora.com>
10
+
*
11
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* Copyright (C) 2016 Rockchip Electronics Co., Ltd.
12
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* Jeffy Chen <jeffy.chen@rock-chips.com>
13
+
*/
14
+
15
+
#include <linux/v4l2-common.h>
16
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#include <media/v4l2-h264.h>
17
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#include <media/v4l2-mem2mem.h>
18
+
19
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#include "rkvdec.h"
20
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#include "rkvdec-h264-common.h"
21
+
22
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#define RKVDEC_NUM_REFLIST 3
23
+
24
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static void set_dpb_info(struct rkvdec_rps_entry *entries,
25
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u8 reflist,
26
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u8 refnum,
27
+
u8 info,
28
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bool bottom)
29
+
{
30
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struct rkvdec_rps_entry *entry = &entries[(reflist * 4) + refnum / 8];
31
+
u8 idx = refnum % 8;
32
+
33
+
switch (idx) {
34
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case 0:
35
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entry->dpb_info0 = info;
36
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entry->bottom_flag0 = bottom;
37
+
break;
38
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case 1:
39
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entry->dpb_info1 = info;
40
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entry->bottom_flag1 = bottom;
41
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break;
42
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case 2:
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entry->dpb_info2 = info;
44
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entry->bottom_flag2 = bottom;
45
+
break;
46
+
case 3:
47
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entry->dpb_info3 = info;
48
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entry->bottom_flag3 = bottom;
49
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break;
50
+
case 4:
51
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entry->dpb_info4 = info;
52
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entry->bottom_flag4 = bottom;
53
+
break;
54
+
case 5:
55
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entry->dpb_info5 = info;
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entry->bottom_flag5 = bottom;
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break;
58
+
case 6:
59
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entry->dpb_info6 = info;
60
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entry->bottom_flag6 = bottom;
61
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break;
62
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case 7:
63
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entry->dpb_info7 = info;
64
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entry->bottom_flag7 = bottom;
65
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break;
66
+
}
67
+
}
68
+
69
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void lookup_ref_buf_idx(struct rkvdec_ctx *ctx,
70
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struct rkvdec_h264_run *run)
71
+
{
72
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const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params;
73
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u32 i;
74
+
75
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for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) {
76
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struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
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const struct v4l2_h264_dpb_entry *dpb = run->decode_params->dpb;
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struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q;
79
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struct vb2_buffer *buf = NULL;
80
+
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if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE) {
82
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buf = vb2_find_buffer(cap_q, dpb[i].reference_ts);
83
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if (!buf)
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pr_debug("No buffer for reference_ts %llu",
85
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dpb[i].reference_ts);
86
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}
87
+
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run->ref_buf[i] = buf;
89
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}
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}
91
+
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void assemble_hw_rps(struct v4l2_h264_reflist_builder *builder,
93
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struct rkvdec_h264_run *run,
94
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struct rkvdec_h264_reflists *reflists,
95
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struct rkvdec_rps *hw_rps)
96
+
{
97
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const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params;
98
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const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb;
99
+
100
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u32 i, j;
101
+
102
+
memset(hw_rps, 0, sizeof(*hw_rps));
103
+
104
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/*
105
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* Assign an invalid pic_num if DPB entry at that position is inactive.
106
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* If we assign 0 in that position hardware will treat that as a real
107
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* reference picture with pic_num 0, triggering output picture
108
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* corruption.
109
+
*/
110
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for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) {
111
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if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE))
112
+
continue;
113
+
114
+
hw_rps->frame_num[i] = builder->refs[i].frame_num;
115
+
}
116
+
117
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for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
118
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for (i = 0; i < builder->num_valid; i++) {
119
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struct v4l2_h264_reference *ref;
120
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bool dpb_valid;
121
+
bool bottom;
122
+
123
+
switch (j) {
124
+
case 0:
125
+
ref = &reflists->p[i];
126
+
break;
127
+
case 1:
128
+
ref = &reflists->b0[i];
129
+
break;
130
+
case 2:
131
+
ref = &reflists->b1[i];
132
+
break;
133
+
}
134
+
135
+
if (WARN_ON(ref->index >= ARRAY_SIZE(dec_params->dpb)))
136
+
continue;
137
+
138
+
dpb_valid = !!(run->ref_buf[ref->index]);
139
+
bottom = ref->fields == V4L2_H264_BOTTOM_FIELD_REF;
140
+
141
+
set_dpb_info(hw_rps->entries, j, i, ref->index | (dpb_valid << 4), bottom);
142
+
}
143
+
}
144
+
}
145
+
146
+
void assemble_hw_scaling_list(struct rkvdec_h264_run *run,
147
+
struct rkvdec_h264_scaling_list *scaling_list)
148
+
{
149
+
const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix;
150
+
const struct v4l2_ctrl_h264_pps *pps = run->pps;
151
+
152
+
if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT))
153
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return;
154
+
155
+
BUILD_BUG_ON(sizeof(scaling_list->scaling_list_4x4) !=
156
+
sizeof(scaling->scaling_list_4x4));
157
+
BUILD_BUG_ON(sizeof(scaling_list->scaling_list_8x8) !=
158
+
sizeof(scaling->scaling_list_8x8));
159
+
160
+
memcpy(scaling_list->scaling_list_4x4,
161
+
scaling->scaling_list_4x4,
162
+
sizeof(scaling->scaling_list_4x4));
163
+
164
+
memcpy(scaling_list->scaling_list_8x8,
165
+
scaling->scaling_list_8x8,
166
+
sizeof(scaling->scaling_list_8x8));
167
+
}
168
+
169
+
#define RKVDEC_H264_MAX_DEPTH_IN_BYTES 2
170
+
171
+
int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx,
172
+
struct v4l2_format *f)
173
+
{
174
+
struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp;
175
+
176
+
fmt->num_planes = 1;
177
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if (!fmt->plane_fmt[0].sizeimage)
178
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fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height *
179
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RKVDEC_H264_MAX_DEPTH_IN_BYTES;
180
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return 0;
181
+
}
182
+
183
+
enum rkvdec_image_fmt rkvdec_h264_get_image_fmt(struct rkvdec_ctx *ctx,
184
+
struct v4l2_ctrl *ctrl)
185
+
{
186
+
const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
187
+
188
+
if (ctrl->id != V4L2_CID_STATELESS_H264_SPS)
189
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return RKVDEC_IMG_FMT_ANY;
190
+
191
+
if (sps->bit_depth_luma_minus8 == 0) {
192
+
if (sps->chroma_format_idc == 2)
193
+
return RKVDEC_IMG_FMT_422_8BIT;
194
+
else
195
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return RKVDEC_IMG_FMT_420_8BIT;
196
+
} else if (sps->bit_depth_luma_minus8 == 2) {
197
+
if (sps->chroma_format_idc == 2)
198
+
return RKVDEC_IMG_FMT_422_10BIT;
199
+
else
200
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return RKVDEC_IMG_FMT_420_10BIT;
201
+
}
202
+
203
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return RKVDEC_IMG_FMT_ANY;
204
+
}
205
+
206
+
int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
207
+
const struct v4l2_ctrl_h264_sps *sps)
208
+
{
209
+
unsigned int width, height;
210
+
211
+
if (sps->chroma_format_idc > 2)
212
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/* Only 4:0:0, 4:2:0 and 4:2:2 are supported */
213
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return -EINVAL;
214
+
if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
215
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/* Luma and chroma bit depth mismatch */
216
+
return -EINVAL;
217
+
if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
218
+
/* Only 8-bit and 10-bit is supported */
219
+
return -EINVAL;
220
+
221
+
width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
222
+
height = (sps->pic_height_in_map_units_minus1 + 1) * 16;
223
+
224
+
/*
225
+
* When frame_mbs_only_flag is not set, this is field height,
226
+
* which is half the final height (see (7-18) in the
227
+
* specification)
228
+
*/
229
+
if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY))
230
+
height *= 2;
231
+
232
+
if (width > ctx->coded_fmt.fmt.pix_mp.width ||
233
+
height > ctx->coded_fmt.fmt.pix_mp.height)
234
+
return -EINVAL;
235
+
236
+
return 0;
237
+
}
238
+
239
+
void rkvdec_h264_run_preamble(struct rkvdec_ctx *ctx,
240
+
struct rkvdec_h264_run *run)
241
+
{
242
+
struct v4l2_ctrl *ctrl;
243
+
244
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
245
+
V4L2_CID_STATELESS_H264_DECODE_PARAMS);
246
+
run->decode_params = ctrl ? ctrl->p_cur.p : NULL;
247
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
248
+
V4L2_CID_STATELESS_H264_SPS);
249
+
run->sps = ctrl ? ctrl->p_cur.p : NULL;
250
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
251
+
V4L2_CID_STATELESS_H264_PPS);
252
+
run->pps = ctrl ? ctrl->p_cur.p : NULL;
253
+
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
254
+
V4L2_CID_STATELESS_H264_SCALING_MATRIX);
255
+
run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL;
256
+
257
+
rkvdec_run_preamble(ctx, &run->base);
258
+
}
+85
drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h
+85
drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Rockchip video decoder h264 common functions
4
+
*
5
+
* Copyright (C) 2025 Collabora, Ltd.
6
+
* Detlev Casanova <detlev.casanova@collabora.com>
7
+
*
8
+
* Copyright (C) 2019 Collabora, Ltd.
9
+
* Boris Brezillon <boris.brezillon@collabora.com>
10
+
*
11
+
* Copyright (C) 2016 Rockchip Electronics Co., Ltd.
12
+
* Jeffy Chen <jeffy.chen@rock-chips.com>
13
+
*/
14
+
15
+
#include <media/v4l2-h264.h>
16
+
#include <media/v4l2-mem2mem.h>
17
+
18
+
#include "rkvdec.h"
19
+
20
+
struct rkvdec_h264_scaling_list {
21
+
u8 scaling_list_4x4[6][16];
22
+
u8 scaling_list_8x8[6][64];
23
+
u8 padding[128];
24
+
};
25
+
26
+
struct rkvdec_h264_reflists {
27
+
struct v4l2_h264_reference p[V4L2_H264_REF_LIST_LEN];
28
+
struct v4l2_h264_reference b0[V4L2_H264_REF_LIST_LEN];
29
+
struct v4l2_h264_reference b1[V4L2_H264_REF_LIST_LEN];
30
+
};
31
+
32
+
struct rkvdec_h264_run {
33
+
struct rkvdec_run base;
34
+
const struct v4l2_ctrl_h264_decode_params *decode_params;
35
+
const struct v4l2_ctrl_h264_sps *sps;
36
+
const struct v4l2_ctrl_h264_pps *pps;
37
+
const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix;
38
+
struct vb2_buffer *ref_buf[V4L2_H264_NUM_DPB_ENTRIES];
39
+
};
40
+
41
+
struct rkvdec_rps_entry {
42
+
u32 dpb_info0: 5;
43
+
u32 bottom_flag0: 1;
44
+
u32 view_index_off0: 1;
45
+
u32 dpb_info1: 5;
46
+
u32 bottom_flag1: 1;
47
+
u32 view_index_off1: 1;
48
+
u32 dpb_info2: 5;
49
+
u32 bottom_flag2: 1;
50
+
u32 view_index_off2: 1;
51
+
u32 dpb_info3: 5;
52
+
u32 bottom_flag3: 1;
53
+
u32 view_index_off3: 1;
54
+
u32 dpb_info4: 5;
55
+
u32 bottom_flag4: 1;
56
+
u32 view_index_off4: 1;
57
+
u32 dpb_info5: 5;
58
+
u32 bottom_flag5: 1;
59
+
u32 view_index_off5: 1;
60
+
u32 dpb_info6: 5;
61
+
u32 bottom_flag6: 1;
62
+
u32 view_index_off6: 1;
63
+
u32 dpb_info7: 5;
64
+
u32 bottom_flag7: 1;
65
+
u32 view_index_off7: 1;
66
+
} __packed;
67
+
68
+
struct rkvdec_rps {
69
+
u16 frame_num[16];
70
+
u32 reserved0;
71
+
struct rkvdec_rps_entry entries[12];
72
+
u32 reserved1[66];
73
+
} __packed;
74
+
75
+
void lookup_ref_buf_idx(struct rkvdec_ctx *ctx, struct rkvdec_h264_run *run);
76
+
void assemble_hw_rps(struct v4l2_h264_reflist_builder *builder,
77
+
struct rkvdec_h264_run *run,
78
+
struct rkvdec_h264_reflists *reflists,
79
+
struct rkvdec_rps *hw_rps);
80
+
void assemble_hw_scaling_list(struct rkvdec_h264_run *run,
81
+
struct rkvdec_h264_scaling_list *scaling_list);
82
+
int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f);
83
+
enum rkvdec_image_fmt rkvdec_h264_get_image_fmt(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl);
84
+
int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx, const struct v4l2_ctrl_h264_sps *sps);
85
+
void rkvdec_h264_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_h264_run *run);
+4
-304
drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c
+4
-304
drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c
···
15
15
#include "rkvdec.h"
16
16
#include "rkvdec-regs.h"
17
17
#include "rkvdec-cabac.h"
18
+
#include "rkvdec-h264-common.h"
18
19
19
20
/* Size with u32 units. */
20
21
#define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128)
21
22
#define RKV_ERROR_INFO_SIZE (256 * 144 * 4)
22
23
23
-
#define RKVDEC_NUM_REFLIST 3
24
-
25
-
struct rkvdec_h264_scaling_list {
26
-
u8 scaling_list_4x4[6][16];
27
-
u8 scaling_list_8x8[6][64];
28
-
u8 padding[128];
29
-
};
30
-
31
24
struct rkvdec_sps_pps_packet {
32
25
u32 info[8];
33
26
};
34
-
35
-
struct rkvdec_rps_entry {
36
-
u32 dpb_info0: 5;
37
-
u32 bottom_flag0: 1;
38
-
u32 view_index_off0: 1;
39
-
u32 dpb_info1: 5;
40
-
u32 bottom_flag1: 1;
41
-
u32 view_index_off1: 1;
42
-
u32 dpb_info2: 5;
43
-
u32 bottom_flag2: 1;
44
-
u32 view_index_off2: 1;
45
-
u32 dpb_info3: 5;
46
-
u32 bottom_flag3: 1;
47
-
u32 view_index_off3: 1;
48
-
u32 dpb_info4: 5;
49
-
u32 bottom_flag4: 1;
50
-
u32 view_index_off4: 1;
51
-
u32 dpb_info5: 5;
52
-
u32 bottom_flag5: 1;
53
-
u32 view_index_off5: 1;
54
-
u32 dpb_info6: 5;
55
-
u32 bottom_flag6: 1;
56
-
u32 view_index_off6: 1;
57
-
u32 dpb_info7: 5;
58
-
u32 bottom_flag7: 1;
59
-
u32 view_index_off7: 1;
60
-
} __packed;
61
-
62
-
struct rkvdec_rps {
63
-
u16 frame_num[16];
64
-
u32 reserved0;
65
-
struct rkvdec_rps_entry entries[12];
66
-
u32 reserved1[66];
67
-
} __packed;
68
27
69
28
struct rkvdec_ps_field {
70
29
u16 offset;
···
76
117
#define SCALING_LIST_ADDRESS PS_FIELD(184, 32)
77
118
#define IS_LONG_TERM(i) PS_FIELD(216 + (i), 1)
78
119
79
-
#define DPB_OFFS(i, j) (288 + ((j) * 32 * 7) + ((i) * 7))
80
-
#define DPB_INFO(i, j) PS_FIELD(DPB_OFFS(i, j), 5)
81
-
#define BOTTOM_FLAG(i, j) PS_FIELD(DPB_OFFS(i, j) + 5, 1)
82
-
#define VIEW_INDEX_OFF(i, j) PS_FIELD(DPB_OFFS(i, j) + 6, 1)
83
-
84
120
/* Data structure describing auxiliary buffer format. */
85
121
struct rkvdec_h264_priv_tbl {
86
122
s8 cabac_table[4][464][2];
···
83
129
struct rkvdec_rps rps;
84
130
struct rkvdec_sps_pps_packet param_set[256];
85
131
u8 err_info[RKV_ERROR_INFO_SIZE];
86
-
};
87
-
88
-
struct rkvdec_h264_reflists {
89
-
struct v4l2_h264_reference p[V4L2_H264_REF_LIST_LEN];
90
-
struct v4l2_h264_reference b0[V4L2_H264_REF_LIST_LEN];
91
-
struct v4l2_h264_reference b1[V4L2_H264_REF_LIST_LEN];
92
-
};
93
-
94
-
struct rkvdec_h264_run {
95
-
struct rkvdec_run base;
96
-
const struct v4l2_ctrl_h264_decode_params *decode_params;
97
-
const struct v4l2_ctrl_h264_sps *sps;
98
-
const struct v4l2_ctrl_h264_pps *pps;
99
-
const struct v4l2_ctrl_h264_scaling_matrix *scaling_matrix;
100
-
struct vb2_buffer *ref_buf[V4L2_H264_NUM_DPB_ENTRIES];
101
132
};
102
133
103
134
struct rkvdec_h264_ctx {
···
206
267
207
268
WRITE_PPS(is_longterm, IS_LONG_TERM(i));
208
269
}
209
-
}
210
-
211
-
static void lookup_ref_buf_idx(struct rkvdec_ctx *ctx,
212
-
struct rkvdec_h264_run *run)
213
-
{
214
-
const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params;
215
-
u32 i;
216
-
217
-
for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) {
218
-
struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx;
219
-
const struct v4l2_h264_dpb_entry *dpb = run->decode_params->dpb;
220
-
struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q;
221
-
struct vb2_buffer *buf = NULL;
222
-
223
-
if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE) {
224
-
buf = vb2_find_buffer(cap_q, dpb[i].reference_ts);
225
-
if (!buf)
226
-
pr_debug("No buffer for reference_ts %llu",
227
-
dpb[i].reference_ts);
228
-
}
229
-
230
-
run->ref_buf[i] = buf;
231
-
}
232
-
}
233
-
234
-
static void set_dpb_info(struct rkvdec_rps_entry *entries,
235
-
u8 reflist,
236
-
u8 refnum,
237
-
u8 info,
238
-
bool bottom)
239
-
{
240
-
struct rkvdec_rps_entry *entry = &entries[(reflist * 4) + refnum / 8];
241
-
u8 idx = refnum % 8;
242
-
243
-
switch (idx) {
244
-
case 0:
245
-
entry->dpb_info0 = info;
246
-
entry->bottom_flag0 = bottom;
247
-
break;
248
-
case 1:
249
-
entry->dpb_info1 = info;
250
-
entry->bottom_flag1 = bottom;
251
-
break;
252
-
case 2:
253
-
entry->dpb_info2 = info;
254
-
entry->bottom_flag2 = bottom;
255
-
break;
256
-
case 3:
257
-
entry->dpb_info3 = info;
258
-
entry->bottom_flag3 = bottom;
259
-
break;
260
-
case 4:
261
-
entry->dpb_info4 = info;
262
-
entry->bottom_flag4 = bottom;
263
-
break;
264
-
case 5:
265
-
entry->dpb_info5 = info;
266
-
entry->bottom_flag5 = bottom;
267
-
break;
268
-
case 6:
269
-
entry->dpb_info6 = info;
270
-
entry->bottom_flag6 = bottom;
271
-
break;
272
-
case 7:
273
-
entry->dpb_info7 = info;
274
-
entry->bottom_flag7 = bottom;
275
-
break;
276
-
}
277
-
}
278
-
279
-
static void assemble_hw_rps(struct rkvdec_ctx *ctx,
280
-
struct v4l2_h264_reflist_builder *builder,
281
-
struct rkvdec_h264_run *run)
282
-
{
283
-
const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params;
284
-
const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb;
285
-
struct rkvdec_h264_ctx *h264_ctx = ctx->priv;
286
-
struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu;
287
-
288
-
struct rkvdec_rps *hw_rps = &priv_tbl->rps;
289
-
u32 i, j;
290
-
291
-
memset(hw_rps, 0, sizeof(*hw_rps));
292
-
293
-
/*
294
-
* Assign an invalid pic_num if DPB entry at that position is inactive.
295
-
* If we assign 0 in that position hardware will treat that as a real
296
-
* reference picture with pic_num 0, triggering output picture
297
-
* corruption.
298
-
*/
299
-
for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) {
300
-
if (!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE))
301
-
continue;
302
-
303
-
hw_rps->frame_num[i] = builder->refs[i].frame_num;
304
-
}
305
-
306
-
for (j = 0; j < RKVDEC_NUM_REFLIST; j++) {
307
-
for (i = 0; i < builder->num_valid; i++) {
308
-
struct v4l2_h264_reference *ref;
309
-
bool dpb_valid;
310
-
bool bottom;
311
-
312
-
switch (j) {
313
-
case 0:
314
-
ref = &h264_ctx->reflists.p[i];
315
-
break;
316
-
case 1:
317
-
ref = &h264_ctx->reflists.b0[i];
318
-
break;
319
-
case 2:
320
-
ref = &h264_ctx->reflists.b1[i];
321
-
break;
322
-
}
323
-
324
-
if (WARN_ON(ref->index >= ARRAY_SIZE(dec_params->dpb)))
325
-
continue;
326
-
327
-
dpb_valid = run->ref_buf[ref->index] != NULL;
328
-
bottom = ref->fields == V4L2_H264_BOTTOM_FIELD_REF;
329
-
330
-
set_dpb_info(hw_rps->entries, j, i, ref->index | (dpb_valid << 4), bottom);
331
-
}
332
-
}
333
-
}
334
-
335
-
static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx,
336
-
struct rkvdec_h264_run *run)
337
-
{
338
-
const struct v4l2_ctrl_h264_scaling_matrix *scaling = run->scaling_matrix;
339
-
const struct v4l2_ctrl_h264_pps *pps = run->pps;
340
-
struct rkvdec_h264_ctx *h264_ctx = ctx->priv;
341
-
struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu;
342
-
343
-
if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT))
344
-
return;
345
-
346
-
BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_4x4) !=
347
-
sizeof(scaling->scaling_list_4x4));
348
-
BUILD_BUG_ON(sizeof(tbl->scaling_list.scaling_list_8x8) !=
349
-
sizeof(scaling->scaling_list_8x8));
350
-
351
-
memcpy(tbl->scaling_list.scaling_list_4x4,
352
-
scaling->scaling_list_4x4,
353
-
sizeof(scaling->scaling_list_4x4));
354
-
355
-
memcpy(tbl->scaling_list.scaling_list_8x8,
356
-
scaling->scaling_list_8x8,
357
-
sizeof(scaling->scaling_list_8x8));
358
270
}
359
271
360
272
/*
···
358
568
MIN(sizeof(*regs), sizeof(u32) * rkvdec->variant->num_regs));
359
569
}
360
570
361
-
#define RKVDEC_H264_MAX_DEPTH_IN_BYTES 2
362
-
363
-
static int rkvdec_h264_adjust_fmt(struct rkvdec_ctx *ctx,
364
-
struct v4l2_format *f)
365
-
{
366
-
struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp;
367
-
368
-
fmt->num_planes = 1;
369
-
if (!fmt->plane_fmt[0].sizeimage)
370
-
fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height *
371
-
RKVDEC_H264_MAX_DEPTH_IN_BYTES;
372
-
return 0;
373
-
}
374
-
375
-
static enum rkvdec_image_fmt rkvdec_h264_get_image_fmt(struct rkvdec_ctx *ctx,
376
-
struct v4l2_ctrl *ctrl)
377
-
{
378
-
const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
379
-
380
-
if (ctrl->id != V4L2_CID_STATELESS_H264_SPS)
381
-
return RKVDEC_IMG_FMT_ANY;
382
-
383
-
if (sps->bit_depth_luma_minus8 == 0) {
384
-
if (sps->chroma_format_idc == 2)
385
-
return RKVDEC_IMG_FMT_422_8BIT;
386
-
else
387
-
return RKVDEC_IMG_FMT_420_8BIT;
388
-
} else if (sps->bit_depth_luma_minus8 == 2) {
389
-
if (sps->chroma_format_idc == 2)
390
-
return RKVDEC_IMG_FMT_422_10BIT;
391
-
else
392
-
return RKVDEC_IMG_FMT_420_10BIT;
393
-
}
394
-
395
-
return RKVDEC_IMG_FMT_ANY;
396
-
}
397
-
398
-
static int rkvdec_h264_validate_sps(struct rkvdec_ctx *ctx,
399
-
const struct v4l2_ctrl_h264_sps *sps)
400
-
{
401
-
unsigned int width, height;
402
-
403
-
if (sps->chroma_format_idc > 2)
404
-
/* Only 4:0:0, 4:2:0 and 4:2:2 are supported */
405
-
return -EINVAL;
406
-
if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8)
407
-
/* Luma and chroma bit depth mismatch */
408
-
return -EINVAL;
409
-
if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
410
-
/* Only 8-bit and 10-bit is supported */
411
-
return -EINVAL;
412
-
413
-
width = (sps->pic_width_in_mbs_minus1 + 1) * 16;
414
-
height = (sps->pic_height_in_map_units_minus1 + 1) * 16;
415
-
416
-
/*
417
-
* When frame_mbs_only_flag is not set, this is field height,
418
-
* which is half the final height (see (7-18) in the
419
-
* specification)
420
-
*/
421
-
if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY))
422
-
height *= 2;
423
-
424
-
if (width > ctx->coded_fmt.fmt.pix_mp.width ||
425
-
height > ctx->coded_fmt.fmt.pix_mp.height)
426
-
return -EINVAL;
427
-
428
-
return 0;
429
-
}
430
-
431
571
static int rkvdec_h264_start(struct rkvdec_ctx *ctx)
432
572
{
433
573
struct rkvdec_dev *rkvdec = ctx->dev;
···
409
689
kfree(h264_ctx);
410
690
}
411
691
412
-
static void rkvdec_h264_run_preamble(struct rkvdec_ctx *ctx,
413
-
struct rkvdec_h264_run *run)
414
-
{
415
-
struct v4l2_ctrl *ctrl;
416
-
417
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
418
-
V4L2_CID_STATELESS_H264_DECODE_PARAMS);
419
-
run->decode_params = ctrl ? ctrl->p_cur.p : NULL;
420
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
421
-
V4L2_CID_STATELESS_H264_SPS);
422
-
run->sps = ctrl ? ctrl->p_cur.p : NULL;
423
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
424
-
V4L2_CID_STATELESS_H264_PPS);
425
-
run->pps = ctrl ? ctrl->p_cur.p : NULL;
426
-
ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl,
427
-
V4L2_CID_STATELESS_H264_SCALING_MATRIX);
428
-
run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL;
429
-
430
-
rkvdec_run_preamble(ctx, &run->base);
431
-
}
432
-
433
692
static int rkvdec_h264_run(struct rkvdec_ctx *ctx)
434
693
{
435
694
struct v4l2_h264_reflist_builder reflist_builder;
436
695
struct rkvdec_dev *rkvdec = ctx->dev;
437
696
struct rkvdec_h264_ctx *h264_ctx = ctx->priv;
438
697
struct rkvdec_h264_run run;
698
+
struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu;
439
699
440
700
rkvdec_h264_run_preamble(ctx, &run);
441
701
···
426
726
v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0,
427
727
h264_ctx->reflists.b1);
428
728
429
-
assemble_hw_scaling_list(ctx, &run);
729
+
assemble_hw_scaling_list(&run, &tbl->scaling_list);
430
730
assemble_hw_pps(ctx, &run);
431
731
lookup_ref_buf_idx(ctx, &run);
432
-
assemble_hw_rps(ctx, &reflist_builder, &run);
732
+
assemble_hw_rps(&reflist_builder, &run, &h264_ctx->reflists, &tbl->rps);
433
733
config_registers(ctx, &run);
434
734
435
735
rkvdec_run_postamble(ctx, &run.base);