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Merge tag 'mtd/fixes-for-5.0-rc6' of git://git.infradead.org/linux-mtd

Pull mtd fixes from Boris Brezillon:

- Fix a problem with the imx28 ECC engine

- Remove a debug trace introduced in 2b6f0090a333 ("mtd: Check
add_mtd_device() ret code")

- Make sure partitions of size 0 can be registered

- Fix kernel-doc warning in the rawnand core

- Fix the error path of spinand_init() (missing manufacturer cleanup in
a few places)

- Address a problem with the SPI NAND PROGRAM LOAD operation which does
not work as expected on some parts.

* tag 'mtd/fixes-for-5.0-rc6' of git://git.infradead.org/linux-mtd:
mtd: rawnand: gpmi: fix MX28 bus master lockup problem
mtd: Make sure mtd->erasesize is valid even if the partition is of size 0
mtd: Remove a debug trace in mtdpart.c
mtd: rawnand: fix kernel-doc warnings
mtd: spinand: Fix the error/cleanup path in spinand_init()
mtd: spinand: Handle the case where PROGRAM LOAD does not reset the cache

+34 -33
+4 -1
drivers/mtd/mtdpart.c
··· 480 480 /* let's register it anyway to preserve ordering */ 481 481 slave->offset = 0; 482 482 slave->mtd.size = 0; 483 + 484 + /* Initialize ->erasesize to make add_mtd_device() happy. */ 485 + slave->mtd.erasesize = parent->erasesize; 486 + 483 487 printk(KERN_ERR"mtd: partition \"%s\" is out of reach -- disabled\n", 484 488 part->name); 485 489 goto out_register; ··· 636 632 mutex_unlock(&mtd_partitions_mutex); 637 633 638 634 free_partition(new); 639 - pr_info("%s:%i\n", __func__, __LINE__); 640 635 641 636 return ret; 642 637 }
+6 -7
drivers/mtd/nand/raw/gpmi-nand/gpmi-lib.c
··· 155 155 156 156 /* 157 157 * Reset BCH here, too. We got failures otherwise :( 158 - * See later BCH reset for explanation of MX23 handling 158 + * See later BCH reset for explanation of MX23 and MX28 handling 159 159 */ 160 - ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this)); 160 + ret = gpmi_reset_block(r->bch_regs, 161 + GPMI_IS_MX23(this) || GPMI_IS_MX28(this)); 161 162 if (ret) 162 163 goto err_out; 163 164 ··· 264 263 /* 265 264 * Due to erratum #2847 of the MX23, the BCH cannot be soft reset on this 266 265 * chip, otherwise it will lock up. So we skip resetting BCH on the MX23. 267 - * On the other hand, the MX28 needs the reset, because one case has been 268 - * seen where the BCH produced ECC errors constantly after 10000 269 - * consecutive reboots. The latter case has not been seen on the MX23 270 - * yet, still we don't know if it could happen there as well. 266 + * and MX28. 271 267 */ 272 - ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MX23(this)); 268 + ret = gpmi_reset_block(r->bch_regs, 269 + GPMI_IS_MX23(this) || GPMI_IS_MX28(this)); 273 270 if (ret) 274 271 goto err_out; 275 272
+1
drivers/mtd/nand/raw/nand_base.c
··· 410 410 411 411 /** 412 412 * nand_fill_oob - [INTERN] Transfer client buffer to oob 413 + * @chip: NAND chip object 413 414 * @oob: oob data buffer 414 415 * @len: oob data write length 415 416 * @ops: oob ops structure
+1 -1
drivers/mtd/nand/raw/nand_bbt.c
··· 158 158 159 159 /** 160 160 * read_bbt - [GENERIC] Read the bad block table starting from page 161 - * @chip: NAND chip object 161 + * @this: NAND chip object 162 162 * @buf: temporary buffer 163 163 * @page: the starting page 164 164 * @num: the number of bbt descriptors to read
+22 -24
drivers/mtd/nand/spi/core.c
··· 304 304 struct nand_device *nand = spinand_to_nand(spinand); 305 305 struct mtd_info *mtd = nanddev_to_mtd(nand); 306 306 struct nand_page_io_req adjreq = *req; 307 - unsigned int nbytes = 0; 308 - void *buf = NULL; 307 + void *buf = spinand->databuf; 308 + unsigned int nbytes; 309 309 u16 column = 0; 310 310 int ret; 311 311 312 - memset(spinand->databuf, 0xff, 313 - nanddev_page_size(nand) + 314 - nanddev_per_page_oobsize(nand)); 312 + /* 313 + * Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset 314 + * the cache content to 0xFF (depends on vendor implementation), so we 315 + * must fill the page cache entirely even if we only want to program 316 + * the data portion of the page, otherwise we might corrupt the BBM or 317 + * user data previously programmed in OOB area. 318 + */ 319 + nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand); 320 + memset(spinand->databuf, 0xff, nbytes); 321 + adjreq.dataoffs = 0; 322 + adjreq.datalen = nanddev_page_size(nand); 323 + adjreq.databuf.out = spinand->databuf; 324 + adjreq.ooblen = nanddev_per_page_oobsize(nand); 325 + adjreq.ooboffs = 0; 326 + adjreq.oobbuf.out = spinand->oobbuf; 315 327 316 - if (req->datalen) { 328 + if (req->datalen) 317 329 memcpy(spinand->databuf + req->dataoffs, req->databuf.out, 318 330 req->datalen); 319 - adjreq.dataoffs = 0; 320 - adjreq.datalen = nanddev_page_size(nand); 321 - adjreq.databuf.out = spinand->databuf; 322 - nbytes = adjreq.datalen; 323 - buf = spinand->databuf; 324 - } 325 331 326 332 if (req->ooblen) { 327 333 if (req->mode == MTD_OPS_AUTO_OOB) ··· 338 332 else 339 333 memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out, 340 334 req->ooblen); 341 - 342 - adjreq.ooblen = nanddev_per_page_oobsize(nand); 343 - adjreq.ooboffs = 0; 344 - nbytes += nanddev_per_page_oobsize(nand); 345 - if (!buf) { 346 - buf = spinand->oobbuf; 347 - column = nanddev_page_size(nand); 348 - } 349 335 } 350 336 351 337 spinand_cache_op_adjust_colum(spinand, &adjreq, &column); ··· 368 370 369 371 /* 370 372 * We need to use the RANDOM LOAD CACHE operation if there's 371 - * more than one iteration, because the LOAD operation resets 372 - * the cache to 0xff. 373 + * more than one iteration, because the LOAD operation might 374 + * reset the cache to 0xff. 373 375 */ 374 376 if (nbytes) { 375 377 column = op.addr.val; ··· 1016 1018 for (i = 0; i < nand->memorg.ntargets; i++) { 1017 1019 ret = spinand_select_target(spinand, i); 1018 1020 if (ret) 1019 - goto err_free_bufs; 1021 + goto err_manuf_cleanup; 1020 1022 1021 1023 ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED); 1022 1024 if (ret) 1023 - goto err_free_bufs; 1025 + goto err_manuf_cleanup; 1024 1026 } 1025 1027 1026 1028 ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);