tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Jakub Kicinski 56495a24 657bc1d1

+3975 -2050
+4 -1
.mailmap
··· 82 82 Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com> 83 83 Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@mips.com> 84 84 <dev.kurt@vandijck-laurijssen.be> <kurt.van.dijck@eia.be> 85 - Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> 85 + Dmitry Baryshkov <dbaryshkov@gmail.com> 86 + Dmitry Baryshkov <dbaryshkov@gmail.com> <[dbaryshkov@gmail.com]> 87 + Dmitry Baryshkov <dbaryshkov@gmail.com> <dmitry_baryshkov@mentor.com> 88 + Dmitry Baryshkov <dbaryshkov@gmail.com> <dmitry_eremin@mentor.com> 86 89 Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com> 87 90 Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com> 88 91 Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>
+36 -26
CREDITS
··· 98 98 E: andersen@codepoet.org 99 99 W: https://www.codepoet.org/ 100 100 P: 1024D/30D39057 1BC4 2742 E885 E4DE 9301 0C82 5F9B 643E 30D3 9057 101 - D: Maintainer of ide-cd and Uniform CD-ROM driver, 101 + D: Maintainer of ide-cd and Uniform CD-ROM driver, 102 102 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update. 103 103 S: 352 North 525 East 104 104 S: Springville, Utah 84663 ··· 263 263 E: pbd@op.net 264 264 D: Driver for WaveFront soundcards (Turtle Beach Maui, Tropez, Tropez+) 265 265 D: Various bugfixes and changes to sound drivers 266 - S: USA 266 + S: USA 267 267 268 268 N: Carlos Henrique Bauer 269 269 E: chbauer@acm.org ··· 849 849 D: AX25-HOWTO, HAM-HOWTO, IPX-HOWTO, NET-2-HOWTO 850 850 D: ax25-utils maintainer. 851 851 852 + N: Kamil Debski 853 + E: kamil@wypas.org 854 + D: Samsung S5P 2D graphics acceleration and Multi Format Codec drivers 855 + D: Samsung USB2 phy drivers 856 + D: PWM fan driver 857 + 852 858 N: Helge Deller 853 859 E: deller@gmx.de 854 860 W: http://www.parisc-linux.org/ ··· 1205 1199 E: dfrasnel@alphalinux.org 1206 1200 W: http://www.alphalinux.org/ 1207 1201 P: 1024/3EF87611 B9 F1 44 50 D3 E8 C2 80 DA E5 55 AA 56 7C 42 DA 1208 - D: DEC Alpha hacker 1202 + D: DEC Alpha hacker 1209 1203 D: Miscellaneous bug squisher 1210 1204 1211 1205 N: Jim Freeman ··· 1305 1299 S: New South Wales, 2121 1306 1300 S: Australia 1307 1301 1308 - N: Carlos E. Gorges 1302 + N: Carlos E. Gorges 1309 1303 E: carlos@techlinux.com.br 1310 1304 D: fix smp support on cmpci driver 1311 1305 P: 2048G/EA3C4B19 FF31 33A6 0362 4915 B7EB E541 17D0 0379 EA3C 4B19 ··· 1346 1340 E: wgreathouse@myfavoritei.com 1347 1341 D: Current Belkin USB Serial Adapter F5U103 hacker 1348 1342 D: Kernel hacker, embedded systems 1349 - S: 7802 Fitzwater Road 1343 + S: 7802 Fitzwater Road 1350 1344 S: Brecksville, OH 44141-1334 1351 1345 S: USA 1352 1346 ··· 1387 1381 E: grant@torque.net 1388 1382 W: http://www.torque.net/linux-pp.html 1389 1383 D: original author of ppa driver for parallel port ZIP drive 1390 - D: original architect of the parallel-port sharing scheme 1384 + D: original architect of the parallel-port sharing scheme 1391 1385 D: PARIDE subsystem: drivers for parallel port IDE & ATAPI devices 1392 1386 S: 44 St. Joseph Street, Suite 506 1393 1387 S: Toronto, Ontario, M4Y 2W4 ··· 1529 1523 E: benh@kernel.crashing.org 1530 1524 D: Various parts of PPC/PPC64 & PowerMac 1531 1525 S: 312/107 Canberra Avenue 1532 - S: Griffith, ACT 2603 1526 + S: Griffith, ACT 2603 1533 1527 S: Australia 1534 1528 1535 1529 N: Andreas Herrmann ··· 1831 1825 N: Bernhard Kaindl 1832 1826 E: bkaindl@netway.at 1833 1827 E: edv@bartelt.via.at 1834 - D: Author of a menu based configuration tool, kmenu, which 1828 + D: Author of a menu based configuration tool, kmenu, which 1835 1829 D: is the predecessor of 'make menuconfig' and 'make xconfig'. 1836 1830 D: digiboard driver update(modularisation work and 2.1.x upd) 1837 1831 S: Tallak 95 ··· 2022 2016 D: IP transparent proxy support 2023 2017 S: X/OS Experts in Open Systems BV 2024 2018 S: Kruislaan 419 2025 - S: 1098 VA Amsterdam 2019 + S: 1098 VA Amsterdam 2026 2020 S: The Netherlands 2027 2021 2028 2022 N: Goran Koruga ··· 2094 2088 2095 2089 N: Andrzej M. Krzysztofowicz 2096 2090 E: ankry@mif.pg.gda.pl 2097 - D: Some 8-bit XT disk driver and devfs hacking 2091 + D: Some 8-bit XT disk driver and devfs hacking 2098 2092 D: Aladdin 1533/1543(C) chipset IDE 2099 2093 D: PIIX chipset IDE 2100 2094 S: ul. Matemblewska 1B/10 ··· 2469 2463 D: Logical Volume Manager 2470 2464 S: Bartningstr. 12 2471 2465 S: 64289 Darmstadt 2472 - S: Germany 2466 + S: Germany 2473 2467 2474 2468 N: Mark W. McClelland 2475 2469 E: mmcclell@bigfoot.com ··· 2544 2538 P: 1024/04B6E8F5 6C 77 33 CA CC D6 22 03 AB AB 15 A3 AE AD 39 7D 2545 2539 D: Kernel hacker. PostgreSQL hacker. Software watchdog daemon. 2546 2540 D: Maintainer of several Debian packages 2547 - S: Th.-Heuss-Str. 61 2541 + S: Th.-Heuss-Str. 61 2548 2542 S: D-41812 Erkelenz 2549 2543 S: Germany 2550 2544 ··· 2782 2776 W: http://www.i-Connect.Net/~mike/ 2783 2777 D: Developer and maintainer of the EATA-DMA SCSI driver 2784 2778 D: Co-developer EATA-PIO SCSI driver 2785 - D: /proc/scsi and assorted other snippets 2779 + D: /proc/scsi and assorted other snippets 2786 2780 S: Zum Schiersteiner Grund 2 2787 2781 S: 55127 Mainz 2788 2782 S: Germany ··· 2848 2842 2849 2843 N: Venkatesh Pallipadi (Venki) 2850 2844 D: x86/HPET 2845 + 2846 + N: Kyungmin Park 2847 + E: kyungmin.park@samsung.com 2848 + D: Samsung S5Pv210 and Exynos4210 mobile platforms 2851 2849 2852 2850 N: David Parsons 2853 2851 E: orc@pell.chi.il.us ··· 3020 3010 S: Chandler, Arizona 85249 3021 3011 S: USA 3022 3012 3023 - N: Frederic Potter 3013 + N: Frederic Potter 3024 3014 E: fpotter@cirpack.com 3025 3015 D: Some PCI kernel support 3026 3016 ··· 3453 3443 S: 76131 Karlsruhe 3454 3444 S: Germany 3455 3445 3456 - N: James Simmons 3446 + N: James Simmons 3457 3447 E: jsimmons@infradead.org 3458 - E: jsimmons@users.sf.net 3448 + E: jsimmons@users.sf.net 3459 3449 D: Frame buffer device maintainer 3460 3450 D: input layer development 3461 3451 D: tty/console layer 3462 - D: various mipsel devices 3463 - S: 115 Carmel Avenue 3452 + D: various mipsel devices 3453 + S: 115 Carmel Avenue 3464 3454 S: El Cerrito CA 94530 3465 - S: USA 3455 + S: USA 3466 3456 3467 3457 N: Jaspreet Singh 3468 3458 E: jaspreet@sangoma.com 3469 3459 W: www.sangoma.com 3470 - D: WANPIPE drivers & API Support for Sangoma S508/FT1 cards 3460 + D: WANPIPE drivers & API Support for Sangoma S508/FT1 cards 3471 3461 S: Sangoma Technologies Inc., 3472 3462 S: 1001 Denison Street 3473 3463 S: Suite 101 ··· 3491 3481 E: csmall@triode.apana.org.au 3492 3482 E: vk2xlz@gonzo.vk2xlz.ampr.org (packet radio) 3493 3483 D: Gracilis PackeTwin device driver 3494 - D: RSPF daemon 3484 + D: RSPF daemon 3495 3485 S: 10 Stockalls Place 3496 3486 S: Minto, NSW, 2566 3497 3487 S: Australia ··· 3701 3691 E: tsusheng@scf.usc.edu 3702 3692 D: IGMP(Internet Group Management Protocol) version 2 3703 3693 S: 2F 14 ALY 31 LN 166 SEC 1 SHIH-PEI RD 3704 - S: Taipei 3694 + S: Taipei 3705 3695 S: Taiwan 112 3706 3696 S: Republic of China 3707 3697 S: 24335 Delta Drive ··· 3862 3852 D: patches for ghostscript, worked on color 'ls', etc. 3863 3853 S: 301 15th Street S. 3864 3854 S: Moorhead, Minnesota 56560 3865 - S: USA 3855 + S: USA 3866 3856 3867 3857 N: Jos Vos 3868 3858 E: jos@xos.nl ··· 3870 3860 D: Various IP firewall updates, ipfwadm 3871 3861 S: X/OS Experts in Open Systems BV 3872 3862 S: Kruislaan 419 3873 - S: 1098 VA Amsterdam 3863 + S: 1098 VA Amsterdam 3874 3864 S: The Netherlands 3875 3865 3876 3866 N: Jeroen Vreeken ··· 4108 4098 N: Victor Yodaiken 4109 4099 E: yodaiken@fsmlabs.com 4110 4100 D: RTLinux (RealTime Linux) 4111 - S: POB 1822 4101 + S: POB 1822 4112 4102 S: Socorro NM, 87801 4113 4103 S: USA 4114 4104 ··· 4206 4196 S: France 4207 4197 4208 4198 # Don't add your name here, unless you really _are_ after Marc 4209 - # alphabetically. Leonard used to be very proud of being the 4199 + # alphabetically. Leonard used to be very proud of being the 4210 4200 # last entry, and he'll get positively pissed if he can't even 4211 4201 # be second-to-last. (and this file really _is_ supposed to be 4212 4202 # in alphabetic order)
+7
Documentation/admin-guide/kernel-parameters.txt
··· 2858 2858 mds=off [X86] 2859 2859 tsx_async_abort=off [X86] 2860 2860 kvm.nx_huge_pages=off [X86] 2861 + no_entry_flush [PPC] 2862 + no_uaccess_flush [PPC] 2861 2863 2862 2864 Exceptions: 2863 2865 This does not have any effect on ··· 3188 3186 3189 3187 noefi Disable EFI runtime services support. 3190 3188 3189 + no_entry_flush [PPC] Don't flush the L1-D cache when entering the kernel. 3190 + 3191 3191 noexec [IA-64] 3192 3192 3193 3193 noexec [X86] ··· 3238 3234 3239 3235 nospec_store_bypass_disable 3240 3236 [HW] Disable all mitigations for the Speculative Store Bypass vulnerability 3237 + 3238 + no_uaccess_flush 3239 + [PPC] Don't flush the L1-D cache after accessing user data. 3241 3240 3242 3241 noxsave [BUGS=X86] Disables x86 extended register state save 3243 3242 and restore using xsave. The kernel will fallback to
+1 -1
Documentation/dev-tools/kunit/faq.rst
··· 90 90 re-run kunit_tool. 91 91 5. Try to run ``make ARCH=um defconfig`` before running ``kunit.py run``. This 92 92 may help clean up any residual config items which could be causing problems. 93 - 6. Finally, try running KUnit outside UML. KUnit and KUnit tests can run be 93 + 6. Finally, try running KUnit outside UML. KUnit and KUnit tests can be 94 94 built into any kernel, or can be built as a module and loaded at runtime. 95 95 Doing so should allow you to determine if UML is causing the issue you're 96 96 seeing. When tests are built-in, they will execute when the kernel boots, and
+9 -9
Documentation/dev-tools/kunit/style.rst
··· 175 175 176 176 .. code-block:: none 177 177 178 - config FOO_KUNIT_TEST 179 - tristate "KUnit test for foo" if !KUNIT_ALL_TESTS 180 - depends on KUNIT 181 - default KUNIT_ALL_TESTS 182 - help 183 - This builds unit tests for foo. 178 + config FOO_KUNIT_TEST 179 + tristate "KUnit test for foo" if !KUNIT_ALL_TESTS 180 + depends on KUNIT 181 + default KUNIT_ALL_TESTS 182 + help 183 + This builds unit tests for foo. 184 184 185 - For more information on KUnit and unit tests in general, please refer 186 - to the KUnit documentation in Documentation/dev-tools/kunit 185 + For more information on KUnit and unit tests in general, please refer 186 + to the KUnit documentation in Documentation/dev-tools/kunit/. 187 187 188 - If unsure, say N 188 + If unsure, say N. 189 189 190 190 191 191 Test File and Module Names
+5 -5
Documentation/dev-tools/kunit/usage.rst
··· 92 92 the second parameter, in this case, is what the value is expected to be; the 93 93 last value is what the value actually is. If ``add`` passes all of these 94 94 expectations, the test case, ``add_test_basic`` will pass; if any one of these 95 - expectations fail, the test case will fail. 95 + expectations fails, the test case will fail. 96 96 97 97 It is important to understand that a test case *fails* when any expectation is 98 98 violated; however, the test will continue running, potentially trying other ··· 202 202 kunit_test_suite(example_test_suite); 203 203 204 204 In the above example the test suite, ``example_test_suite``, would run the test 205 - cases ``example_test_foo``, ``example_test_bar``, and ``example_test_baz``, 205 + cases ``example_test_foo``, ``example_test_bar``, and ``example_test_baz``; 206 206 each would have ``example_test_init`` called immediately before it and would 207 207 have ``example_test_exit`` called immediately after it. 208 208 ``kunit_test_suite(example_test_suite)`` registers the test suite with the ··· 229 229 such that the definition of that function can be changed without affecting the 230 230 rest of the code base. In the kernel this primarily comes from two constructs, 231 231 classes, structs that contain function pointers that are provided by the 232 - implementer, and architecture specific functions which have definitions selected 232 + implementer, and architecture-specific functions which have definitions selected 233 233 at compile time. 234 234 235 235 Classes ··· 459 459 By default KUnit uses UML as a way to provide dependencies for code under test. 460 460 Under most circumstances KUnit's usage of UML should be treated as an 461 461 implementation detail of how KUnit works under the hood. Nevertheless, there 462 - are instances where being able to run architecture specific code or test 462 + are instances where being able to run architecture-specific code or test 463 463 against real hardware is desirable. For these reasons KUnit supports running on 464 464 other architectures. 465 465 ··· 599 599 hardware state in between test cases; if this is not possible, you may only be 600 600 able to run one test case per invocation. 601 601 602 - .. TODO(brendanhiggins@google.com): Add an actual example of an architecture 602 + .. TODO(brendanhiggins@google.com): Add an actual example of an architecture- 603 603 dependent KUnit test. 604 604 605 605 KUnit debugfs representation
+1 -1
Documentation/devicetree/bindings/clock/imx5-clock.yaml
··· 57 57 }; 58 58 59 59 can@53fc8000 { 60 - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 60 + compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; 61 61 reg = <0x53fc8000 0x4000>; 62 62 interrupts = <82>; 63 63 clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, <&clks IMX5_CLK_CAN1_SERIAL_GATE>;
+11 -7
Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
··· 20 20 - fsl,imx8qm-flexcan 21 21 - fsl,imx8mp-flexcan 22 22 - fsl,imx6q-flexcan 23 - - fsl,imx53-flexcan 24 - - fsl,imx35-flexcan 25 23 - fsl,imx28-flexcan 26 24 - fsl,imx25-flexcan 27 25 - fsl,p1010-flexcan 28 26 - fsl,vf610-flexcan 29 27 - fsl,ls1021ar2-flexcan 30 28 - fsl,lx2160ar1-flexcan 29 + - items: 30 + - enum: 31 + - fsl,imx53-flexcan 32 + - fsl,imx35-flexcan 33 + - const: fsl,imx25-flexcan 31 34 - items: 32 35 - enum: 33 36 - fsl,imx7d-flexcan ··· 84 81 req_bit is the bit offset of CAN stop request. 85 82 $ref: /schemas/types.yaml#/definitions/phandle-array 86 83 items: 87 - - description: The 'gpr' is the phandle to general purpose register node. 88 - - description: The 'req_gpr' is the gpr register offset of CAN stop request. 89 - maximum: 0xff 90 - - description: The 'req_bit' is the bit offset of CAN stop request. 91 - maximum: 0x1f 84 + items: 85 + - description: The 'gpr' is the phandle to general purpose register node. 86 + - description: The 'req_gpr' is the gpr register offset of CAN stop request. 87 + maximum: 0xff 88 + - description: The 'req_bit' is the bit offset of CAN stop request. 89 + maximum: 0x1f 92 90 93 91 fsl,clk-source: 94 92 description: |
+6 -3
Documentation/xtensa/mmu.rst
··· 82 82 +------------------+ 83 83 | VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB 84 84 +------------------+ VMALLOC_END 85 - | Cache aliasing | TLBTEMP_BASE_1 0xc7ff0000 DCACHE_WAY_SIZE 85 + +------------------+ 86 + | Cache aliasing | TLBTEMP_BASE_1 0xc8000000 DCACHE_WAY_SIZE 86 87 | remap area 1 | 87 88 +------------------+ 88 89 | Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE ··· 125 124 +------------------+ 126 125 | VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB 127 126 +------------------+ VMALLOC_END 128 - | Cache aliasing | TLBTEMP_BASE_1 0xa7ff0000 DCACHE_WAY_SIZE 127 + +------------------+ 128 + | Cache aliasing | TLBTEMP_BASE_1 0xa8000000 DCACHE_WAY_SIZE 129 129 | remap area 1 | 130 130 +------------------+ 131 131 | Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE ··· 169 167 +------------------+ 170 168 | VMALLOC area | VMALLOC_START 0x90000000 128MB - 64KB 171 169 +------------------+ VMALLOC_END 172 - | Cache aliasing | TLBTEMP_BASE_1 0x97ff0000 DCACHE_WAY_SIZE 170 + +------------------+ 171 + | Cache aliasing | TLBTEMP_BASE_1 0x98000000 DCACHE_WAY_SIZE 173 172 | remap area 1 | 174 173 +------------------+ 175 174 | Cache aliasing | TLBTEMP_BASE_2 DCACHE_WAY_SIZE
+23 -31
MAINTAINERS
··· 1546 1546 ARM/Allwinner sunXi SoC support 1547 1547 M: Maxime Ripard <mripard@kernel.org> 1548 1548 M: Chen-Yu Tsai <wens@csie.org> 1549 + R: Jernej Skrabec <jernej.skrabec@siol.net> 1549 1550 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1550 1551 S: Maintained 1551 1552 T: git git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git ··· 2375 2374 F: sound/soc/rockchip/ 2376 2375 N: rockchip 2377 2376 2378 - ARM/SAMSUNG EXYNOS ARM ARCHITECTURES 2377 + ARM/SAMSUNG S3C, S5P AND EXYNOS ARM ARCHITECTURES 2379 2378 M: Krzysztof Kozlowski <krzk@kernel.org> 2380 2379 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2381 2380 L: linux-samsung-soc@vger.kernel.org ··· 2404 2403 N: s3c64xx 2405 2404 N: s5pv210 2406 2405 2407 - ARM/SAMSUNG MOBILE MACHINE SUPPORT 2408 - M: Kyungmin Park <kyungmin.park@samsung.com> 2409 - L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2410 - S: Maintained 2411 - F: arch/arm/mach-s5pv210/ 2412 - 2413 2406 ARM/SAMSUNG S5P SERIES 2D GRAPHICS ACCELERATION (G2D) SUPPORT 2414 - M: Kyungmin Park <kyungmin.park@samsung.com> 2415 - M: Kamil Debski <kamil@wypas.org> 2416 2407 M: Andrzej Hajda <a.hajda@samsung.com> 2417 2408 L: linux-arm-kernel@lists.infradead.org 2418 2409 L: linux-media@vger.kernel.org ··· 2429 2436 F: drivers/media/platform/s5p-jpeg/ 2430 2437 2431 2438 ARM/SAMSUNG S5P SERIES Multi Format Codec (MFC) SUPPORT 2432 - M: Kyungmin Park <kyungmin.park@samsung.com> 2433 - M: Kamil Debski <kamil@wypas.org> 2434 - M: Jeongtae Park <jtp.park@samsung.com> 2435 2439 M: Andrzej Hajda <a.hajda@samsung.com> 2436 2440 L: linux-arm-kernel@lists.infradead.org 2437 2441 L: linux-media@vger.kernel.org ··· 3233 3243 BPF (Safe dynamic programs and tools) 3234 3244 M: Alexei Starovoitov <ast@kernel.org> 3235 3245 M: Daniel Borkmann <daniel@iogearbox.net> 3246 + M: Andrii Nakryiko <andrii@kernel.org> 3236 3247 R: Martin KaFai Lau <kafai@fb.com> 3237 3248 R: Song Liu <songliubraving@fb.com> 3238 3249 R: Yonghong Song <yhs@fb.com> 3239 - R: Andrii Nakryiko <andrii@kernel.org> 3240 3250 R: John Fastabend <john.fastabend@gmail.com> 3241 3251 R: KP Singh <kpsingh@chromium.org> 3242 3252 L: netdev@vger.kernel.org ··· 4700 4710 F: drivers/media/dvb-frontends/cxd2820r* 4701 4711 4702 4712 CXGB3 ETHERNET DRIVER (CXGB3) 4703 - M: Vishal Kulkarni <vishal@chelsio.com> 4713 + M: Raju Rangoju <rajur@chelsio.com> 4704 4714 L: netdev@vger.kernel.org 4705 4715 S: Supported 4706 4716 W: http://www.chelsio.com ··· 4732 4742 F: drivers/net/ethernet/chelsio/inline_crypto/ 4733 4743 4734 4744 CXGB4 ETHERNET DRIVER (CXGB4) 4735 - M: Vishal Kulkarni <vishal@chelsio.com> 4745 + M: Raju Rangoju <rajur@chelsio.com> 4736 4746 L: netdev@vger.kernel.org 4737 4747 S: Supported 4738 4748 W: http://www.chelsio.com ··· 4754 4764 F: include/uapi/rdma/cxgb4-abi.h 4755 4765 4756 4766 CXGB4VF ETHERNET DRIVER (CXGB4VF) 4757 - M: Vishal Kulkarni <vishal@gmail.com> 4767 + M: Raju Rangoju <rajur@chelsio.com> 4758 4768 L: netdev@vger.kernel.org 4759 4769 S: Supported 4760 4770 W: http://www.chelsio.com ··· 9826 9836 F: arch/mips/lantiq 9827 9837 F: drivers/soc/lantiq 9828 9838 9829 - LAPB module 9830 - L: linux-x25@vger.kernel.org 9831 - S: Orphan 9832 - F: Documentation/networking/lapb-module.rst 9833 - F: include/*/lapb.h 9834 - F: net/lapb/ 9835 - 9836 9839 LASI 53c700 driver for PARISC 9837 9840 M: "James E.J. Bottomley" <James.Bottomley@HansenPartnership.com> 9838 9841 L: linux-scsi@vger.kernel.org ··· 14188 14205 F: include/trace/events/pwc.h 14189 14206 14190 14207 PWM FAN DRIVER 14191 - M: Kamil Debski <kamil@wypas.org> 14192 14208 M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> 14193 14209 L: linux-hwmon@vger.kernel.org 14194 14210 S: Supported ··· 15401 15419 F: drivers/nfc/s3fwrn5 15402 15420 15403 15421 SAMSUNG S5C73M3 CAMERA DRIVER 15404 - M: Kyungmin Park <kyungmin.park@samsung.com> 15405 15422 M: Andrzej Hajda <a.hajda@samsung.com> 15406 15423 L: linux-media@vger.kernel.org 15407 15424 S: Supported 15408 15425 F: drivers/media/i2c/s5c73m3/* 15409 15426 15410 15427 SAMSUNG S5K5BAF CAMERA DRIVER 15411 - M: Kyungmin Park <kyungmin.park@samsung.com> 15412 15428 M: Andrzej Hajda <a.hajda@samsung.com> 15413 15429 L: linux-media@vger.kernel.org 15414 15430 S: Supported ··· 15424 15444 F: drivers/crypto/s5p-sss.c 15425 15445 15426 15446 SAMSUNG S5P/EXYNOS4 SOC SERIES CAMERA SUBSYSTEM DRIVERS 15427 - M: Kyungmin Park <kyungmin.park@samsung.com> 15428 15447 M: Sylwester Nawrocki <s.nawrocki@samsung.com> 15429 15448 L: linux-media@vger.kernel.org 15430 15449 S: Supported ··· 15471 15492 F: drivers/thermal/samsung/ 15472 15493 15473 15494 SAMSUNG USB2 PHY DRIVER 15474 - M: Kamil Debski <kamil@wypas.org> 15475 15495 M: Sylwester Nawrocki <s.nawrocki@samsung.com> 15476 15496 L: linux-kernel@vger.kernel.org 15477 15497 S: Supported ··· 18145 18167 S: Supported 18146 18168 F: drivers/usb/class/usblp.c 18147 18169 18170 + USB RAW GADGET DRIVER 18171 + R: Andrey Konovalov <andreyknvl@gmail.com> 18172 + L: linux-usb@vger.kernel.org 18173 + S: Maintained 18174 + F: Documentation/usb/raw-gadget.rst 18175 + F: drivers/usb/gadget/legacy/raw_gadget.c 18176 + F: include/uapi/linux/usb/raw_gadget.h 18177 + 18148 18178 USB QMI WWAN NETWORK DRIVER 18149 18179 M: Bjørn Mork <bjorn@mork.no> 18150 18180 L: netdev@vger.kernel.org ··· 18966 18980 S: Maintained 18967 18981 N: axp[128] 18968 18982 18969 - X.25 NETWORK LAYER 18970 - M: Andrew Hendry <andrew.hendry@gmail.com> 18983 + X.25 STACK 18984 + M: Martin Schiller <ms@dev.tdt.de> 18971 18985 L: linux-x25@vger.kernel.org 18972 - S: Odd Fixes 18986 + S: Maintained 18987 + F: Documentation/networking/lapb-module.rst 18973 18988 F: Documentation/networking/x25* 18989 + F: drivers/net/wan/hdlc_x25.c 18990 + F: drivers/net/wan/lapbether.c 18991 + F: include/*/lapb.h 18974 18992 F: include/net/x25* 18993 + F: include/uapi/linux/x25.h 18994 + F: net/lapb/ 18975 18995 F: net/x25/ 18976 18996 18977 18997 X86 ARCHITECTURE (32-BIT AND 64-BIT)
+1 -1
Makefile
··· 2 2 VERSION = 5 3 3 PATCHLEVEL = 10 4 4 SUBLEVEL = 0 5 - EXTRAVERSION = -rc3 5 + EXTRAVERSION = -rc4 6 6 NAME = Kleptomaniac Octopus 7 7 8 8 # *DOCUMENTATION*
-1
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
··· 122 122 }; 123 123 124 124 &clock { 125 - clocks = <&clock CLK_XUSBXTI>; 126 125 assigned-clocks = <&clock CLK_FOUT_EPLL>; 127 126 assigned-clock-rates = <45158401>; 128 127 };
+1 -1
arch/arm/boot/dts/imx50-evk.dts
··· 59 59 MX50_PAD_CSPI_MISO__CSPI_MISO 0x00 60 60 MX50_PAD_CSPI_MOSI__CSPI_MOSI 0x00 61 61 MX50_PAD_CSPI_SS0__GPIO4_11 0xc4 62 - MX50_PAD_ECSPI1_MOSI__CSPI_SS1 0xf4 62 + MX50_PAD_ECSPI1_MOSI__GPIO4_13 0x84 63 63 >; 64 64 }; 65 65
+2 -2
arch/arm/boot/dts/imx6q-prti6q.dts
··· 213 213 #size-cells = <0>; 214 214 215 215 /* Microchip KSZ9031RNX PHY */ 216 - rgmii_phy: ethernet-phy@4 { 217 - reg = <4>; 216 + rgmii_phy: ethernet-phy@0 { 217 + reg = <0>; 218 218 interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; 219 219 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 220 220 reset-assert-us = <10000>;
+1 -1
arch/arm/boot/dts/imx6qdl-udoo.dtsi
··· 98 98 &fec { 99 99 pinctrl-names = "default"; 100 100 pinctrl-0 = <&pinctrl_enet>; 101 - phy-mode = "rgmii"; 101 + phy-mode = "rgmii-id"; 102 102 status = "okay"; 103 103 }; 104 104
+11 -8
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi
··· 46 46 linux,code = <KEY_A>; 47 47 gpios = <&gpiof 3 GPIO_ACTIVE_LOW>; 48 48 }; 49 + 50 + /* 51 + * The EXTi IRQ line 0 is shared with PMIC, 52 + * so mark this as polled GPIO key. 53 + */ 54 + button-2 { 55 + label = "TA3-GPIO-C"; 56 + linux,code = <KEY_C>; 57 + gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; 58 + }; 49 59 }; 50 60 51 61 gpio-keys { ··· 66 56 label = "TA2-GPIO-B"; 67 57 linux,code = <KEY_B>; 68 58 gpios = <&gpiod 6 GPIO_ACTIVE_LOW>; 69 - wakeup-source; 70 - }; 71 - 72 - button-2 { 73 - label = "TA3-GPIO-C"; 74 - linux,code = <KEY_C>; 75 - gpios = <&gpioi 11 GPIO_ACTIVE_LOW>; 76 59 wakeup-source; 77 60 }; 78 61 ··· 82 79 83 80 led-0 { 84 81 label = "green:led5"; 85 - gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>; 82 + gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; 86 83 default-state = "off"; 87 84 }; 88 85
+2
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
··· 68 68 gpio = <&gpiog 3 GPIO_ACTIVE_LOW>; 69 69 regulator-always-on; 70 70 regulator-boot-on; 71 + vin-supply = <&vdd>; 71 72 }; 72 73 }; 73 74 ··· 203 202 204 203 vdda: ldo1 { 205 204 regulator-name = "vdda"; 205 + regulator-always-on; 206 206 regulator-min-microvolt = <2900000>; 207 207 regulator-max-microvolt = <2900000>; 208 208 interrupts = <IT_CURLIM_LDO1 0>;
+4
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
··· 21 21 }; 22 22 }; 23 23 24 + &dts { 25 + status = "okay"; 26 + }; 27 + 24 28 &i2c4 { 25 29 pinctrl-names = "default"; 26 30 pinctrl-0 = <&i2c4_pins_a>;
+1 -1
arch/arm/boot/dts/sun6i-a31-hummingbird.dts
··· 154 154 pinctrl-names = "default"; 155 155 pinctrl-0 = <&gmac_rgmii_pins>; 156 156 phy-handle = <&phy1>; 157 - phy-mode = "rgmii"; 157 + phy-mode = "rgmii-id"; 158 158 status = "okay"; 159 159 }; 160 160
+1 -1
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
··· 130 130 pinctrl-names = "default"; 131 131 pinctrl-0 = <&gmac_rgmii_pins>; 132 132 phy-handle = <&phy1>; 133 - phy-mode = "rgmii"; 133 + phy-mode = "rgmii-id"; 134 134 phy-supply = <&reg_gmac_3v3>; 135 135 status = "okay"; 136 136 };
+1 -1
arch/arm/boot/dts/sun7i-a20-cubietruck.dts
··· 151 151 pinctrl-names = "default"; 152 152 pinctrl-0 = <&gmac_rgmii_pins>; 153 153 phy-handle = <&phy1>; 154 - phy-mode = "rgmii"; 154 + phy-mode = "rgmii-id"; 155 155 status = "okay"; 156 156 }; 157 157
+1 -1
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
··· 131 131 pinctrl-0 = <&emac_rgmii_pins>; 132 132 phy-supply = <&reg_sw>; 133 133 phy-handle = <&rgmii_phy>; 134 - phy-mode = "rgmii"; 134 + phy-mode = "rgmii-id"; 135 135 allwinner,rx-delay-ps = <700>; 136 136 allwinner,tx-delay-ps = <700>; 137 137 status = "okay";
+1 -1
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
··· 183 183 pinctrl-0 = <&emac_rgmii_pins>; 184 184 phy-supply = <&reg_dldo4>; 185 185 phy-handle = <&rgmii_phy>; 186 - phy-mode = "rgmii"; 186 + phy-mode = "rgmii-id"; 187 187 status = "okay"; 188 188 }; 189 189
-5
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
··· 53 53 }; 54 54 }; 55 55 56 - &emac { 57 - /* LEDs changed to active high on the plus */ 58 - /delete-property/ allwinner,leds-active-low; 59 - }; 60 - 61 56 &mmc1 { 62 57 vmmc-supply = <&reg_vcc3v3>; 63 58 bus-width = <4>;
+1 -1
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
··· 67 67 pinctrl-0 = <&emac_rgmii_pins>; 68 68 phy-supply = <&reg_gmac_3v3>; 69 69 phy-handle = <&ext_rgmii_phy>; 70 - phy-mode = "rgmii"; 70 + phy-mode = "rgmii-id"; 71 71 status = "okay"; 72 72 }; 73 73
+1 -1
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
··· 129 129 pinctrl-names = "default"; 130 130 pinctrl-0 = <&gmac_rgmii_pins>; 131 131 phy-handle = <&phy1>; 132 - phy-mode = "rgmii"; 132 + phy-mode = "rgmii-id"; 133 133 phy-supply = <&reg_dc1sw>; 134 134 status = "okay"; 135 135 };
+1 -1
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
··· 129 129 pinctrl-names = "default"; 130 130 pinctrl-0 = <&gmac_rgmii_pins>; 131 131 phy-handle = <&phy1>; 132 - phy-mode = "rgmii"; 132 + phy-mode = "rgmii-id"; 133 133 phy-supply = <&reg_cldo1>; 134 134 status = "okay"; 135 135 };
+1 -1
arch/arm/boot/dts/sun9i-a80-optimus.dts
··· 124 124 pinctrl-names = "default"; 125 125 pinctrl-0 = <&gmac_rgmii_pins>; 126 126 phy-handle = <&phy1>; 127 - phy-mode = "rgmii"; 127 + phy-mode = "rgmii-id"; 128 128 phy-supply = <&reg_cldo1>; 129 129 status = "okay"; 130 130 };
+1 -1
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
··· 126 126 pinctrl-0 = <&emac_rgmii_pins>; 127 127 phy-supply = <&reg_gmac_3v3>; 128 128 phy-handle = <&ext_rgmii_phy>; 129 - phy-mode = "rgmii"; 129 + phy-mode = "rgmii-id"; 130 130 131 131 status = "okay"; 132 132 };
+3
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
··· 406 406 }; 407 407 }; 408 408 409 + &mdio1 { 410 + clock-frequency = <5000000>; 411 + }; 409 412 410 413 &iomuxc { 411 414 pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 {
+11 -11
arch/arm/include/asm/kprobes.h
··· 44 44 unsigned long val, void *data); 45 45 46 46 /* optinsn template addresses */ 47 - extern __visible kprobe_opcode_t optprobe_template_entry; 48 - extern __visible kprobe_opcode_t optprobe_template_val; 49 - extern __visible kprobe_opcode_t optprobe_template_call; 50 - extern __visible kprobe_opcode_t optprobe_template_end; 51 - extern __visible kprobe_opcode_t optprobe_template_sub_sp; 52 - extern __visible kprobe_opcode_t optprobe_template_add_sp; 53 - extern __visible kprobe_opcode_t optprobe_template_restore_begin; 54 - extern __visible kprobe_opcode_t optprobe_template_restore_orig_insn; 55 - extern __visible kprobe_opcode_t optprobe_template_restore_end; 47 + extern __visible kprobe_opcode_t optprobe_template_entry[]; 48 + extern __visible kprobe_opcode_t optprobe_template_val[]; 49 + extern __visible kprobe_opcode_t optprobe_template_call[]; 50 + extern __visible kprobe_opcode_t optprobe_template_end[]; 51 + extern __visible kprobe_opcode_t optprobe_template_sub_sp[]; 52 + extern __visible kprobe_opcode_t optprobe_template_add_sp[]; 53 + extern __visible kprobe_opcode_t optprobe_template_restore_begin[]; 54 + extern __visible kprobe_opcode_t optprobe_template_restore_orig_insn[]; 55 + extern __visible kprobe_opcode_t optprobe_template_restore_end[]; 56 56 57 57 #define MAX_OPTIMIZED_LENGTH 4 58 58 #define MAX_OPTINSN_SIZE \ 59 - ((unsigned long)&optprobe_template_end - \ 60 - (unsigned long)&optprobe_template_entry) 59 + ((unsigned long)optprobe_template_end - \ 60 + (unsigned long)optprobe_template_entry) 61 61 #define RELATIVEJUMP_SIZE 4 62 62 63 63 struct arch_optimized_insn {
+1 -2
arch/arm/kernel/perf_regs.c
··· 32 32 } 33 33 34 34 void perf_get_regs_user(struct perf_regs *regs_user, 35 - struct pt_regs *regs, 36 - struct pt_regs *regs_user_copy) 35 + struct pt_regs *regs) 37 36 { 38 37 regs_user->regs = task_pt_regs(current); 39 38 regs_user->abi = perf_reg_abi(current);
+9 -9
arch/arm/probes/kprobes/opt-arm.c
··· 85 85 "optprobe_template_end:\n"); 86 86 87 87 #define TMPL_VAL_IDX \ 88 - ((unsigned long *)&optprobe_template_val - (unsigned long *)&optprobe_template_entry) 88 + ((unsigned long *)optprobe_template_val - (unsigned long *)optprobe_template_entry) 89 89 #define TMPL_CALL_IDX \ 90 - ((unsigned long *)&optprobe_template_call - (unsigned long *)&optprobe_template_entry) 90 + ((unsigned long *)optprobe_template_call - (unsigned long *)optprobe_template_entry) 91 91 #define TMPL_END_IDX \ 92 - ((unsigned long *)&optprobe_template_end - (unsigned long *)&optprobe_template_entry) 92 + ((unsigned long *)optprobe_template_end - (unsigned long *)optprobe_template_entry) 93 93 #define TMPL_ADD_SP \ 94 - ((unsigned long *)&optprobe_template_add_sp - (unsigned long *)&optprobe_template_entry) 94 + ((unsigned long *)optprobe_template_add_sp - (unsigned long *)optprobe_template_entry) 95 95 #define TMPL_SUB_SP \ 96 - ((unsigned long *)&optprobe_template_sub_sp - (unsigned long *)&optprobe_template_entry) 96 + ((unsigned long *)optprobe_template_sub_sp - (unsigned long *)optprobe_template_entry) 97 97 #define TMPL_RESTORE_BEGIN \ 98 - ((unsigned long *)&optprobe_template_restore_begin - (unsigned long *)&optprobe_template_entry) 98 + ((unsigned long *)optprobe_template_restore_begin - (unsigned long *)optprobe_template_entry) 99 99 #define TMPL_RESTORE_ORIGN_INSN \ 100 - ((unsigned long *)&optprobe_template_restore_orig_insn - (unsigned long *)&optprobe_template_entry) 100 + ((unsigned long *)optprobe_template_restore_orig_insn - (unsigned long *)optprobe_template_entry) 101 101 #define TMPL_RESTORE_END \ 102 - ((unsigned long *)&optprobe_template_restore_end - (unsigned long *)&optprobe_template_entry) 102 + ((unsigned long *)optprobe_template_restore_end - (unsigned long *)optprobe_template_entry) 103 103 104 104 /* 105 105 * ARM can always optimize an instruction when using ARM ISA, except ··· 234 234 } 235 235 236 236 /* Copy arch-dep-instance from template. */ 237 - memcpy(code, (unsigned long *)&optprobe_template_entry, 237 + memcpy(code, (unsigned long *)optprobe_template_entry, 238 238 TMPL_END_IDX * sizeof(kprobe_opcode_t)); 239 239 240 240 /* Adjust buffer according to instruction. */
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
··· 105 105 &emac { 106 106 pinctrl-names = "default"; 107 107 pinctrl-0 = <&rgmii_pins>; 108 - phy-mode = "rgmii"; 108 + phy-mode = "rgmii-id"; 109 109 phy-handle = <&ext_rgmii_phy>; 110 110 phy-supply = <&reg_dc1sw>; 111 111 status = "okay";
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
··· 120 120 &emac { 121 121 pinctrl-names = "default"; 122 122 pinctrl-0 = <&rgmii_pins>; 123 - phy-mode = "rgmii"; 123 + phy-mode = "rgmii-id"; 124 124 phy-handle = <&ext_rgmii_phy>; 125 125 phy-supply = <&reg_gmac_3v3>; 126 126 status = "okay";
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
··· 13 13 &emac { 14 14 pinctrl-names = "default"; 15 15 pinctrl-0 = <&rgmii_pins>; 16 - phy-mode = "rgmii"; 16 + phy-mode = "rgmii-txid"; 17 17 phy-handle = <&ext_rgmii_phy>; 18 18 status = "okay"; 19 19 };
-3
arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts
··· 122 122 status = "okay"; 123 123 124 124 port { 125 - #address-cells = <1>; 126 - #size-cells = <0>; 127 - 128 125 csi_ep: endpoint { 129 126 remote-endpoint = <&ov5640_ep>; 130 127 bus-width = <8>;
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
··· 36 36 pinctrl-0 = <&emac_rgmii_pins>; 37 37 phy-supply = <&reg_gmac_3v3>; 38 38 phy-handle = <&ext_rgmii_phy>; 39 - phy-mode = "rgmii"; 39 + phy-mode = "rgmii-id"; 40 40 /delete-property/ allwinner,leds-active-low; 41 41 status = "okay"; 42 42 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
··· 123 123 pinctrl-0 = <&emac_rgmii_pins>; 124 124 phy-supply = <&reg_gmac_3v3>; 125 125 phy-handle = <&ext_rgmii_phy>; 126 - phy-mode = "rgmii"; 126 + phy-mode = "rgmii-id"; 127 127 status = "okay"; 128 128 }; 129 129
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
··· 124 124 pinctrl-0 = <&emac_rgmii_pins>; 125 125 phy-supply = <&reg_gmac_3v3>; 126 126 phy-handle = <&ext_rgmii_phy>; 127 - phy-mode = "rgmii"; 127 + phy-mode = "rgmii-id"; 128 128 status = "okay"; 129 129 }; 130 130
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
··· 100 100 &emac { 101 101 pinctrl-names = "default"; 102 102 pinctrl-0 = <&ext_rgmii_pins>; 103 - phy-mode = "rgmii"; 103 + phy-mode = "rgmii-id"; 104 104 phy-handle = <&ext_rgmii_phy>; 105 105 phy-supply = <&reg_gmac_3v3>; 106 106 allwinner,rx-delay-ps = <200>;
+1 -1
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
··· 159 159 flash@0 { 160 160 #address-cells = <1>; 161 161 #size-cells = <1>; 162 - compatible = "n25q00a"; 162 + compatible = "micron,mt25qu02g", "jedec,spi-nor"; 163 163 reg = <0>; 164 164 spi-max-frequency = <100000000>; 165 165
+1 -1
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts
··· 192 192 flash@0 { 193 193 #address-cells = <1>; 194 194 #size-cells = <1>; 195 - compatible = "n25q00a"; 195 + compatible = "micron,mt25qu02g", "jedec,spi-nor"; 196 196 reg = <0>; 197 197 spi-max-frequency = <100000000>; 198 198
+1
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
··· 1012 1012 compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+"; 1013 1013 reg = <0x0 0x1e34040 0x0 0x1c>; 1014 1014 #fsl,rcpm-wakeup-cells = <7>; 1015 + little-endian; 1015 1016 }; 1016 1017 1017 1018 ftm_alarm0: timer@2800000 {
+1
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
··· 805 805 compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+"; 806 806 reg = <0x0 0x1e34040 0x0 0x18>; 807 807 #fsl,rcpm-wakeup-cells = <6>; 808 + little-endian; 808 809 }; 809 810 810 811 ftm_alarm0: timer@2800000 {
+1
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
··· 892 892 compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+"; 893 893 reg = <0x0 0x1e34040 0x0 0x18>; 894 894 #fsl,rcpm-wakeup-cells = <6>; 895 + little-endian; 895 896 }; 896 897 897 898 ftm_alarm0: timer@2800000 {
+2
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
··· 72 72 pmic@4b { 73 73 compatible = "rohm,bd71847"; 74 74 reg = <0x4b>; 75 + pinctrl-names = "default"; 75 76 pinctrl-0 = <&pinctrl_pmic>; 76 77 interrupt-parent = <&gpio1>; 77 78 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ··· 211 210 host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; 212 211 device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; 213 212 clocks = <&osc_32k>; 213 + max-speed = <4000000>; 214 214 clock-names = "extclk"; 215 215 }; 216 216 };
+1
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
··· 121 121 pmic@4b { 122 122 compatible = "rohm,bd71847"; 123 123 reg = <0x4b>; 124 + pinctrl-names = "default"; 124 125 pinctrl-0 = <&pinctrl_pmic>; 125 126 interrupt-parent = <&gpio1>; 126 127 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+3 -6
arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi
··· 135 135 pmic@4b { 136 136 compatible = "rohm,bd71847"; 137 137 reg = <0x4b>; 138 + pinctrl-names = "default"; 138 139 pinctrl-0 = <&pinctrl_pmic>; 139 140 interrupt-parent = <&gpio2>; 140 - /* 141 - * The interrupt is not correct. It should be level low, 142 - * however with internal pull up this causes IRQ storm. 143 - */ 144 - interrupts = <8 IRQ_TYPE_EDGE_RISING>; 141 + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 145 142 rohm,reset-snvs-powered; 146 143 147 144 #clock-cells = <0>; ··· 395 398 396 399 pinctrl_pmic: pmicirqgrp { 397 400 fsl,pins = < 398 - MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x41 401 + MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 399 402 >; 400 403 }; 401 404
+1 -1
arch/arm64/boot/dts/freescale/imx8mm.dtsi
··· 129 129 130 130 opp-1600000000 { 131 131 opp-hz = /bits/ 64 <1600000000>; 132 - opp-microvolt = <900000>; 132 + opp-microvolt = <950000>; 133 133 opp-supported-hw = <0xc>, <0x7>; 134 134 clock-latency-ns = <150000>; 135 135 opp-suspend;
+1
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
··· 53 53 pmic@4b { 54 54 compatible = "rohm,bd71847"; 55 55 reg = <0x4b>; 56 + pinctrl-names = "default"; 56 57 pinctrl-0 = <&pinctrl_pmic>; 57 58 interrupt-parent = <&gpio1>; 58 59 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+1
arch/arm64/boot/dts/freescale/imx8mn-evk.dts
··· 18 18 pmic: pmic@25 { 19 19 compatible = "nxp,pca9450b"; 20 20 reg = <0x25>; 21 + pinctrl-names = "default"; 21 22 pinctrl-0 = <&pinctrl_pmic>; 22 23 interrupt-parent = <&gpio1>; 23 24 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+3 -6
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
··· 116 116 pmic@4b { 117 117 compatible = "rohm,bd71847"; 118 118 reg = <0x4b>; 119 + pinctrl-names = "default"; 119 120 pinctrl-0 = <&pinctrl_pmic>; 120 121 interrupt-parent = <&gpio2>; 121 - /* 122 - * The interrupt is not correct. It should be level low, 123 - * however with internal pull up this causes IRQ storm. 124 - */ 125 - interrupts = <8 IRQ_TYPE_EDGE_RISING>; 122 + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 126 123 rohm,reset-snvs-powered; 127 124 128 125 regulators { ··· 385 388 386 389 pinctrl_pmic: pmicirqgrp { 387 390 fsl,pins = < 388 - MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x101 391 + MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 389 392 >; 390 393 }; 391 394
-30
arch/arm64/boot/dts/freescale/imx8mn.dtsi
··· 790 790 #index-cells = <1>; 791 791 reg = <0x32e40200 0x200>; 792 792 }; 793 - 794 - usbotg2: usb@32e50000 { 795 - compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb"; 796 - reg = <0x32e50000 0x200>; 797 - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 798 - clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>; 799 - clock-names = "usb1_ctrl_root_clk"; 800 - assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>, 801 - <&clk IMX8MN_CLK_USB_CORE_REF>; 802 - assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>, 803 - <&clk IMX8MN_SYS_PLL1_100M>; 804 - fsl,usbphy = <&usbphynop2>; 805 - fsl,usbmisc = <&usbmisc2 0>; 806 - status = "disabled"; 807 - }; 808 - 809 - usbmisc2: usbmisc@32e50200 { 810 - compatible = "fsl,imx8mn-usbmisc", "fsl,imx7d-usbmisc"; 811 - #index-cells = <1>; 812 - reg = <0x32e50200 0x200>; 813 - }; 814 - 815 793 }; 816 794 817 795 dma_apbh: dma-controller@33000000 { ··· 848 870 }; 849 871 850 872 usbphynop1: usbphynop1 { 851 - compatible = "usb-nop-xceiv"; 852 - clocks = <&clk IMX8MN_CLK_USB_PHY_REF>; 853 - assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>; 854 - assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>; 855 - clock-names = "main_clk"; 856 - }; 857 - 858 - usbphynop2: usbphynop2 { 859 873 compatible = "usb-nop-xceiv"; 860 874 clocks = <&clk IMX8MN_CLK_USB_PHY_REF>; 861 875 assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>;
+1
arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
··· 19 19 clock-names = "fmanclk"; 20 20 fsl,qman-channel-range = <0x800 0x10>; 21 21 ptimer-handle = <&ptp_timer0>; 22 + dma-coherent; 22 23 23 24 muram@0 { 24 25 compatible = "fsl,fman-muram";
+1 -1
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts
··· 110 110 flash@0 { 111 111 #address-cells = <1>; 112 112 #size-cells = <1>; 113 - compatible = "mt25qu02g"; 113 + compatible = "micron,mt25qu02g", "jedec,spi-nor"; 114 114 reg = <0>; 115 115 spi-max-frequency = <100000000>; 116 116
+6
arch/arm64/boot/dts/renesas/r8a774e1.dtsi
··· 28 28 clock-frequency = <0>; 29 29 }; 30 30 31 + audio_clk_b: audio_clk_b { 32 + compatible = "fixed-clock"; 33 + #clock-cells = <0>; 34 + clock-frequency = <0>; 35 + }; 36 + 31 37 audio_clk_c: audio_clk_c { 32 38 compatible = "fixed-clock"; 33 39 #clock-cells = <0>;
+2
arch/arm64/include/asm/cpufeature.h
··· 268 268 /* 269 269 * CPU feature detected at boot time based on feature of one or more CPUs. 270 270 * All possible conflicts for a late CPU are ignored. 271 + * NOTE: this means that a late CPU with the feature will *not* cause the 272 + * capability to be advertised by cpus_have_*cap()! 271 273 */ 272 274 #define ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE \ 273 275 (ARM64_CPUCAP_SCOPE_LOCAL_CPU | \
+4
arch/arm64/include/asm/cputype.h
··· 86 86 #define QCOM_CPU_PART_FALKOR_V1 0x800 87 87 #define QCOM_CPU_PART_FALKOR 0xC00 88 88 #define QCOM_CPU_PART_KRYO 0x200 89 + #define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800 90 + #define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801 89 91 #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 90 92 #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 91 93 #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 ··· 118 116 #define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1) 119 117 #define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) 120 118 #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) 119 + #define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD) 120 + #define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER) 121 121 #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) 122 122 #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) 123 123 #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)
+2
arch/arm64/include/asm/kvm_host.h
··· 118 118 */ 119 119 unsigned long *pmu_filter; 120 120 unsigned int pmuver; 121 + 122 + u8 pfr0_csv2; 121 123 }; 122 124 123 125 struct kvm_vcpu_fault_info {
+4
arch/arm64/include/asm/sysreg.h
··· 372 372 #define SYS_CONTEXTIDR_EL1 sys_reg(3, 0, 13, 0, 1) 373 373 #define SYS_TPIDR_EL1 sys_reg(3, 0, 13, 0, 4) 374 374 375 + #define SYS_SCXTNUM_EL1 sys_reg(3, 0, 13, 0, 7) 376 + 375 377 #define SYS_CNTKCTL_EL1 sys_reg(3, 0, 14, 1, 0) 376 378 377 379 #define SYS_CCSIDR_EL1 sys_reg(3, 1, 0, 0, 0) ··· 405 403 406 404 #define SYS_TPIDR_EL0 sys_reg(3, 3, 13, 0, 2) 407 405 #define SYS_TPIDRRO_EL0 sys_reg(3, 3, 13, 0, 3) 406 + 407 + #define SYS_SCXTNUM_EL0 sys_reg(3, 3, 13, 0, 7) 408 408 409 409 /* Definitions for system register interface to AMU for ARMv8.4 onwards */ 410 410 #define SYS_AM_EL0(crm, op2) sys_reg(3, 3, 13, (crm), (op2))
+2
arch/arm64/kernel/cpu_errata.c
··· 299 299 MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4), 300 300 /* Brahma-B53 r0p[0] */ 301 301 MIDR_REV(MIDR_BRAHMA_B53, 0, 0), 302 + /* Kryo2XX Silver rAp4 */ 303 + MIDR_REV(MIDR_QCOM_KRYO_2XX_SILVER, 0xa, 0x4), 302 304 {}, 303 305 }; 304 306 #endif
+2
arch/arm64/kernel/cpufeature.c
··· 1337 1337 MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), 1338 1338 MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), 1339 1339 MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL), 1340 + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_GOLD), 1341 + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER), 1340 1342 MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER), 1341 1343 MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER), 1342 1344 { /* sentinel */ }
+1 -1
arch/arm64/kernel/kexec_image.c
··· 127 127 kernel_segment->mem, kbuf.bufsz, 128 128 kernel_segment->memsz); 129 129 130 - return 0; 130 + return NULL; 131 131 } 132 132 133 133 #ifdef CONFIG_KEXEC_IMAGE_VERIFY_SIG
+1 -2
arch/arm64/kernel/perf_regs.c
··· 73 73 } 74 74 75 75 void perf_get_regs_user(struct perf_regs *regs_user, 76 - struct pt_regs *regs, 77 - struct pt_regs *regs_user_copy) 76 + struct pt_regs *regs) 78 77 { 79 78 regs_user->regs = task_pt_regs(current); 80 79 regs_user->abi = perf_reg_abi(current);
+2 -3
arch/arm64/kernel/process.c
··· 522 522 bool prev32, next32; 523 523 u64 val; 524 524 525 - if (!(IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040) && 526 - cpus_have_const_cap(ARM64_WORKAROUND_1418040))) 525 + if (!IS_ENABLED(CONFIG_ARM64_ERRATUM_1418040)) 527 526 return; 528 527 529 528 prev32 = is_compat_thread(task_thread_info(prev)); 530 529 next32 = is_compat_thread(task_thread_info(next)); 531 530 532 - if (prev32 == next32) 531 + if (prev32 == next32 || !this_cpu_has_cap(ARM64_WORKAROUND_1418040)) 533 532 return; 534 533 535 534 val = read_sysreg(cntkctl_el1);
+1
arch/arm64/kernel/proton-pack.c
··· 118 118 MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), 119 119 MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), 120 120 MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), 121 + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_2XX_SILVER), 121 122 MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER), 122 123 MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER), 123 124 { /* sentinel */ }
+1 -4
arch/arm64/kernel/psci.c
··· 66 66 67 67 static void cpu_psci_cpu_die(unsigned int cpu) 68 68 { 69 - int ret; 70 69 /* 71 70 * There are no known implementations of PSCI actually using the 72 71 * power state field, pass a sensible default for now. ··· 73 74 u32 state = PSCI_POWER_STATE_TYPE_POWER_DOWN << 74 75 PSCI_0_2_POWER_STATE_TYPE_SHIFT; 75 76 76 - ret = psci_ops.cpu_off(state); 77 - 78 - pr_crit("unable to power off CPU%u (%d)\n", cpu, ret); 77 + psci_ops.cpu_off(state); 79 78 } 80 79 81 80 static int cpu_psci_cpu_kill(unsigned int cpu)
+1
arch/arm64/kernel/smp.c
··· 413 413 414 414 /* Mark this CPU absent */ 415 415 set_cpu_present(cpu, 0); 416 + rcu_report_dead(cpu); 416 417 417 418 if (IS_ENABLED(CONFIG_HOTPLUG_CPU)) { 418 419 update_cpu_boot_status(CPU_KILL_ME);
+16
arch/arm64/kvm/arm.c
··· 102 102 return vgic_present ? kvm_vgic_get_max_vcpus() : KVM_MAX_VCPUS; 103 103 } 104 104 105 + static void set_default_csv2(struct kvm *kvm) 106 + { 107 + /* 108 + * The default is to expose CSV2 == 1 if the HW isn't affected. 109 + * Although this is a per-CPU feature, we make it global because 110 + * asymmetric systems are just a nuisance. 111 + * 112 + * Userspace can override this as long as it doesn't promise 113 + * the impossible. 114 + */ 115 + if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) 116 + kvm->arch.pfr0_csv2 = 1; 117 + } 118 + 105 119 /** 106 120 * kvm_arch_init_vm - initializes a VM data structure 107 121 * @kvm: pointer to the KVM struct ··· 140 126 141 127 /* The maximum number of VCPUs is limited by the host's GIC model */ 142 128 kvm->arch.max_vcpus = kvm_arm_default_max_vcpus(); 129 + 130 + set_default_csv2(kvm); 143 131 144 132 return ret; 145 133 out_free_stage2_pgd:
+67 -44
arch/arm64/kvm/sys_regs.c
··· 1038 1038 { SYS_DESC(SYS_PMEVTYPERn_EL0(n)), \ 1039 1039 access_pmu_evtyper, reset_unknown, (PMEVTYPER0_EL0 + n), } 1040 1040 1041 - static bool access_amu(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 1042 - const struct sys_reg_desc *r) 1041 + static bool undef_access(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 1042 + const struct sys_reg_desc *r) 1043 1043 { 1044 1044 kvm_inject_undefined(vcpu); 1045 1045 ··· 1047 1047 } 1048 1048 1049 1049 /* Macro to expand the AMU counter and type registers*/ 1050 - #define AMU_AMEVCNTR0_EL0(n) { SYS_DESC(SYS_AMEVCNTR0_EL0(n)), access_amu } 1051 - #define AMU_AMEVTYPER0_EL0(n) { SYS_DESC(SYS_AMEVTYPER0_EL0(n)), access_amu } 1052 - #define AMU_AMEVCNTR1_EL0(n) { SYS_DESC(SYS_AMEVCNTR1_EL0(n)), access_amu } 1053 - #define AMU_AMEVTYPER1_EL0(n) { SYS_DESC(SYS_AMEVTYPER1_EL0(n)), access_amu } 1054 - 1055 - static bool trap_ptrauth(struct kvm_vcpu *vcpu, 1056 - struct sys_reg_params *p, 1057 - const struct sys_reg_desc *rd) 1058 - { 1059 - /* 1060 - * If we land here, that is because we didn't fixup the access on exit 1061 - * by allowing the PtrAuth sysregs. The only way this happens is when 1062 - * the guest does not have PtrAuth support enabled. 1063 - */ 1064 - kvm_inject_undefined(vcpu); 1065 - 1066 - return false; 1067 - } 1050 + #define AMU_AMEVCNTR0_EL0(n) { SYS_DESC(SYS_AMEVCNTR0_EL0(n)), undef_access } 1051 + #define AMU_AMEVTYPER0_EL0(n) { SYS_DESC(SYS_AMEVTYPER0_EL0(n)), undef_access } 1052 + #define AMU_AMEVCNTR1_EL0(n) { SYS_DESC(SYS_AMEVCNTR1_EL0(n)), undef_access } 1053 + #define AMU_AMEVTYPER1_EL0(n) { SYS_DESC(SYS_AMEVTYPER1_EL0(n)), undef_access } 1068 1054 1069 1055 static unsigned int ptrauth_visibility(const struct kvm_vcpu *vcpu, 1070 1056 const struct sys_reg_desc *rd) ··· 1058 1072 return vcpu_has_ptrauth(vcpu) ? 0 : REG_HIDDEN; 1059 1073 } 1060 1074 1075 + /* 1076 + * If we land here on a PtrAuth access, that is because we didn't 1077 + * fixup the access on exit by allowing the PtrAuth sysregs. The only 1078 + * way this happens is when the guest does not have PtrAuth support 1079 + * enabled. 1080 + */ 1061 1081 #define __PTRAUTH_KEY(k) \ 1062 - { SYS_DESC(SYS_## k), trap_ptrauth, reset_unknown, k, \ 1082 + { SYS_DESC(SYS_## k), undef_access, reset_unknown, k, \ 1063 1083 .visibility = ptrauth_visibility} 1064 1084 1065 1085 #define PTRAUTH_KEY(k) \ ··· 1120 1128 if (!vcpu_has_sve(vcpu)) 1121 1129 val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT); 1122 1130 val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT); 1123 - if (!(val & (0xfUL << ID_AA64PFR0_CSV2_SHIFT)) && 1124 - arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) 1125 - val |= (1UL << ID_AA64PFR0_CSV2_SHIFT); 1131 + val &= ~(0xfUL << ID_AA64PFR0_CSV2_SHIFT); 1132 + val |= ((u64)vcpu->kvm->arch.pfr0_csv2 << ID_AA64PFR0_CSV2_SHIFT); 1126 1133 } else if (id == SYS_ID_AA64PFR1_EL1) { 1127 1134 val &= ~(0xfUL << ID_AA64PFR1_MTE_SHIFT); 1128 1135 } else if (id == SYS_ID_AA64ISAR1_EL1 && !vcpu_has_ptrauth(vcpu)) { ··· 1202 1211 return 0; 1203 1212 1204 1213 return REG_HIDDEN; 1214 + } 1215 + 1216 + static int set_id_aa64pfr0_el1(struct kvm_vcpu *vcpu, 1217 + const struct sys_reg_desc *rd, 1218 + const struct kvm_one_reg *reg, void __user *uaddr) 1219 + { 1220 + const u64 id = sys_reg_to_index(rd); 1221 + int err; 1222 + u64 val; 1223 + u8 csv2; 1224 + 1225 + err = reg_from_user(&val, uaddr, id); 1226 + if (err) 1227 + return err; 1228 + 1229 + /* 1230 + * Allow AA64PFR0_EL1.CSV2 to be set from userspace as long as 1231 + * it doesn't promise more than what is actually provided (the 1232 + * guest could otherwise be covered in ectoplasmic residue). 1233 + */ 1234 + csv2 = cpuid_feature_extract_unsigned_field(val, ID_AA64PFR0_CSV2_SHIFT); 1235 + if (csv2 > 1 || 1236 + (csv2 && arm64_get_spectre_v2_state() != SPECTRE_UNAFFECTED)) 1237 + return -EINVAL; 1238 + 1239 + /* We can only differ with CSV2, and anything else is an error */ 1240 + val ^= read_id_reg(vcpu, rd, false); 1241 + val &= ~(0xFUL << ID_AA64PFR0_CSV2_SHIFT); 1242 + if (val) 1243 + return -EINVAL; 1244 + 1245 + vcpu->kvm->arch.pfr0_csv2 = csv2; 1246 + 1247 + return 0; 1205 1248 } 1206 1249 1207 1250 /* ··· 1366 1341 return true; 1367 1342 } 1368 1343 1369 - static bool access_mte_regs(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 1370 - const struct sys_reg_desc *r) 1371 - { 1372 - kvm_inject_undefined(vcpu); 1373 - return false; 1374 - } 1375 - 1376 1344 /* sys_reg_desc initialiser for known cpufeature ID registers */ 1377 1345 #define ID_SANITISED(name) { \ 1378 1346 SYS_DESC(SYS_##name), \ ··· 1490 1472 1491 1473 /* AArch64 ID registers */ 1492 1474 /* CRm=4 */ 1493 - ID_SANITISED(ID_AA64PFR0_EL1), 1475 + { SYS_DESC(SYS_ID_AA64PFR0_EL1), .access = access_id_reg, 1476 + .get_user = get_id_reg, .set_user = set_id_aa64pfr0_el1, }, 1494 1477 ID_SANITISED(ID_AA64PFR1_EL1), 1495 1478 ID_UNALLOCATED(4,2), 1496 1479 ID_UNALLOCATED(4,3), ··· 1534 1515 { SYS_DESC(SYS_ACTLR_EL1), access_actlr, reset_actlr, ACTLR_EL1 }, 1535 1516 { SYS_DESC(SYS_CPACR_EL1), NULL, reset_val, CPACR_EL1, 0 }, 1536 1517 1537 - { SYS_DESC(SYS_RGSR_EL1), access_mte_regs }, 1538 - { SYS_DESC(SYS_GCR_EL1), access_mte_regs }, 1518 + { SYS_DESC(SYS_RGSR_EL1), undef_access }, 1519 + { SYS_DESC(SYS_GCR_EL1), undef_access }, 1539 1520 1540 1521 { SYS_DESC(SYS_ZCR_EL1), NULL, reset_val, ZCR_EL1, 0, .visibility = sve_visibility }, 1541 1522 { SYS_DESC(SYS_TTBR0_EL1), access_vm_reg, reset_unknown, TTBR0_EL1 }, ··· 1561 1542 { SYS_DESC(SYS_ERXMISC0_EL1), trap_raz_wi }, 1562 1543 { SYS_DESC(SYS_ERXMISC1_EL1), trap_raz_wi }, 1563 1544 1564 - { SYS_DESC(SYS_TFSR_EL1), access_mte_regs }, 1565 - { SYS_DESC(SYS_TFSRE0_EL1), access_mte_regs }, 1545 + { SYS_DESC(SYS_TFSR_EL1), undef_access }, 1546 + { SYS_DESC(SYS_TFSRE0_EL1), undef_access }, 1566 1547 1567 1548 { SYS_DESC(SYS_FAR_EL1), access_vm_reg, reset_unknown, FAR_EL1 }, 1568 1549 { SYS_DESC(SYS_PAR_EL1), NULL, reset_unknown, PAR_EL1 }, ··· 1598 1579 { SYS_DESC(SYS_CONTEXTIDR_EL1), access_vm_reg, reset_val, CONTEXTIDR_EL1, 0 }, 1599 1580 { SYS_DESC(SYS_TPIDR_EL1), NULL, reset_unknown, TPIDR_EL1 }, 1600 1581 1582 + { SYS_DESC(SYS_SCXTNUM_EL1), undef_access }, 1583 + 1601 1584 { SYS_DESC(SYS_CNTKCTL_EL1), NULL, reset_val, CNTKCTL_EL1, 0}, 1602 1585 1603 1586 { SYS_DESC(SYS_CCSIDR_EL1), access_ccsidr }, ··· 1628 1607 { SYS_DESC(SYS_TPIDR_EL0), NULL, reset_unknown, TPIDR_EL0 }, 1629 1608 { SYS_DESC(SYS_TPIDRRO_EL0), NULL, reset_unknown, TPIDRRO_EL0 }, 1630 1609 1631 - { SYS_DESC(SYS_AMCR_EL0), access_amu }, 1632 - { SYS_DESC(SYS_AMCFGR_EL0), access_amu }, 1633 - { SYS_DESC(SYS_AMCGCR_EL0), access_amu }, 1634 - { SYS_DESC(SYS_AMUSERENR_EL0), access_amu }, 1635 - { SYS_DESC(SYS_AMCNTENCLR0_EL0), access_amu }, 1636 - { SYS_DESC(SYS_AMCNTENSET0_EL0), access_amu }, 1637 - { SYS_DESC(SYS_AMCNTENCLR1_EL0), access_amu }, 1638 - { SYS_DESC(SYS_AMCNTENSET1_EL0), access_amu }, 1610 + { SYS_DESC(SYS_SCXTNUM_EL0), undef_access }, 1611 + 1612 + { SYS_DESC(SYS_AMCR_EL0), undef_access }, 1613 + { SYS_DESC(SYS_AMCFGR_EL0), undef_access }, 1614 + { SYS_DESC(SYS_AMCGCR_EL0), undef_access }, 1615 + { SYS_DESC(SYS_AMUSERENR_EL0), undef_access }, 1616 + { SYS_DESC(SYS_AMCNTENCLR0_EL0), undef_access }, 1617 + { SYS_DESC(SYS_AMCNTENSET0_EL0), undef_access }, 1618 + { SYS_DESC(SYS_AMCNTENCLR1_EL0), undef_access }, 1619 + { SYS_DESC(SYS_AMCNTENSET1_EL0), undef_access }, 1639 1620 AMU_AMEVCNTR0_EL0(0), 1640 1621 AMU_AMEVCNTR0_EL0(1), 1641 1622 AMU_AMEVCNTR0_EL0(2),
+17
arch/arm64/mm/mmu.c
··· 1444 1444 free_empty_tables(start, end, PAGE_OFFSET, PAGE_END); 1445 1445 } 1446 1446 1447 + static bool inside_linear_region(u64 start, u64 size) 1448 + { 1449 + /* 1450 + * Linear mapping region is the range [PAGE_OFFSET..(PAGE_END - 1)] 1451 + * accommodating both its ends but excluding PAGE_END. Max physical 1452 + * range which can be mapped inside this linear mapping range, must 1453 + * also be derived from its end points. 1454 + */ 1455 + return start >= __pa(_PAGE_OFFSET(vabits_actual)) && 1456 + (start + size - 1) <= __pa(PAGE_END - 1); 1457 + } 1458 + 1447 1459 int arch_add_memory(int nid, u64 start, u64 size, 1448 1460 struct mhp_params *params) 1449 1461 { 1450 1462 int ret, flags = 0; 1463 + 1464 + if (!inside_linear_region(start, size)) { 1465 + pr_err("[%llx %llx] is outside linear mapping region\n", start, start + size); 1466 + return -EINVAL; 1467 + } 1451 1468 1452 1469 if (rodata_full || debug_pagealloc_enabled()) 1453 1470 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
+1 -2
arch/csky/kernel/perf_regs.c
··· 32 32 } 33 33 34 34 void perf_get_regs_user(struct perf_regs *regs_user, 35 - struct pt_regs *regs, 36 - struct pt_regs *regs_user_copy) 35 + struct pt_regs *regs) 37 36 { 38 37 regs_user->regs = task_pt_regs(current); 39 38 regs_user->abi = perf_reg_abi(current);
+8 -1
arch/mips/alchemy/common/clock.c
··· 152 152 { 153 153 struct clk_init_data id; 154 154 struct clk_hw *h; 155 + struct clk *clk; 155 156 156 157 h = kzalloc(sizeof(*h), GFP_KERNEL); 157 158 if (!h) ··· 165 164 id.ops = &alchemy_clkops_cpu; 166 165 h->init = &id; 167 166 168 - return clk_register(NULL, h); 167 + clk = clk_register(NULL, h); 168 + if (IS_ERR(clk)) { 169 + pr_err("failed to register clock\n"); 170 + kfree(h); 171 + } 172 + 173 + return clk; 169 174 } 170 175 171 176 /* AUXPLLs ************************************************************/
+3 -3
arch/mips/kernel/setup.c
··· 262 262 static void __init bootmem_init(void) 263 263 { 264 264 phys_addr_t ramstart, ramend; 265 - phys_addr_t start, end; 266 - u64 i; 265 + unsigned long start, end; 266 + int i; 267 267 268 268 ramstart = memblock_start_of_DRAM(); 269 269 ramend = memblock_end_of_DRAM(); ··· 300 300 301 301 min_low_pfn = ARCH_PFN_OFFSET; 302 302 max_pfn = PFN_DOWN(ramend); 303 - for_each_mem_range(i, &start, &end) { 303 + for_each_mem_pfn_range(i, MAX_NUMNODES, &start, &end, NULL) { 304 304 /* 305 305 * Skip highmem here so we get an accurate max_low_pfn if low 306 306 * memory stops short of high memory.
+1
arch/mips/mm/tlb-r4k.c
··· 438 438 } 439 439 return mask == PM_HUGE_MASK; 440 440 } 441 + EXPORT_SYMBOL(has_transparent_hugepage); 441 442 442 443 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 443 444
+42 -24
arch/powerpc/include/asm/book3s/64/kup-radix.h
··· 27 27 #endif 28 28 .endm 29 29 30 + #ifdef CONFIG_PPC_KUAP 30 31 .macro kuap_check_amr gpr1, gpr2 31 32 #ifdef CONFIG_PPC_KUAP_DEBUG 32 33 BEGIN_MMU_FTR_SECTION_NESTED(67) ··· 39 38 END_MMU_FTR_SECTION_NESTED_IFSET(MMU_FTR_RADIX_KUAP, 67) 40 39 #endif 41 40 .endm 41 + #endif 42 42 43 43 .macro kuap_save_amr_and_lock gpr1, gpr2, use_cr, msr_pr_cr 44 44 #ifdef CONFIG_PPC_KUAP ··· 62 60 .endm 63 61 64 62 #else /* !__ASSEMBLY__ */ 63 + 64 + DECLARE_STATIC_KEY_FALSE(uaccess_flush_key); 65 65 66 66 #ifdef CONFIG_PPC_KUAP 67 67 ··· 107 103 108 104 static inline unsigned long get_kuap(void) 109 105 { 106 + /* 107 + * We return AMR_KUAP_BLOCKED when we don't support KUAP because 108 + * prevent_user_access_return needs to return AMR_KUAP_BLOCKED to 109 + * cause restore_user_access to do a flush. 110 + * 111 + * This has no effect in terms of actually blocking things on hash, 112 + * so it doesn't break anything. 113 + */ 110 114 if (!early_mmu_has_feature(MMU_FTR_RADIX_KUAP)) 111 - return 0; 115 + return AMR_KUAP_BLOCKED; 112 116 113 117 return mfspr(SPRN_AMR); 114 118 } ··· 134 122 mtspr(SPRN_AMR, value); 135 123 isync(); 136 124 } 125 + 126 + static inline bool 127 + bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write) 128 + { 129 + return WARN(mmu_has_feature(MMU_FTR_RADIX_KUAP) && 130 + (regs->kuap & (is_write ? AMR_KUAP_BLOCK_WRITE : AMR_KUAP_BLOCK_READ)), 131 + "Bug: %s fault blocked by AMR!", is_write ? "Write" : "Read"); 132 + } 133 + #else /* CONFIG_PPC_KUAP */ 134 + static inline void kuap_restore_amr(struct pt_regs *regs, unsigned long amr) { } 135 + 136 + static inline unsigned long kuap_get_and_check_amr(void) 137 + { 138 + return 0UL; 139 + } 140 + 141 + static inline unsigned long get_kuap(void) 142 + { 143 + return AMR_KUAP_BLOCKED; 144 + } 145 + 146 + static inline void set_kuap(unsigned long value) { } 147 + #endif /* !CONFIG_PPC_KUAP */ 137 148 138 149 static __always_inline void allow_user_access(void __user *to, const void __user *from, 139 150 unsigned long size, unsigned long dir) ··· 177 142 unsigned long size, unsigned long dir) 178 143 { 179 144 set_kuap(AMR_KUAP_BLOCKED); 145 + if (static_branch_unlikely(&uaccess_flush_key)) 146 + do_uaccess_flush(); 180 147 } 181 148 182 149 static inline unsigned long prevent_user_access_return(void) ··· 186 149 unsigned long flags = get_kuap(); 187 150 188 151 set_kuap(AMR_KUAP_BLOCKED); 152 + if (static_branch_unlikely(&uaccess_flush_key)) 153 + do_uaccess_flush(); 189 154 190 155 return flags; 191 156 } ··· 195 156 static inline void restore_user_access(unsigned long flags) 196 157 { 197 158 set_kuap(flags); 159 + if (static_branch_unlikely(&uaccess_flush_key) && flags == AMR_KUAP_BLOCKED) 160 + do_uaccess_flush(); 198 161 } 199 - 200 - static inline bool 201 - bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write) 202 - { 203 - return WARN(mmu_has_feature(MMU_FTR_RADIX_KUAP) && 204 - (regs->kuap & (is_write ? AMR_KUAP_BLOCK_WRITE : AMR_KUAP_BLOCK_READ)), 205 - "Bug: %s fault blocked by AMR!", is_write ? "Write" : "Read"); 206 - } 207 - #else /* CONFIG_PPC_KUAP */ 208 - static inline void kuap_restore_amr(struct pt_regs *regs, unsigned long amr) 209 - { 210 - } 211 - 212 - static inline void kuap_check_amr(void) 213 - { 214 - } 215 - 216 - static inline unsigned long kuap_get_and_check_amr(void) 217 - { 218 - return 0; 219 - } 220 - #endif /* CONFIG_PPC_KUAP */ 221 - 222 162 #endif /* __ASSEMBLY__ */ 223 163 224 164 #endif /* _ASM_POWERPC_BOOK3S_64_KUP_RADIX_H */
+11 -1
arch/powerpc/include/asm/exception-64s.h
··· 57 57 nop; \ 58 58 nop 59 59 60 + #define ENTRY_FLUSH_SLOT \ 61 + ENTRY_FLUSH_FIXUP_SECTION; \ 62 + nop; \ 63 + nop; \ 64 + nop; 65 + 60 66 /* 61 67 * r10 must be free to use, r13 must be paca 62 68 */ 63 69 #define INTERRUPT_TO_KERNEL \ 64 - STF_ENTRY_BARRIER_SLOT 70 + STF_ENTRY_BARRIER_SLOT; \ 71 + ENTRY_FLUSH_SLOT 65 72 66 73 /* 67 74 * Macros for annotating the expected destination of (h)rfid ··· 144 137 RFSCV; \ 145 138 b rfscv_flush_fallback 146 139 140 + #else /* __ASSEMBLY__ */ 141 + /* Prototype for function defined in exceptions-64s.S */ 142 + void do_uaccess_flush(void); 147 143 #endif /* __ASSEMBLY__ */ 148 144 149 145 #endif /* _ASM_POWERPC_EXCEPTION_H */
+19
arch/powerpc/include/asm/feature-fixups.h
··· 205 205 FTR_ENTRY_OFFSET 955b-956b; \ 206 206 .popsection; 207 207 208 + #define UACCESS_FLUSH_FIXUP_SECTION \ 209 + 959: \ 210 + .pushsection __uaccess_flush_fixup,"a"; \ 211 + .align 2; \ 212 + 960: \ 213 + FTR_ENTRY_OFFSET 959b-960b; \ 214 + .popsection; 215 + 216 + #define ENTRY_FLUSH_FIXUP_SECTION \ 217 + 957: \ 218 + .pushsection __entry_flush_fixup,"a"; \ 219 + .align 2; \ 220 + 958: \ 221 + FTR_ENTRY_OFFSET 957b-958b; \ 222 + .popsection; 223 + 208 224 #define RFI_FLUSH_FIXUP_SECTION \ 209 225 951: \ 210 226 .pushsection __rfi_flush_fixup,"a"; \ ··· 253 237 #include <linux/types.h> 254 238 255 239 extern long stf_barrier_fallback; 240 + extern long entry_flush_fallback; 256 241 extern long __start___stf_entry_barrier_fixup, __stop___stf_entry_barrier_fixup; 257 242 extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup; 243 + extern long __start___uaccess_flush_fixup, __stop___uaccess_flush_fixup; 244 + extern long __start___entry_flush_fixup, __stop___entry_flush_fixup; 258 245 extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup; 259 246 extern long __start___barrier_nospec_fixup, __stop___barrier_nospec_fixup; 260 247 extern long __start__btb_flush_fixup, __stop__btb_flush_fixup;
+20 -6
arch/powerpc/include/asm/kup.h
··· 14 14 #define KUAP_CURRENT_WRITE 8 15 15 #define KUAP_CURRENT (KUAP_CURRENT_READ | KUAP_CURRENT_WRITE) 16 16 17 - #ifdef CONFIG_PPC64 17 + #ifdef CONFIG_PPC_BOOK3S_64 18 18 #include <asm/book3s/64/kup-radix.h> 19 19 #endif 20 20 #ifdef CONFIG_PPC_8xx ··· 35 35 .macro kuap_check current, gpr 36 36 .endm 37 37 38 + .macro kuap_check_amr gpr1, gpr2 39 + .endm 40 + 38 41 #endif 39 42 40 43 #else /* !__ASSEMBLY__ */ ··· 56 53 void setup_kuap(bool disabled); 57 54 #else 58 55 static inline void setup_kuap(bool disabled) { } 56 + 57 + static inline bool 58 + bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write) 59 + { 60 + return false; 61 + } 62 + 63 + static inline void kuap_check_amr(void) { } 64 + 65 + /* 66 + * book3s/64/kup-radix.h defines these functions for the !KUAP case to flush 67 + * the L1D cache after user accesses. Only include the empty stubs for other 68 + * platforms. 69 + */ 70 + #ifndef CONFIG_PPC_BOOK3S_64 59 71 static inline void allow_user_access(void __user *to, const void __user *from, 60 72 unsigned long size, unsigned long dir) { } 61 73 static inline void prevent_user_access(void __user *to, const void __user *from, 62 74 unsigned long size, unsigned long dir) { } 63 75 static inline unsigned long prevent_user_access_return(void) { return 0UL; } 64 76 static inline void restore_user_access(unsigned long flags) { } 65 - static inline bool 66 - bad_kuap_fault(struct pt_regs *regs, unsigned long address, bool is_write) 67 - { 68 - return false; 69 - } 77 + #endif /* CONFIG_PPC_BOOK3S_64 */ 70 78 #endif /* CONFIG_PPC_KUAP */ 71 79 72 80 static inline void allow_read_from_user(const void __user *from, unsigned long size)
+7
arch/powerpc/include/asm/security_features.h
··· 86 86 // Software required to flush link stack on context switch 87 87 #define SEC_FTR_FLUSH_LINK_STACK 0x0000000000001000ull 88 88 89 + // The L1-D cache should be flushed when entering the kernel 90 + #define SEC_FTR_L1D_FLUSH_ENTRY 0x0000000000004000ull 91 + 92 + // The L1-D cache should be flushed after user accesses from the kernel 93 + #define SEC_FTR_L1D_FLUSH_UACCESS 0x0000000000008000ull 89 94 90 95 // Features enabled by default 91 96 #define SEC_FTR_DEFAULT \ 92 97 (SEC_FTR_L1D_FLUSH_HV | \ 93 98 SEC_FTR_L1D_FLUSH_PR | \ 94 99 SEC_FTR_BNDS_CHK_SPEC_BAR | \ 100 + SEC_FTR_L1D_FLUSH_ENTRY | \ 101 + SEC_FTR_L1D_FLUSH_UACCESS | \ 95 102 SEC_FTR_FAVOUR_SECURITY) 96 103 97 104 #endif /* _ASM_POWERPC_SECURITY_FEATURES_H */
+4
arch/powerpc/include/asm/setup.h
··· 52 52 }; 53 53 54 54 void setup_rfi_flush(enum l1d_flush_type, bool enable); 55 + void setup_entry_flush(bool enable); 56 + void setup_uaccess_flush(bool enable); 55 57 void do_rfi_flush_fixups(enum l1d_flush_type types); 56 58 #ifdef CONFIG_PPC_BARRIER_NOSPEC 57 59 void setup_barrier_nospec(void); 58 60 #else 59 61 static inline void setup_barrier_nospec(void) { }; 60 62 #endif 63 + void do_uaccess_flush_fixups(enum l1d_flush_type types); 64 + void do_entry_flush_fixups(enum l1d_flush_type types); 61 65 void do_barrier_nospec_fixups(bool enable); 62 66 extern bool barrier_nospec_enabled; 63 67
+42 -38
arch/powerpc/kernel/exceptions-64s.S
··· 2951 2951 .endr 2952 2952 blr 2953 2953 2954 - TRAMP_REAL_BEGIN(rfi_flush_fallback) 2955 - SET_SCRATCH0(r13); 2956 - GET_PACA(r13); 2957 - std r1,PACA_EXRFI+EX_R12(r13) 2958 - ld r1,PACAKSAVE(r13) 2959 - std r9,PACA_EXRFI+EX_R9(r13) 2960 - std r10,PACA_EXRFI+EX_R10(r13) 2961 - std r11,PACA_EXRFI+EX_R11(r13) 2962 - mfctr r9 2954 + /* Clobbers r10, r11, ctr */ 2955 + .macro L1D_DISPLACEMENT_FLUSH 2963 2956 ld r10,PACA_RFI_FLUSH_FALLBACK_AREA(r13) 2964 2957 ld r11,PACA_L1D_FLUSH_SIZE(r13) 2965 2958 srdi r11,r11,(7 + 3) /* 128 byte lines, unrolled 8x */ ··· 2963 2970 sync 2964 2971 2965 2972 /* 2966 - * The load adresses are at staggered offsets within cachelines, 2973 + * The load addresses are at staggered offsets within cachelines, 2967 2974 * which suits some pipelines better (on others it should not 2968 2975 * hurt). 2969 2976 */ ··· 2978 2985 ld r11,(0x80 + 8)*7(r10) 2979 2986 addi r10,r10,0x80*8 2980 2987 bdnz 1b 2988 + .endm 2981 2989 2990 + TRAMP_REAL_BEGIN(entry_flush_fallback) 2991 + std r9,PACA_EXRFI+EX_R9(r13) 2992 + std r10,PACA_EXRFI+EX_R10(r13) 2993 + std r11,PACA_EXRFI+EX_R11(r13) 2994 + mfctr r9 2995 + L1D_DISPLACEMENT_FLUSH 2996 + mtctr r9 2997 + ld r9,PACA_EXRFI+EX_R9(r13) 2998 + ld r10,PACA_EXRFI+EX_R10(r13) 2999 + ld r11,PACA_EXRFI+EX_R11(r13) 3000 + blr 3001 + 3002 + TRAMP_REAL_BEGIN(rfi_flush_fallback) 3003 + SET_SCRATCH0(r13); 3004 + GET_PACA(r13); 3005 + std r1,PACA_EXRFI+EX_R12(r13) 3006 + ld r1,PACAKSAVE(r13) 3007 + std r9,PACA_EXRFI+EX_R9(r13) 3008 + std r10,PACA_EXRFI+EX_R10(r13) 3009 + std r11,PACA_EXRFI+EX_R11(r13) 3010 + mfctr r9 3011 + L1D_DISPLACEMENT_FLUSH 2982 3012 mtctr r9 2983 3013 ld r9,PACA_EXRFI+EX_R9(r13) 2984 3014 ld r10,PACA_EXRFI+EX_R10(r13) ··· 3019 3003 std r10,PACA_EXRFI+EX_R10(r13) 3020 3004 std r11,PACA_EXRFI+EX_R11(r13) 3021 3005 mfctr r9 3022 - ld r10,PACA_RFI_FLUSH_FALLBACK_AREA(r13) 3023 - ld r11,PACA_L1D_FLUSH_SIZE(r13) 3024 - srdi r11,r11,(7 + 3) /* 128 byte lines, unrolled 8x */ 3025 - mtctr r11 3026 - DCBT_BOOK3S_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */ 3027 - 3028 - /* order ld/st prior to dcbt stop all streams with flushing */ 3029 - sync 3030 - 3031 - /* 3032 - * The load adresses are at staggered offsets within cachelines, 3033 - * which suits some pipelines better (on others it should not 3034 - * hurt). 3035 - */ 3036 - 1: 3037 - ld r11,(0x80 + 8)*0(r10) 3038 - ld r11,(0x80 + 8)*1(r10) 3039 - ld r11,(0x80 + 8)*2(r10) 3040 - ld r11,(0x80 + 8)*3(r10) 3041 - ld r11,(0x80 + 8)*4(r10) 3042 - ld r11,(0x80 + 8)*5(r10) 3043 - ld r11,(0x80 + 8)*6(r10) 3044 - ld r11,(0x80 + 8)*7(r10) 3045 - addi r10,r10,0x80*8 3046 - bdnz 1b 3047 - 3006 + L1D_DISPLACEMENT_FLUSH 3048 3007 mtctr r9 3049 3008 ld r9,PACA_EXRFI+EX_R9(r13) 3050 3009 ld r10,PACA_EXRFI+EX_R10(r13) ··· 3070 3079 RFSCV 3071 3080 3072 3081 USE_TEXT_SECTION() 3073 - MASKED_INTERRUPT 3074 - MASKED_INTERRUPT hsrr=1 3082 + 3083 + _GLOBAL(do_uaccess_flush) 3084 + UACCESS_FLUSH_FIXUP_SECTION 3085 + nop 3086 + nop 3087 + nop 3088 + blr 3089 + L1D_DISPLACEMENT_FLUSH 3090 + blr 3091 + _ASM_NOKPROBE_SYMBOL(do_uaccess_flush) 3092 + EXPORT_SYMBOL(do_uaccess_flush) 3093 + 3094 + 3095 + MASKED_INTERRUPT 3096 + MASKED_INTERRUPT hsrr=1 3075 3097 3076 3098 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 3077 3099 kvmppc_skip_interrupt:
+121 -1
arch/powerpc/kernel/setup_64.c
··· 945 945 static enum l1d_flush_type enabled_flush_types; 946 946 static void *l1d_flush_fallback_area; 947 947 static bool no_rfi_flush; 948 + static bool no_entry_flush; 949 + static bool no_uaccess_flush; 948 950 bool rfi_flush; 951 + bool entry_flush; 952 + bool uaccess_flush; 953 + DEFINE_STATIC_KEY_FALSE(uaccess_flush_key); 954 + EXPORT_SYMBOL(uaccess_flush_key); 949 955 950 956 static int __init handle_no_rfi_flush(char *p) 951 957 { ··· 960 954 return 0; 961 955 } 962 956 early_param("no_rfi_flush", handle_no_rfi_flush); 957 + 958 + static int __init handle_no_entry_flush(char *p) 959 + { 960 + pr_info("entry-flush: disabled on command line."); 961 + no_entry_flush = true; 962 + return 0; 963 + } 964 + early_param("no_entry_flush", handle_no_entry_flush); 965 + 966 + static int __init handle_no_uaccess_flush(char *p) 967 + { 968 + pr_info("uaccess-flush: disabled on command line."); 969 + no_uaccess_flush = true; 970 + return 0; 971 + } 972 + early_param("no_uaccess_flush", handle_no_uaccess_flush); 963 973 964 974 /* 965 975 * The RFI flush is not KPTI, but because users will see doco that says to use ··· 1006 984 do_rfi_flush_fixups(L1D_FLUSH_NONE); 1007 985 1008 986 rfi_flush = enable; 987 + } 988 + 989 + void entry_flush_enable(bool enable) 990 + { 991 + if (enable) { 992 + do_entry_flush_fixups(enabled_flush_types); 993 + on_each_cpu(do_nothing, NULL, 1); 994 + } else { 995 + do_entry_flush_fixups(L1D_FLUSH_NONE); 996 + } 997 + 998 + entry_flush = enable; 999 + } 1000 + 1001 + void uaccess_flush_enable(bool enable) 1002 + { 1003 + if (enable) { 1004 + do_uaccess_flush_fixups(enabled_flush_types); 1005 + static_branch_enable(&uaccess_flush_key); 1006 + on_each_cpu(do_nothing, NULL, 1); 1007 + } else { 1008 + static_branch_disable(&uaccess_flush_key); 1009 + do_uaccess_flush_fixups(L1D_FLUSH_NONE); 1010 + } 1011 + 1012 + uaccess_flush = enable; 1009 1013 } 1010 1014 1011 1015 static void __ref init_fallback_flush(void) ··· 1092 1044 1093 1045 enabled_flush_types = types; 1094 1046 1095 - if (!no_rfi_flush && !cpu_mitigations_off()) 1047 + if (!cpu_mitigations_off() && !no_rfi_flush) 1096 1048 rfi_flush_enable(enable); 1049 + } 1050 + 1051 + void setup_entry_flush(bool enable) 1052 + { 1053 + if (cpu_mitigations_off()) 1054 + return; 1055 + 1056 + if (!no_entry_flush) 1057 + entry_flush_enable(enable); 1058 + } 1059 + 1060 + void setup_uaccess_flush(bool enable) 1061 + { 1062 + if (cpu_mitigations_off()) 1063 + return; 1064 + 1065 + if (!no_uaccess_flush) 1066 + uaccess_flush_enable(enable); 1097 1067 } 1098 1068 1099 1069 #ifdef CONFIG_DEBUG_FS ··· 1141 1075 1142 1076 DEFINE_SIMPLE_ATTRIBUTE(fops_rfi_flush, rfi_flush_get, rfi_flush_set, "%llu\n"); 1143 1077 1078 + static int entry_flush_set(void *data, u64 val) 1079 + { 1080 + bool enable; 1081 + 1082 + if (val == 1) 1083 + enable = true; 1084 + else if (val == 0) 1085 + enable = false; 1086 + else 1087 + return -EINVAL; 1088 + 1089 + /* Only do anything if we're changing state */ 1090 + if (enable != entry_flush) 1091 + entry_flush_enable(enable); 1092 + 1093 + return 0; 1094 + } 1095 + 1096 + static int entry_flush_get(void *data, u64 *val) 1097 + { 1098 + *val = entry_flush ? 1 : 0; 1099 + return 0; 1100 + } 1101 + 1102 + DEFINE_SIMPLE_ATTRIBUTE(fops_entry_flush, entry_flush_get, entry_flush_set, "%llu\n"); 1103 + 1104 + static int uaccess_flush_set(void *data, u64 val) 1105 + { 1106 + bool enable; 1107 + 1108 + if (val == 1) 1109 + enable = true; 1110 + else if (val == 0) 1111 + enable = false; 1112 + else 1113 + return -EINVAL; 1114 + 1115 + /* Only do anything if we're changing state */ 1116 + if (enable != uaccess_flush) 1117 + uaccess_flush_enable(enable); 1118 + 1119 + return 0; 1120 + } 1121 + 1122 + static int uaccess_flush_get(void *data, u64 *val) 1123 + { 1124 + *val = uaccess_flush ? 1 : 0; 1125 + return 0; 1126 + } 1127 + 1128 + DEFINE_SIMPLE_ATTRIBUTE(fops_uaccess_flush, uaccess_flush_get, uaccess_flush_set, "%llu\n"); 1129 + 1144 1130 static __init int rfi_flush_debugfs_init(void) 1145 1131 { 1146 1132 debugfs_create_file("rfi_flush", 0600, powerpc_debugfs_root, NULL, &fops_rfi_flush); 1133 + debugfs_create_file("entry_flush", 0600, powerpc_debugfs_root, NULL, &fops_entry_flush); 1134 + debugfs_create_file("uaccess_flush", 0600, powerpc_debugfs_root, NULL, &fops_uaccess_flush); 1147 1135 return 0; 1148 1136 } 1149 1137 device_initcall(rfi_flush_debugfs_init);
+1 -1
arch/powerpc/kernel/syscall_64.c
··· 2 2 3 3 #include <linux/err.h> 4 4 #include <asm/asm-prototypes.h> 5 - #include <asm/book3s/64/kup-radix.h> 5 + #include <asm/kup.h> 6 6 #include <asm/cputime.h> 7 7 #include <asm/hw_irq.h> 8 8 #include <asm/kprobes.h>
+14
arch/powerpc/kernel/vmlinux.lds.S
··· 132 132 } 133 133 134 134 . = ALIGN(8); 135 + __uaccess_flush_fixup : AT(ADDR(__uaccess_flush_fixup) - LOAD_OFFSET) { 136 + __start___uaccess_flush_fixup = .; 137 + *(__uaccess_flush_fixup) 138 + __stop___uaccess_flush_fixup = .; 139 + } 140 + 141 + . = ALIGN(8); 142 + __entry_flush_fixup : AT(ADDR(__entry_flush_fixup) - LOAD_OFFSET) { 143 + __start___entry_flush_fixup = .; 144 + *(__entry_flush_fixup) 145 + __stop___entry_flush_fixup = .; 146 + } 147 + 148 + . = ALIGN(8); 135 149 __stf_exit_barrier_fixup : AT(ADDR(__stf_exit_barrier_fixup) - LOAD_OFFSET) { 136 150 __start___stf_exit_barrier_fixup = .; 137 151 *(__stf_exit_barrier_fixup)
+104
arch/powerpc/lib/feature-fixups.c
··· 234 234 do_stf_exit_barrier_fixups(types); 235 235 } 236 236 237 + void do_uaccess_flush_fixups(enum l1d_flush_type types) 238 + { 239 + unsigned int instrs[4], *dest; 240 + long *start, *end; 241 + int i; 242 + 243 + start = PTRRELOC(&__start___uaccess_flush_fixup); 244 + end = PTRRELOC(&__stop___uaccess_flush_fixup); 245 + 246 + instrs[0] = 0x60000000; /* nop */ 247 + instrs[1] = 0x60000000; /* nop */ 248 + instrs[2] = 0x60000000; /* nop */ 249 + instrs[3] = 0x4e800020; /* blr */ 250 + 251 + i = 0; 252 + if (types == L1D_FLUSH_FALLBACK) { 253 + instrs[3] = 0x60000000; /* nop */ 254 + /* fallthrough to fallback flush */ 255 + } 256 + 257 + if (types & L1D_FLUSH_ORI) { 258 + instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */ 259 + instrs[i++] = 0x63de0000; /* ori 30,30,0 L1d flush*/ 260 + } 261 + 262 + if (types & L1D_FLUSH_MTTRIG) 263 + instrs[i++] = 0x7c12dba6; /* mtspr TRIG2,r0 (SPR #882) */ 264 + 265 + for (i = 0; start < end; start++, i++) { 266 + dest = (void *)start + *start; 267 + 268 + pr_devel("patching dest %lx\n", (unsigned long)dest); 269 + 270 + patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0])); 271 + 272 + patch_instruction((struct ppc_inst *)(dest + 1), ppc_inst(instrs[1])); 273 + patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2])); 274 + patch_instruction((struct ppc_inst *)(dest + 3), ppc_inst(instrs[3])); 275 + } 276 + 277 + printk(KERN_DEBUG "uaccess-flush: patched %d locations (%s flush)\n", i, 278 + (types == L1D_FLUSH_NONE) ? "no" : 279 + (types == L1D_FLUSH_FALLBACK) ? "fallback displacement" : 280 + (types & L1D_FLUSH_ORI) ? (types & L1D_FLUSH_MTTRIG) 281 + ? "ori+mttrig type" 282 + : "ori type" : 283 + (types & L1D_FLUSH_MTTRIG) ? "mttrig type" 284 + : "unknown"); 285 + } 286 + 287 + void do_entry_flush_fixups(enum l1d_flush_type types) 288 + { 289 + unsigned int instrs[3], *dest; 290 + long *start, *end; 291 + int i; 292 + 293 + start = PTRRELOC(&__start___entry_flush_fixup); 294 + end = PTRRELOC(&__stop___entry_flush_fixup); 295 + 296 + instrs[0] = 0x60000000; /* nop */ 297 + instrs[1] = 0x60000000; /* nop */ 298 + instrs[2] = 0x60000000; /* nop */ 299 + 300 + i = 0; 301 + if (types == L1D_FLUSH_FALLBACK) { 302 + instrs[i++] = 0x7d4802a6; /* mflr r10 */ 303 + instrs[i++] = 0x60000000; /* branch patched below */ 304 + instrs[i++] = 0x7d4803a6; /* mtlr r10 */ 305 + } 306 + 307 + if (types & L1D_FLUSH_ORI) { 308 + instrs[i++] = 0x63ff0000; /* ori 31,31,0 speculation barrier */ 309 + instrs[i++] = 0x63de0000; /* ori 30,30,0 L1d flush*/ 310 + } 311 + 312 + if (types & L1D_FLUSH_MTTRIG) 313 + instrs[i++] = 0x7c12dba6; /* mtspr TRIG2,r0 (SPR #882) */ 314 + 315 + for (i = 0; start < end; start++, i++) { 316 + dest = (void *)start + *start; 317 + 318 + pr_devel("patching dest %lx\n", (unsigned long)dest); 319 + 320 + patch_instruction((struct ppc_inst *)dest, ppc_inst(instrs[0])); 321 + 322 + if (types == L1D_FLUSH_FALLBACK) 323 + patch_branch((struct ppc_inst *)(dest + 1), (unsigned long)&entry_flush_fallback, 324 + BRANCH_SET_LINK); 325 + else 326 + patch_instruction((struct ppc_inst *)(dest + 1), ppc_inst(instrs[1])); 327 + 328 + patch_instruction((struct ppc_inst *)(dest + 2), ppc_inst(instrs[2])); 329 + } 330 + 331 + printk(KERN_DEBUG "entry-flush: patched %d locations (%s flush)\n", i, 332 + (types == L1D_FLUSH_NONE) ? "no" : 333 + (types == L1D_FLUSH_FALLBACK) ? "fallback displacement" : 334 + (types & L1D_FLUSH_ORI) ? (types & L1D_FLUSH_MTTRIG) 335 + ? "ori+mttrig type" 336 + : "ori type" : 337 + (types & L1D_FLUSH_MTTRIG) ? "mttrig type" 338 + : "unknown"); 339 + } 340 + 237 341 void do_rfi_flush_fixups(enum l1d_flush_type types) 238 342 { 239 343 unsigned int instrs[3], *dest;
+1 -1
arch/powerpc/perf/imc-pmu.c
··· 1336 1336 /* If this is a valid record, create the sample */ 1337 1337 struct perf_output_handle handle; 1338 1338 1339 - if (perf_output_begin(&handle, event, header.size)) 1339 + if (perf_output_begin(&handle, &data, event, header.size)) 1340 1340 return; 1341 1341 1342 1342 perf_output_sample(&handle, &header, &data, event);
+1 -2
arch/powerpc/perf/perf_regs.c
··· 144 144 } 145 145 146 146 void perf_get_regs_user(struct perf_regs *regs_user, 147 - struct pt_regs *regs, 148 - struct pt_regs *regs_user_copy) 147 + struct pt_regs *regs) 149 148 { 150 149 regs_user->regs = task_pt_regs(current); 151 150 regs_user->abi = (regs_user->regs) ? perf_reg_abi(current) :
+21 -3
arch/powerpc/platforms/powernv/setup.c
··· 98 98 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 99 99 } 100 100 101 - static void pnv_setup_rfi_flush(void) 101 + static void pnv_setup_security_mitigations(void) 102 102 { 103 103 struct device_node *np, *fw_features; 104 104 enum l1d_flush_type type; ··· 122 122 type = L1D_FLUSH_ORI; 123 123 } 124 124 125 + /* 126 + * If we are non-Power9 bare metal, we don't need to flush on kernel 127 + * entry or after user access: they fix a P9 specific vulnerability. 128 + */ 129 + if (!pvr_version_is(PVR_POWER9)) { 130 + security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY); 131 + security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS); 132 + } 133 + 125 134 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \ 126 135 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) || \ 127 136 security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV)); 128 137 129 138 setup_rfi_flush(type, enable); 130 139 setup_count_cache_flush(); 140 + 141 + enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 142 + security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); 143 + setup_entry_flush(enable); 144 + 145 + enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 146 + security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); 147 + setup_uaccess_flush(enable); 148 + 149 + setup_stf_barrier(); 131 150 } 132 151 133 152 static void __init pnv_check_guarded_cores(void) ··· 175 156 { 176 157 set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT); 177 158 178 - pnv_setup_rfi_flush(); 179 - setup_stf_barrier(); 159 + pnv_setup_security_mitigations(); 180 160 181 161 /* Initialize SMP */ 182 162 pnv_smp_init();
+2 -2
arch/powerpc/platforms/pseries/mobility.c
··· 349 349 350 350 cpus_read_unlock(); 351 351 352 - /* Possibly switch to a new RFI flush type */ 353 - pseries_setup_rfi_flush(); 352 + /* Possibly switch to a new L1 flush type */ 353 + pseries_setup_security_mitigations(); 354 354 355 355 /* Reinitialise system information for hv-24x7 */ 356 356 read_24x7_sys_info();
+1 -1
arch/powerpc/platforms/pseries/pseries.h
··· 111 111 112 112 int dlpar_workqueue_init(void); 113 113 114 - void pseries_setup_rfi_flush(void); 114 + void pseries_setup_security_mitigations(void); 115 115 void pseries_lpar_read_hblkrm_characteristics(void); 116 116 117 117 #endif /* _PSERIES_PSERIES_H */
+12 -3
arch/powerpc/platforms/pseries/setup.c
··· 542 542 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR); 543 543 } 544 544 545 - void pseries_setup_rfi_flush(void) 545 + void pseries_setup_security_mitigations(void) 546 546 { 547 547 struct h_cpu_char_result result; 548 548 enum l1d_flush_type types; ··· 579 579 580 580 setup_rfi_flush(types, enable); 581 581 setup_count_cache_flush(); 582 + 583 + enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 584 + security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY); 585 + setup_entry_flush(enable); 586 + 587 + enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && 588 + security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS); 589 + setup_uaccess_flush(enable); 590 + 591 + setup_stf_barrier(); 582 592 } 583 593 584 594 #ifdef CONFIG_PCI_IOV ··· 778 768 779 769 fwnmi_init(); 780 770 781 - pseries_setup_rfi_flush(); 782 - setup_stf_barrier(); 771 + pseries_setup_security_mitigations(); 783 772 pseries_lpar_read_hblkrm_characteristics(); 784 773 785 774 /* By default, only probe PCI (can be overridden by rtas_pci) */
+1 -2
arch/riscv/kernel/perf_regs.c
··· 36 36 } 37 37 38 38 void perf_get_regs_user(struct perf_regs *regs_user, 39 - struct pt_regs *regs, 40 - struct pt_regs *regs_user_copy) 39 + struct pt_regs *regs) 41 40 { 42 41 regs_user->regs = task_pt_regs(current); 43 42 regs_user->abi = perf_reg_abi(current);
+1
arch/s390/configs/debug_defconfig
··· 1 + CONFIG_UAPI_HEADER_TEST=y 1 2 CONFIG_SYSVIPC=y 2 3 CONFIG_POSIX_MQUEUE=y 3 4 CONFIG_WATCH_QUEUE=y
+2
arch/s390/kernel/entry.S
··· 422 422 #endif 423 423 LOCKDEP_SYS_EXIT 424 424 .Lsysc_tif: 425 + DISABLE_INTS 425 426 TSTMSK __PT_FLAGS(%r11),_PIF_WORK 426 427 jnz .Lsysc_work 427 428 TSTMSK __TI_flags(%r12),_TIF_WORK ··· 445 444 # One of the work bits is on. Find out which one. 446 445 # 447 446 .Lsysc_work: 447 + ENABLE_INTS 448 448 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED 449 449 jo .Lsysc_reschedule 450 450 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
+2 -2
arch/s390/kernel/perf_cpum_sf.c
··· 672 672 rcu_read_lock(); 673 673 674 674 perf_prepare_sample(&header, data, event, regs); 675 - if (perf_output_begin(&handle, event, header.size)) 675 + if (perf_output_begin(&handle, data, event, header.size)) 676 676 goto out; 677 677 678 678 /* Update the process ID (see also kernel/events/core.c) */ ··· 2228 2228 } 2229 2229 2230 2230 arch_initcall(init_cpum_sampling_pmu); 2231 - core_param(cpum_sfb_size, CPUM_SF_MAX_SDB, sfb_size, 0640); 2231 + core_param(cpum_sfb_size, CPUM_SF_MAX_SDB, sfb_size, 0644);
+1 -2
arch/s390/kernel/perf_regs.c
··· 53 53 } 54 54 55 55 void perf_get_regs_user(struct perf_regs *regs_user, 56 - struct pt_regs *regs, 57 - struct pt_regs *regs_user_copy) 56 + struct pt_regs *regs) 58 57 { 59 58 /* 60 59 * Use the regs from the first interruption and let
+7 -1
arch/um/include/asm/pgalloc.h
··· 33 33 } while (0) 34 34 35 35 #ifdef CONFIG_3_LEVEL_PGTABLES 36 - #define __pmd_free_tlb(tlb,x, address) tlb_remove_page((tlb),virt_to_page(x)) 36 + 37 + #define __pmd_free_tlb(tlb, pmd, address) \ 38 + do { \ 39 + pgtable_pmd_page_dtor(virt_to_page(pmd)); \ 40 + tlb_remove_page((tlb),virt_to_page(pmd)); \ 41 + } while (0) \ 42 + 37 43 #endif 38 44 39 45 #endif
+11 -1
arch/x86/events/intel/core.c
··· 2630 2630 u64 pebs_enabled = cpuc->pebs_enabled; 2631 2631 2632 2632 handled++; 2633 - x86_pmu.drain_pebs(regs); 2633 + x86_pmu.drain_pebs(regs, &data); 2634 2634 status &= x86_pmu.intel_ctrl | GLOBAL_STATUS_TRACE_TOPAPMI; 2635 2635 2636 2636 /* ··· 4987 4987 4988 4988 x86_add_quirk(intel_arch_events_quirk); /* Install first, so it runs last */ 4989 4989 4990 + if (version >= 5) { 4991 + x86_pmu.intel_cap.anythread_deprecated = edx.split.anythread_deprecated; 4992 + if (x86_pmu.intel_cap.anythread_deprecated) 4993 + pr_cont(" AnyThread deprecated, "); 4994 + } 4995 + 4990 4996 /* 4991 4997 * Install the hw-cache-events table: 4992 4998 */ ··· 5517 5511 5518 5512 x86_pmu.intel_ctrl |= 5519 5513 ((1LL << x86_pmu.num_counters_fixed)-1) << INTEL_PMC_IDX_FIXED; 5514 + 5515 + /* AnyThread may be deprecated on arch perfmon v5 or later */ 5516 + if (x86_pmu.intel_cap.anythread_deprecated) 5517 + x86_pmu.format_attrs = intel_arch_formats_attr; 5520 5518 5521 5519 if (x86_pmu.event_constraints) { 5522 5520 /*
+28 -25
arch/x86/events/intel/ds.c
··· 642 642 rcu_read_lock(); 643 643 perf_prepare_sample(&header, &data, event, &regs); 644 644 645 - if (perf_output_begin(&handle, event, header.size * 646 - (top - base - skip))) 645 + if (perf_output_begin(&handle, &data, event, 646 + header.size * (top - base - skip))) 647 647 goto unlock; 648 648 649 649 for (at = base; at < top; at++) { ··· 670 670 671 671 static inline void intel_pmu_drain_pebs_buffer(void) 672 672 { 673 - x86_pmu.drain_pebs(NULL); 673 + struct perf_sample_data data; 674 + 675 + x86_pmu.drain_pebs(NULL, &data); 674 676 } 675 677 676 678 /* ··· 1721 1719 return 0; 1722 1720 } 1723 1721 1724 - static void __intel_pmu_pebs_event(struct perf_event *event, 1725 - struct pt_regs *iregs, 1726 - void *base, void *top, 1727 - int bit, int count, 1728 - void (*setup_sample)(struct perf_event *, 1729 - struct pt_regs *, 1730 - void *, 1731 - struct perf_sample_data *, 1732 - struct pt_regs *)) 1722 + static __always_inline void 1723 + __intel_pmu_pebs_event(struct perf_event *event, 1724 + struct pt_regs *iregs, 1725 + struct perf_sample_data *data, 1726 + void *base, void *top, 1727 + int bit, int count, 1728 + void (*setup_sample)(struct perf_event *, 1729 + struct pt_regs *, 1730 + void *, 1731 + struct perf_sample_data *, 1732 + struct pt_regs *)) 1733 1733 { 1734 1734 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); 1735 1735 struct hw_perf_event *hwc = &event->hw; 1736 - struct perf_sample_data data; 1737 1736 struct x86_perf_regs perf_regs; 1738 1737 struct pt_regs *regs = &perf_regs.regs; 1739 1738 void *at = get_next_pebs_record_by_bit(base, top, bit); 1740 - struct pt_regs dummy_iregs; 1739 + static struct pt_regs dummy_iregs; 1741 1740 1742 1741 if (hwc->flags & PERF_X86_EVENT_AUTO_RELOAD) { 1743 1742 /* ··· 1755 1752 iregs = &dummy_iregs; 1756 1753 1757 1754 while (count > 1) { 1758 - setup_sample(event, iregs, at, &data, regs); 1759 - perf_event_output(event, &data, regs); 1755 + setup_sample(event, iregs, at, data, regs); 1756 + perf_event_output(event, data, regs); 1760 1757 at += cpuc->pebs_record_size; 1761 1758 at = get_next_pebs_record_by_bit(at, top, bit); 1762 1759 count--; 1763 1760 } 1764 1761 1765 - setup_sample(event, iregs, at, &data, regs); 1762 + setup_sample(event, iregs, at, data, regs); 1766 1763 if (iregs == &dummy_iregs) { 1767 1764 /* 1768 1765 * The PEBS records may be drained in the non-overflow context, ··· 1770 1767 * last record the same as other PEBS records, and doesn't 1771 1768 * invoke the generic overflow handler. 1772 1769 */ 1773 - perf_event_output(event, &data, regs); 1770 + perf_event_output(event, data, regs); 1774 1771 } else { 1775 1772 /* 1776 1773 * All but the last records are processed. 1777 1774 * The last one is left to be able to call the overflow handler. 1778 1775 */ 1779 - if (perf_event_overflow(event, &data, regs)) 1776 + if (perf_event_overflow(event, data, regs)) 1780 1777 x86_pmu_stop(event, 0); 1781 1778 } 1782 1779 } 1783 1780 1784 - static void intel_pmu_drain_pebs_core(struct pt_regs *iregs) 1781 + static void intel_pmu_drain_pebs_core(struct pt_regs *iregs, struct perf_sample_data *data) 1785 1782 { 1786 1783 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); 1787 1784 struct debug_store *ds = cpuc->ds; ··· 1815 1812 return; 1816 1813 } 1817 1814 1818 - __intel_pmu_pebs_event(event, iregs, at, top, 0, n, 1815 + __intel_pmu_pebs_event(event, iregs, data, at, top, 0, n, 1819 1816 setup_pebs_fixed_sample_data); 1820 1817 } 1821 1818 ··· 1838 1835 } 1839 1836 } 1840 1837 1841 - static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs) 1838 + static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs, struct perf_sample_data *data) 1842 1839 { 1843 1840 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); 1844 1841 struct debug_store *ds = cpuc->ds; ··· 1945 1942 } 1946 1943 1947 1944 if (counts[bit]) { 1948 - __intel_pmu_pebs_event(event, iregs, base, 1945 + __intel_pmu_pebs_event(event, iregs, data, base, 1949 1946 top, bit, counts[bit], 1950 1947 setup_pebs_fixed_sample_data); 1951 1948 } 1952 1949 } 1953 1950 } 1954 1951 1955 - static void intel_pmu_drain_pebs_icl(struct pt_regs *iregs) 1952 + static void intel_pmu_drain_pebs_icl(struct pt_regs *iregs, struct perf_sample_data *data) 1956 1953 { 1957 1954 short counts[INTEL_PMC_IDX_FIXED + MAX_FIXED_PEBS_EVENTS] = {}; 1958 1955 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ··· 2000 1997 if (WARN_ON_ONCE(!event->attr.precise_ip)) 2001 1998 continue; 2002 1999 2003 - __intel_pmu_pebs_event(event, iregs, base, 2000 + __intel_pmu_pebs_event(event, iregs, data, base, 2004 2001 top, bit, counts[bit], 2005 2002 setup_pebs_adaptive_sample_data); 2006 2003 }
+1 -1
arch/x86/events/intel/uncore_snb.c
··· 475 475 static struct freerunning_counters snb_uncore_imc_freerunning[] = { 476 476 [SNB_PCI_UNCORE_IMC_DATA_READS] = { SNB_UNCORE_PCI_IMC_DATA_READS_BASE, 477 477 0x0, 0x0, 1, 32 }, 478 - [SNB_PCI_UNCORE_IMC_DATA_READS] = { SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE, 478 + [SNB_PCI_UNCORE_IMC_DATA_WRITES] = { SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE, 479 479 0x0, 0x0, 1, 32 }, 480 480 [SNB_PCI_UNCORE_IMC_GT_REQUESTS] = { SNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE, 481 481 0x0, 0x0, 1, 32 },
+2 -1
arch/x86/events/perf_event.h
··· 585 585 u64 pebs_baseline:1; 586 586 u64 perf_metrics:1; 587 587 u64 pebs_output_pt_available:1; 588 + u64 anythread_deprecated:1; 588 589 }; 589 590 u64 capabilities; 590 591 }; ··· 728 727 int pebs_record_size; 729 728 int pebs_buffer_size; 730 729 int max_pebs_events; 731 - void (*drain_pebs)(struct pt_regs *regs); 730 + void (*drain_pebs)(struct pt_regs *regs, struct perf_sample_data *data); 732 731 struct event_constraint *pebs_constraints; 733 732 void (*pebs_aliases)(struct perf_event *event); 734 733 unsigned long large_pebs_flags;
+1
arch/x86/include/asm/kvm_host.h
··· 639 639 int cpuid_nent; 640 640 struct kvm_cpuid_entry2 *cpuid_entries; 641 641 642 + unsigned long cr3_lm_rsvd_bits; 642 643 int maxphyaddr; 643 644 int max_tdp_level; 644 645
+3 -1
arch/x86/include/asm/perf_event.h
··· 137 137 struct { 138 138 unsigned int num_counters_fixed:5; 139 139 unsigned int bit_width_fixed:8; 140 - unsigned int reserved:19; 140 + unsigned int reserved1:2; 141 + unsigned int anythread_deprecated:1; 142 + unsigned int reserved2:16; 141 143 } split; 142 144 unsigned int full; 143 145 };
-10
arch/x86/include/asm/uv/uv.h
··· 2 2 #ifndef _ASM_X86_UV_UV_H 3 3 #define _ASM_X86_UV_UV_H 4 4 5 - #include <asm/tlbflush.h> 6 - 7 5 enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC}; 8 - 9 - struct cpumask; 10 - struct mm_struct; 11 - struct flush_tlb_info; 12 6 13 7 #ifdef CONFIG_X86_UV 14 8 #include <linux/efi.h> ··· 38 44 static inline int is_uv_hubbed(int uv) { return 0; } 39 45 static inline void uv_cpu_init(void) { } 40 46 static inline void uv_system_init(void) { } 41 - static inline const struct cpumask * 42 - uv_flush_tlb_others(const struct cpumask *cpumask, 43 - const struct flush_tlb_info *info) 44 - { return cpumask; } 45 47 46 48 #endif /* X86_UV */ 47 49
+3 -3
arch/x86/kernel/apic/x2apic_uv_x.c
··· 33 33 static int uv_node_id; 34 34 35 35 /* Unpack AT/OEM/TABLE ID's to be NULL terminated strings */ 36 - static u8 uv_archtype[UV_AT_SIZE]; 36 + static u8 uv_archtype[UV_AT_SIZE + 1]; 37 37 static u8 oem_id[ACPI_OEM_ID_SIZE + 1]; 38 38 static u8 oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1]; 39 39 ··· 320 320 321 321 if (n > 0 && n < sizeof(uv_ate->archtype)) { 322 322 pr_info("UV: UVarchtype received from BIOS\n"); 323 - uv_stringify(UV_AT_SIZE, uv_archtype, uv_ate->archtype); 323 + uv_stringify(sizeof(uv_archtype), uv_archtype, uv_ate->archtype); 324 324 return 1; 325 325 } 326 326 return 0; ··· 378 378 if (!early_get_arch_type()) 379 379 380 380 /* If not use OEM ID for UVarchtype */ 381 - uv_stringify(UV_AT_SIZE, uv_archtype, _oem_id); 381 + uv_stringify(sizeof(uv_archtype), uv_archtype, oem_id); 382 382 383 383 /* Check if not hubbed */ 384 384 if (strncmp(uv_archtype, "SGI", 3) != 0) {
+11 -4
arch/x86/kernel/perf_regs.c
··· 101 101 } 102 102 103 103 void perf_get_regs_user(struct perf_regs *regs_user, 104 - struct pt_regs *regs, 105 - struct pt_regs *regs_user_copy) 104 + struct pt_regs *regs) 106 105 { 107 106 regs_user->regs = task_pt_regs(current); 108 107 regs_user->abi = perf_reg_abi(current); ··· 128 129 return PERF_SAMPLE_REGS_ABI_64; 129 130 } 130 131 132 + static DEFINE_PER_CPU(struct pt_regs, nmi_user_regs); 133 + 131 134 void perf_get_regs_user(struct perf_regs *regs_user, 132 - struct pt_regs *regs, 133 - struct pt_regs *regs_user_copy) 135 + struct pt_regs *regs) 134 136 { 137 + struct pt_regs *regs_user_copy = this_cpu_ptr(&nmi_user_regs); 135 138 struct pt_regs *user_regs = task_pt_regs(current); 139 + 140 + if (!in_nmi()) { 141 + regs_user->regs = user_regs; 142 + regs_user->abi = perf_reg_abi(current); 143 + return; 144 + } 136 145 137 146 /* 138 147 * If we're in an NMI that interrupted task_pt_regs setup, then
+5 -1
arch/x86/kvm/cpuid.c
··· 178 178 vcpu->arch.cr4_guest_rsvd_bits = 179 179 __cr4_reserved_bits(guest_cpuid_has, vcpu); 180 180 181 + vcpu->arch.cr3_lm_rsvd_bits = rsvd_bits(cpuid_maxphyaddr(vcpu), 63); 182 + 181 183 /* Invoke the vendor callback only after the above state is updated. */ 182 184 kvm_x86_ops.vcpu_after_set_cpuid(vcpu); 183 185 } ··· 683 681 684 682 edx.split.num_counters_fixed = min(cap.num_counters_fixed, MAX_FIXED_COUNTERS); 685 683 edx.split.bit_width_fixed = cap.bit_width_fixed; 686 - edx.split.reserved = 0; 684 + edx.split.anythread_deprecated = 1; 685 + edx.split.reserved1 = 0; 686 + edx.split.reserved2 = 0; 687 687 688 688 entry->eax = eax.full; 689 689 entry->ebx = cap.events_mask;
+7 -1
arch/x86/kvm/emulate.c
··· 4046 4046 return X86EMUL_CONTINUE; 4047 4047 } 4048 4048 4049 + static int em_clflushopt(struct x86_emulate_ctxt *ctxt) 4050 + { 4051 + /* emulating clflushopt regardless of cpuid */ 4052 + return X86EMUL_CONTINUE; 4053 + } 4054 + 4049 4055 static int em_movsxd(struct x86_emulate_ctxt *ctxt) 4050 4056 { 4051 4057 ctxt->dst.val = (s32) ctxt->src.val; ··· 4591 4585 }; 4592 4586 4593 4587 static const struct gprefix pfx_0f_ae_7 = { 4594 - I(SrcMem | ByteOp, em_clflush), N, N, N, 4588 + I(SrcMem | ByteOp, em_clflush), I(SrcMem | ByteOp, em_clflushopt), N, N, 4595 4589 }; 4596 4590 4597 4591 static const struct group_dual group15 = { {
+7
arch/x86/kvm/mmu/tdp_mmu.c
··· 49 49 { 50 50 struct kvm_mmu_page *sp; 51 51 52 + if (!kvm->arch.tdp_mmu_enabled) 53 + return false; 54 + if (WARN_ON(!VALID_PAGE(hpa))) 55 + return false; 56 + 52 57 sp = to_shadow_page(hpa); 58 + if (WARN_ON(!sp)) 59 + return false; 53 60 54 61 return sp->tdp_mmu_page && sp->root_count; 55 62 }
+8
arch/x86/kvm/svm/svm.c
··· 3741 3741 static void svm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) 3742 3742 { 3743 3743 struct vcpu_svm *svm = to_svm(vcpu); 3744 + struct kvm_cpuid_entry2 *best; 3744 3745 3745 3746 vcpu->arch.xsaves_enabled = guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && 3746 3747 boot_cpu_has(X86_FEATURE_XSAVE) && ··· 3753 3752 3754 3753 /* Check again if INVPCID interception if required */ 3755 3754 svm_check_invpcid(svm); 3755 + 3756 + /* For sev guests, the memory encryption bit is not reserved in CR3. */ 3757 + if (sev_guest(vcpu->kvm)) { 3758 + best = kvm_find_cpuid_entry(vcpu, 0x8000001F, 0); 3759 + if (best) 3760 + vcpu->arch.cr3_lm_rsvd_bits &= ~(1UL << (best->ebx & 0x3f)); 3761 + } 3756 3762 3757 3763 if (!kvm_vcpu_apicv_active(vcpu)) 3758 3764 return;
+1 -1
arch/x86/kvm/x86.c
··· 1041 1041 } 1042 1042 1043 1043 if (is_long_mode(vcpu) && 1044 - (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63))) 1044 + (cr3 & vcpu->arch.cr3_lm_rsvd_bits)) 1045 1045 return 1; 1046 1046 else if (is_pae_paging(vcpu) && 1047 1047 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
+1 -1
arch/xtensa/include/asm/pgtable.h
··· 69 69 */ 70 70 #define VMALLOC_START (XCHAL_KSEG_CACHED_VADDR - 0x10000000) 71 71 #define VMALLOC_END (VMALLOC_START + 0x07FEFFFF) 72 - #define TLBTEMP_BASE_1 (VMALLOC_END + 1) 72 + #define TLBTEMP_BASE_1 (VMALLOC_START + 0x08000000) 73 73 #define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE) 74 74 #if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE 75 75 #define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE)
+1 -1
arch/xtensa/include/asm/uaccess.h
··· 302 302 return -EFAULT; 303 303 } 304 304 #else 305 - long strncpy_from_user(char *dst, const char *src, long count); 305 + long strncpy_from_user(char *dst, const char __user *src, long count); 306 306 #endif 307 307 308 308 /*
+14
arch/xtensa/mm/cache.c
··· 70 70 kvaddr = TLBTEMP_BASE_1 + 71 71 (page_to_phys(page) & DCACHE_ALIAS_MASK); 72 72 73 + preempt_disable(); 73 74 __invalidate_dcache_page_alias(kvaddr, 74 75 page_to_phys(page)); 76 + preempt_enable(); 75 77 } 76 78 } 77 79 } ··· 158 156 if (!alias && !mapping) 159 157 return; 160 158 159 + preempt_disable(); 161 160 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); 162 161 __flush_invalidate_dcache_page_alias(virt, phys); 163 162 ··· 169 166 170 167 if (mapping) 171 168 __invalidate_icache_page_alias(virt, phys); 169 + preempt_enable(); 172 170 } 173 171 174 172 /* There shouldn't be an entry in the cache for this page anymore. */ ··· 203 199 unsigned long phys = page_to_phys(pfn_to_page(pfn)); 204 200 unsigned long virt = TLBTEMP_BASE_1 + (address & DCACHE_ALIAS_MASK); 205 201 202 + preempt_disable(); 206 203 __flush_invalidate_dcache_page_alias(virt, phys); 207 204 __invalidate_icache_page_alias(virt, phys); 205 + preempt_enable(); 208 206 } 209 207 EXPORT_SYMBOL(local_flush_cache_page); 210 208 ··· 233 227 unsigned long phys = page_to_phys(page); 234 228 unsigned long tmp; 235 229 230 + preempt_disable(); 236 231 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); 237 232 __flush_invalidate_dcache_page_alias(tmp, phys); 238 233 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); 239 234 __flush_invalidate_dcache_page_alias(tmp, phys); 240 235 __invalidate_icache_page_alias(tmp, phys); 236 + preempt_enable(); 241 237 242 238 clear_bit(PG_arch_1, &page->flags); 243 239 } ··· 273 265 274 266 if (alias) { 275 267 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); 268 + preempt_disable(); 276 269 __flush_invalidate_dcache_page_alias(t, phys); 270 + preempt_enable(); 277 271 } 278 272 279 273 /* Copy data */ ··· 290 280 if (alias) { 291 281 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); 292 282 283 + preempt_disable(); 293 284 __flush_invalidate_dcache_range((unsigned long) dst, len); 294 285 if ((vma->vm_flags & VM_EXEC) != 0) 295 286 __invalidate_icache_page_alias(t, phys); 287 + preempt_enable(); 296 288 297 289 } else if ((vma->vm_flags & VM_EXEC) != 0) { 298 290 __flush_dcache_range((unsigned long)dst,len); ··· 316 304 317 305 if (alias) { 318 306 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); 307 + preempt_disable(); 319 308 __flush_invalidate_dcache_page_alias(t, phys); 309 + preempt_enable(); 320 310 } 321 311 322 312 memcpy(dst, src, len);
+4 -1
block/genhd.c
··· 49 49 * Set disk capacity and notify if the size is not currently 50 50 * zero and will not be set to zero 51 51 */ 52 - void set_capacity_revalidate_and_notify(struct gendisk *disk, sector_t size, 52 + bool set_capacity_revalidate_and_notify(struct gendisk *disk, sector_t size, 53 53 bool update_bdev) 54 54 { 55 55 sector_t capacity = get_capacity(disk); ··· 62 62 char *envp[] = { "RESIZE=1", NULL }; 63 63 64 64 kobject_uevent_env(&disk_to_dev(disk)->kobj, KOBJ_CHANGE, envp); 65 + return true; 65 66 } 67 + 68 + return false; 66 69 } 67 70 68 71 EXPORT_SYMBOL_GPL(set_capacity_revalidate_and_notify);
-1
drivers/accessibility/speakup/main.c
··· 357 357 mark_cut_flag = 0; 358 358 synth_printf("%s\n", spk_msg_get(MSG_CUT)); 359 359 360 - speakup_clear_selection(); 361 360 ret = speakup_set_selection(tty); 362 361 363 362 switch (ret) {
+4 -7
drivers/accessibility/speakup/selection.c
··· 22 22 struct tty_struct *tty; 23 23 }; 24 24 25 - void speakup_clear_selection(void) 26 - { 27 - console_lock(); 28 - clear_selection(); 29 - console_unlock(); 30 - } 31 - 32 25 static void __speakup_set_selection(struct work_struct *work) 33 26 { 34 27 struct speakup_selection_work *ssw = ··· 43 50 pr_warn("Selection: mark console not the same as cut\n"); 44 51 goto unref; 45 52 } 53 + 54 + console_lock(); 55 + clear_selection(); 56 + console_unlock(); 46 57 47 58 set_selection_kernel(&sel, tty); 48 59
-1
drivers/accessibility/speakup/speakup.h
··· 70 70 void speakup_start_ttys(void); 71 71 void synth_buffer_add(u16 ch); 72 72 void synth_buffer_clear(void); 73 - void speakup_clear_selection(void); 74 73 int speakup_set_selection(struct tty_struct *tty); 75 74 void speakup_cancel_selection(void); 76 75 int speakup_paste_selection(struct tty_struct *tty);
+6 -4
drivers/accessibility/speakup/spk_ttyio.c
··· 298 298 struct spk_ldisc_data *ldisc_data = speakup_tty->disc_data; 299 299 char rv; 300 300 301 - if (wait_for_completion_timeout(&ldisc_data->completion, 301 + if (!timeout) { 302 + if (!try_wait_for_completion(&ldisc_data->completion)) 303 + return 0xff; 304 + } else if (wait_for_completion_timeout(&ldisc_data->completion, 302 305 usecs_to_jiffies(timeout)) == 0) { 303 - if (timeout) 304 - pr_warn("spk_ttyio: timeout (%d) while waiting for input\n", 305 - timeout); 306 + pr_warn("spk_ttyio: timeout (%d) while waiting for input\n", 307 + timeout); 306 308 return 0xff; 307 309 } 308 310
+6 -2
drivers/accessibility/speakup/spk_types.h
··· 32 32 E_NEW_DEFAULT, 33 33 }; 34 34 35 + /* 36 + * Note: add new members at the end, speakupmap.h depends on the values of the 37 + * enum starting from SPELL_DELAY (see inc_dec_var) 38 + */ 35 39 enum var_id_t { 36 40 VERSION = 0, SYNTH, SILENT, SYNTH_DIRECT, 37 41 KEYMAP, CHARS, ··· 46 42 SAY_CONTROL, SAY_WORD_CTL, NO_INTERRUPT, KEY_ECHO, 47 43 SPELL_DELAY, PUNC_LEVEL, READING_PUNC, 48 44 ATTRIB_BLEEP, BLEEPS, 49 - RATE, PITCH, INFLECTION, VOL, TONE, PUNCT, VOICE, FREQUENCY, LANG, 45 + RATE, PITCH, VOL, TONE, PUNCT, VOICE, FREQUENCY, LANG, 50 46 DIRECT, PAUSE, 51 - CAPS_START, CAPS_STOP, CHARTAB, 47 + CAPS_START, CAPS_STOP, CHARTAB, INFLECTION, 52 48 MAXVARS 53 49 }; 54 50
+4
drivers/acpi/apei/apei-base.c
··· 633 633 if (rc) 634 634 return rc; 635 635 636 + /* IO space doesn't need mapping */ 637 + if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) 638 + return 0; 639 + 636 640 if (!acpi_os_map_generic_address(reg)) 637 641 return -ENXIO; 638 642
+1
drivers/acpi/fan.c
··· 352 352 struct acpi_fan_fps *fps = &fan->fps[i]; 353 353 354 354 snprintf(fps->name, ACPI_FPS_NAME_LEN, "state%d", i); 355 + sysfs_attr_init(&fps->dev_attr.attr); 355 356 fps->dev_attr.show = show_state; 356 357 fps->dev_attr.store = NULL; 357 358 fps->dev_attr.attr.name = fps->name;
+2
drivers/atm/nicstar.c
··· 1708 1708 1709 1709 if (push_scqe(card, vc, scq, &scqe, skb, may_sleep) != 0) { 1710 1710 atomic_inc(&vcc->stats->tx_err); 1711 + dma_unmap_single(&card->pcidev->dev, NS_PRV_DMA(skb), skb->len, 1712 + DMA_TO_DEVICE); 1711 1713 dev_kfree_skb_any(skb); 1712 1714 return -EIO; 1713 1715 }
+2 -1
drivers/block/loop.c
··· 255 255 256 256 bd_set_nr_sectors(bdev, size); 257 257 258 - set_capacity_revalidate_and_notify(lo->lo_disk, size, false); 258 + if (!set_capacity_revalidate_and_notify(lo->lo_disk, size, false)) 259 + kobject_uevent(&disk_to_dev(bdev->bd_disk)->kobj, KOBJ_CHANGE); 259 260 } 260 261 261 262 static inline int
+1
drivers/block/nbd.c
··· 1518 1518 if (test_bit(NBD_RT_DISCONNECT_ON_CLOSE, &nbd->config->runtime_flags) && 1519 1519 bdev->bd_openers == 0) 1520 1520 nbd_disconnect_and_put(nbd); 1521 + bdput(bdev); 1521 1522 1522 1523 nbd_config_put(nbd); 1523 1524 nbd_put(nbd);
+4 -4
drivers/char/virtio_console.c
··· 435 435 /* 436 436 * Allocate DMA memory from ancestor. When a virtio 437 437 * device is created by remoteproc, the DMA memory is 438 - * associated with the grandparent device: 439 - * vdev => rproc => platform-dev. 438 + * associated with the parent device: 439 + * virtioY => remoteprocX#vdevYbuffer. 440 440 */ 441 - if (!vdev->dev.parent || !vdev->dev.parent->parent) 441 + buf->dev = vdev->dev.parent; 442 + if (!buf->dev) 442 443 goto free_buf; 443 - buf->dev = vdev->dev.parent->parent; 444 444 445 445 /* Increase device refcnt to avoid freeing it */ 446 446 get_device(buf->dev);
+5 -5
drivers/clk/imx/clk-imx8mm.c
··· 443 443 hws[IMX8MM_CLK_A53_CORE] = imx_clk_hw_mux2("arm_a53_core", base + 0x9880, 24, 1, imx8mm_a53_core_sels, ARRAY_SIZE(imx8mm_a53_core_sels)); 444 444 445 445 /* BUS */ 446 - hws[IMX8MM_CLK_MAIN_AXI] = imx8m_clk_hw_composite_critical("main_axi", imx8mm_main_axi_sels, base + 0x8800); 446 + hws[IMX8MM_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mm_main_axi_sels, base + 0x8800); 447 447 hws[IMX8MM_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mm_enet_axi_sels, base + 0x8880); 448 - hws[IMX8MM_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_critical("nand_usdhc_bus", imx8mm_nand_usdhc_sels, base + 0x8900); 448 + hws[IMX8MM_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus_critical("nand_usdhc_bus", imx8mm_nand_usdhc_sels, base + 0x8900); 449 449 hws[IMX8MM_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mm_vpu_bus_sels, base + 0x8980); 450 450 hws[IMX8MM_CLK_DISP_AXI] = imx8m_clk_hw_composite_bus("disp_axi", imx8mm_disp_axi_sels, base + 0x8a00); 451 451 hws[IMX8MM_CLK_DISP_APB] = imx8m_clk_hw_composite_bus("disp_apb", imx8mm_disp_apb_sels, base + 0x8a80); ··· 453 453 hws[IMX8MM_CLK_USB_BUS] = imx8m_clk_hw_composite_bus("usb_bus", imx8mm_usb_bus_sels, base + 0x8b80); 454 454 hws[IMX8MM_CLK_GPU_AXI] = imx8m_clk_hw_composite_bus("gpu_axi", imx8mm_gpu_axi_sels, base + 0x8c00); 455 455 hws[IMX8MM_CLK_GPU_AHB] = imx8m_clk_hw_composite_bus("gpu_ahb", imx8mm_gpu_ahb_sels, base + 0x8c80); 456 - hws[IMX8MM_CLK_NOC] = imx8m_clk_hw_composite_critical("noc", imx8mm_noc_sels, base + 0x8d00); 457 - hws[IMX8MM_CLK_NOC_APB] = imx8m_clk_hw_composite_critical("noc_apb", imx8mm_noc_apb_sels, base + 0x8d80); 456 + hws[IMX8MM_CLK_NOC] = imx8m_clk_hw_composite_bus_critical("noc", imx8mm_noc_sels, base + 0x8d00); 457 + hws[IMX8MM_CLK_NOC_APB] = imx8m_clk_hw_composite_bus_critical("noc_apb", imx8mm_noc_apb_sels, base + 0x8d80); 458 458 459 459 /* AHB */ 460 - hws[IMX8MM_CLK_AHB] = imx8m_clk_hw_composite_critical("ahb", imx8mm_ahb_sels, base + 0x9000); 460 + hws[IMX8MM_CLK_AHB] = imx8m_clk_hw_composite_bus_critical("ahb", imx8mm_ahb_sels, base + 0x9000); 461 461 hws[IMX8MM_CLK_AUDIO_AHB] = imx8m_clk_hw_composite_bus("audio_ahb", imx8mm_audio_ahb_sels, base + 0x9100); 462 462 463 463 /* IPG */
+3 -3
drivers/clk/imx/clk-imx8mn.c
··· 431 431 hws[IMX8MN_CLK_A53_CORE] = imx_clk_hw_mux2("arm_a53_core", base + 0x9880, 24, 1, imx8mn_a53_core_sels, ARRAY_SIZE(imx8mn_a53_core_sels)); 432 432 433 433 /* BUS */ 434 - hws[IMX8MN_CLK_MAIN_AXI] = imx8m_clk_hw_composite_critical("main_axi", imx8mn_main_axi_sels, base + 0x8800); 434 + hws[IMX8MN_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mn_main_axi_sels, base + 0x8800); 435 435 hws[IMX8MN_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mn_enet_axi_sels, base + 0x8880); 436 436 hws[IMX8MN_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus("nand_usdhc_bus", imx8mn_nand_usdhc_sels, base + 0x8900); 437 437 hws[IMX8MN_CLK_DISP_AXI] = imx8m_clk_hw_composite_bus("disp_axi", imx8mn_disp_axi_sels, base + 0x8a00); ··· 439 439 hws[IMX8MN_CLK_USB_BUS] = imx8m_clk_hw_composite_bus("usb_bus", imx8mn_usb_bus_sels, base + 0x8b80); 440 440 hws[IMX8MN_CLK_GPU_AXI] = imx8m_clk_hw_composite_bus("gpu_axi", imx8mn_gpu_axi_sels, base + 0x8c00); 441 441 hws[IMX8MN_CLK_GPU_AHB] = imx8m_clk_hw_composite_bus("gpu_ahb", imx8mn_gpu_ahb_sels, base + 0x8c80); 442 - hws[IMX8MN_CLK_NOC] = imx8m_clk_hw_composite_critical("noc", imx8mn_noc_sels, base + 0x8d00); 442 + hws[IMX8MN_CLK_NOC] = imx8m_clk_hw_composite_bus_critical("noc", imx8mn_noc_sels, base + 0x8d00); 443 443 444 - hws[IMX8MN_CLK_AHB] = imx8m_clk_hw_composite_critical("ahb", imx8mn_ahb_sels, base + 0x9000); 444 + hws[IMX8MN_CLK_AHB] = imx8m_clk_hw_composite_bus_critical("ahb", imx8mn_ahb_sels, base + 0x9000); 445 445 hws[IMX8MN_CLK_AUDIO_AHB] = imx8m_clk_hw_composite_bus("audio_ahb", imx8mn_audio_ahb_sels, base + 0x9100); 446 446 hws[IMX8MN_CLK_IPG_ROOT] = imx_clk_hw_divider2("ipg_root", "ahb", base + 0x9080, 0, 1); 447 447 hws[IMX8MN_CLK_IPG_AUDIO_ROOT] = imx_clk_hw_divider2("ipg_audio_root", "audio_ahb", base + 0x9180, 0, 1);
+5 -5
drivers/clk/imx/clk-imx8mp.c
··· 557 557 /* CORE SEL */ 558 558 hws[IMX8MP_CLK_A53_CORE] = imx_clk_hw_mux2("arm_a53_core", ccm_base + 0x9880, 24, 1, imx8mp_a53_core_sels, ARRAY_SIZE(imx8mp_a53_core_sels)); 559 559 560 - hws[IMX8MP_CLK_MAIN_AXI] = imx8m_clk_hw_composite_critical("main_axi", imx8mp_main_axi_sels, ccm_base + 0x8800); 560 + hws[IMX8MP_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mp_main_axi_sels, ccm_base + 0x8800); 561 561 hws[IMX8MP_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mp_enet_axi_sels, ccm_base + 0x8880); 562 - hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900); 562 + hws[IMX8MP_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus_critical("nand_usdhc_bus", imx8mp_nand_usdhc_sels, ccm_base + 0x8900); 563 563 hws[IMX8MP_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mp_vpu_bus_sels, ccm_base + 0x8980); 564 564 hws[IMX8MP_CLK_MEDIA_AXI] = imx8m_clk_hw_composite_bus("media_axi", imx8mp_media_axi_sels, ccm_base + 0x8a00); 565 565 hws[IMX8MP_CLK_MEDIA_APB] = imx8m_clk_hw_composite_bus("media_apb", imx8mp_media_apb_sels, ccm_base + 0x8a80); ··· 567 567 hws[IMX8MP_CLK_HDMI_AXI] = imx8m_clk_hw_composite_bus("hdmi_axi", imx8mp_media_axi_sels, ccm_base + 0x8b80); 568 568 hws[IMX8MP_CLK_GPU_AXI] = imx8m_clk_hw_composite_bus("gpu_axi", imx8mp_gpu_axi_sels, ccm_base + 0x8c00); 569 569 hws[IMX8MP_CLK_GPU_AHB] = imx8m_clk_hw_composite_bus("gpu_ahb", imx8mp_gpu_ahb_sels, ccm_base + 0x8c80); 570 - hws[IMX8MP_CLK_NOC] = imx8m_clk_hw_composite_critical("noc", imx8mp_noc_sels, ccm_base + 0x8d00); 571 - hws[IMX8MP_CLK_NOC_IO] = imx8m_clk_hw_composite_critical("noc_io", imx8mp_noc_io_sels, ccm_base + 0x8d80); 570 + hws[IMX8MP_CLK_NOC] = imx8m_clk_hw_composite_bus_critical("noc", imx8mp_noc_sels, ccm_base + 0x8d00); 571 + hws[IMX8MP_CLK_NOC_IO] = imx8m_clk_hw_composite_bus_critical("noc_io", imx8mp_noc_io_sels, ccm_base + 0x8d80); 572 572 hws[IMX8MP_CLK_ML_AXI] = imx8m_clk_hw_composite_bus("ml_axi", imx8mp_ml_axi_sels, ccm_base + 0x8e00); 573 573 hws[IMX8MP_CLK_ML_AHB] = imx8m_clk_hw_composite_bus("ml_ahb", imx8mp_ml_ahb_sels, ccm_base + 0x8e80); 574 574 575 - hws[IMX8MP_CLK_AHB] = imx8m_clk_hw_composite_critical("ahb_root", imx8mp_ahb_sels, ccm_base + 0x9000); 575 + hws[IMX8MP_CLK_AHB] = imx8m_clk_hw_composite_bus_critical("ahb_root", imx8mp_ahb_sels, ccm_base + 0x9000); 576 576 hws[IMX8MP_CLK_AUDIO_AHB] = imx8m_clk_hw_composite_bus("audio_ahb", imx8mp_audio_ahb_sels, ccm_base + 0x9100); 577 577 hws[IMX8MP_CLK_MIPI_DSI_ESC_RX] = imx8m_clk_hw_composite_bus("mipi_dsi_esc_rx", imx8mp_mipi_dsi_esc_rx_sels, ccm_base + 0x9200); 578 578
+4 -4
drivers/clk/imx/clk-imx8mq.c
··· 431 431 hws[IMX8MQ_CLK_A53_CORE] = imx_clk_hw_mux2("arm_a53_core", base + 0x9880, 24, 1, imx8mq_a53_core_sels, ARRAY_SIZE(imx8mq_a53_core_sels)); 432 432 433 433 /* BUS */ 434 - hws[IMX8MQ_CLK_MAIN_AXI] = imx8m_clk_hw_composite_critical("main_axi", imx8mq_main_axi_sels, base + 0x8800); 434 + hws[IMX8MQ_CLK_MAIN_AXI] = imx8m_clk_hw_composite_bus_critical("main_axi", imx8mq_main_axi_sels, base + 0x8800); 435 435 hws[IMX8MQ_CLK_ENET_AXI] = imx8m_clk_hw_composite_bus("enet_axi", imx8mq_enet_axi_sels, base + 0x8880); 436 436 hws[IMX8MQ_CLK_NAND_USDHC_BUS] = imx8m_clk_hw_composite_bus("nand_usdhc_bus", imx8mq_nand_usdhc_sels, base + 0x8900); 437 437 hws[IMX8MQ_CLK_VPU_BUS] = imx8m_clk_hw_composite_bus("vpu_bus", imx8mq_vpu_bus_sels, base + 0x8980); ··· 441 441 hws[IMX8MQ_CLK_USB_BUS] = imx8m_clk_hw_composite_bus("usb_bus", imx8mq_usb_bus_sels, base + 0x8b80); 442 442 hws[IMX8MQ_CLK_GPU_AXI] = imx8m_clk_hw_composite_bus("gpu_axi", imx8mq_gpu_axi_sels, base + 0x8c00); 443 443 hws[IMX8MQ_CLK_GPU_AHB] = imx8m_clk_hw_composite_bus("gpu_ahb", imx8mq_gpu_ahb_sels, base + 0x8c80); 444 - hws[IMX8MQ_CLK_NOC] = imx8m_clk_hw_composite_critical("noc", imx8mq_noc_sels, base + 0x8d00); 445 - hws[IMX8MQ_CLK_NOC_APB] = imx8m_clk_hw_composite_critical("noc_apb", imx8mq_noc_apb_sels, base + 0x8d80); 444 + hws[IMX8MQ_CLK_NOC] = imx8m_clk_hw_composite_bus_critical("noc", imx8mq_noc_sels, base + 0x8d00); 445 + hws[IMX8MQ_CLK_NOC_APB] = imx8m_clk_hw_composite_bus_critical("noc_apb", imx8mq_noc_apb_sels, base + 0x8d80); 446 446 447 447 /* AHB */ 448 448 /* AHB clock is used by the AHB bus therefore marked as critical */ 449 - hws[IMX8MQ_CLK_AHB] = imx8m_clk_hw_composite_critical("ahb", imx8mq_ahb_sels, base + 0x9000); 449 + hws[IMX8MQ_CLK_AHB] = imx8m_clk_hw_composite_bus_critical("ahb", imx8mq_ahb_sels, base + 0x9000); 450 450 hws[IMX8MQ_CLK_AUDIO_AHB] = imx8m_clk_hw_composite_bus("audio_ahb", imx8mq_audio_ahb_sels, base + 0x9100); 451 451 452 452 /* IPG */
+5
drivers/clk/imx/clk.h
··· 549 549 IMX_COMPOSITE_BUS, \ 550 550 CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE) 551 551 552 + #define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg) \ 553 + imx8m_clk_hw_composite_flags(name, parent_names, ARRAY_SIZE(parent_names), reg, \ 554 + IMX_COMPOSITE_BUS, \ 555 + CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE | CLK_IS_CRITICAL) 556 + 552 557 #define imx8m_clk_hw_composite_core(name, parent_names, reg) \ 553 558 imx8m_clk_hw_composite_flags(name, parent_names, \ 554 559 ARRAY_SIZE(parent_names), reg, \
+4 -1
drivers/clk/meson/clk-regmap.h
··· 26 26 void *data; 27 27 }; 28 28 29 - #define to_clk_regmap(_hw) container_of(_hw, struct clk_regmap, hw) 29 + static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw) 30 + { 31 + return container_of(hw, struct clk_regmap, hw); 32 + } 30 33 31 34 /** 32 35 * struct clk_regmap_gate_data - regmap backed gate specific data
+5 -1
drivers/clk/qcom/clk-regmap.h
··· 24 24 unsigned int enable_mask; 25 25 bool enable_is_inverted; 26 26 }; 27 - #define to_clk_regmap(_hw) container_of(_hw, struct clk_regmap, hw) 27 + 28 + static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw) 29 + { 30 + return container_of(hw, struct clk_regmap, hw); 31 + } 28 32 29 33 int clk_is_enabled_regmap(struct clk_hw *hw); 30 34 int clk_enable_regmap(struct clk_hw *hw);
+6
drivers/cpufreq/scmi-cpufreq.c
··· 8 8 9 9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 10 10 11 + #include <linux/clk-provider.h> 11 12 #include <linux/cpu.h> 12 13 #include <linux/cpufreq.h> 13 14 #include <linux/cpumask.h> ··· 229 228 static int scmi_cpufreq_probe(struct scmi_device *sdev) 230 229 { 231 230 int ret; 231 + struct device *dev = &sdev->dev; 232 232 233 233 handle = sdev->handle; 234 234 235 235 if (!handle || !handle->perf_ops) 236 236 return -ENODEV; 237 + 238 + /* dummy clock provider as needed by OPP if clocks property is used */ 239 + if (of_find_property(dev->of_node, "#clock-cells", NULL)) 240 + devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, NULL); 237 241 238 242 ret = cpufreq_register_driver(&scmi_cpufreq_driver); 239 243 if (ret) {
+21 -12
drivers/cpufreq/tegra186-cpufreq.c
··· 42 42 struct tegra186_cpufreq_cluster { 43 43 const struct tegra186_cpufreq_cluster_info *info; 44 44 struct cpufreq_frequency_table *table; 45 + u32 ref_clk_khz; 46 + u32 div; 45 47 }; 46 48 47 49 struct tegra186_cpufreq_data { ··· 96 94 97 95 static unsigned int tegra186_cpufreq_get(unsigned int cpu) 98 96 { 99 - struct cpufreq_frequency_table *tbl; 97 + struct tegra186_cpufreq_data *data = cpufreq_get_driver_data(); 100 98 struct cpufreq_policy *policy; 101 99 void __iomem *edvd_reg; 102 100 unsigned int i, freq = 0; ··· 106 104 if (!policy) 107 105 return 0; 108 106 109 - tbl = policy->freq_table; 110 107 edvd_reg = policy->driver_data; 111 108 ndiv = readl(edvd_reg) & EDVD_CORE_VOLT_FREQ_F_MASK; 112 109 113 - for (i = 0; tbl[i].frequency != CPUFREQ_TABLE_END; i++) { 114 - if ((tbl[i].driver_data & EDVD_CORE_VOLT_FREQ_F_MASK) == ndiv) { 115 - freq = tbl[i].frequency; 116 - break; 110 + for (i = 0; i < data->num_clusters; i++) { 111 + struct tegra186_cpufreq_cluster *cluster = &data->clusters[i]; 112 + int core; 113 + 114 + for (core = 0; core < ARRAY_SIZE(cluster->info->cpus); core++) { 115 + if (cluster->info->cpus[core] != policy->cpu) 116 + continue; 117 + 118 + freq = (cluster->ref_clk_khz * ndiv) / cluster->div; 119 + goto out; 117 120 } 118 121 } 119 122 123 + out: 120 124 cpufreq_cpu_put(policy); 121 125 122 126 return freq; ··· 141 133 142 134 static struct cpufreq_frequency_table *init_vhint_table( 143 135 struct platform_device *pdev, struct tegra_bpmp *bpmp, 144 - unsigned int cluster_id) 136 + struct tegra186_cpufreq_cluster *cluster) 145 137 { 146 138 struct cpufreq_frequency_table *table; 147 139 struct mrq_cpu_vhint_request req; ··· 160 152 161 153 memset(&req, 0, sizeof(req)); 162 154 req.addr = phys; 163 - req.cluster_id = cluster_id; 155 + req.cluster_id = cluster->info->bpmp_cluster_id; 164 156 165 157 memset(&msg, 0, sizeof(msg)); 166 158 msg.mrq = MRQ_CPU_VHINT; ··· 193 185 goto free; 194 186 } 195 187 188 + cluster->ref_clk_khz = data->ref_clk_hz / 1000; 189 + cluster->div = data->pdiv * data->mdiv; 190 + 196 191 for (i = data->vfloor, j = 0; i <= data->vceil; i++) { 197 192 struct cpufreq_frequency_table *point; 198 193 u16 ndiv = data->ndiv[i]; ··· 213 202 214 203 point = &table[j++]; 215 204 point->driver_data = edvd_val; 216 - point->frequency = data->ref_clk_hz * ndiv / data->pdiv / 217 - data->mdiv / 1000; 205 + point->frequency = (cluster->ref_clk_khz * ndiv) / cluster->div; 218 206 } 219 207 220 208 table[j].frequency = CPUFREQ_TABLE_END; ··· 255 245 struct tegra186_cpufreq_cluster *cluster = &data->clusters[i]; 256 246 257 247 cluster->info = &tegra186_clusters[i]; 258 - cluster->table = init_vhint_table( 259 - pdev, bpmp, cluster->info->bpmp_cluster_id); 248 + cluster->table = init_vhint_table(pdev, bpmp, cluster); 260 249 if (IS_ERR(cluster->table)) { 261 250 err = PTR_ERR(cluster->table); 262 251 goto put_bpmp;
+2 -2
drivers/cpuidle/cpuidle-tegra.c
··· 189 189 } 190 190 191 191 local_fiq_disable(); 192 - tegra_pm_set_cpu_in_lp2(); 192 + RCU_NONIDLE(tegra_pm_set_cpu_in_lp2()); 193 193 cpu_pm_enter(); 194 194 195 195 switch (index) { ··· 207 207 } 208 208 209 209 cpu_pm_exit(); 210 - tegra_pm_clear_cpu_in_lp2(); 210 + RCU_NONIDLE(tegra_pm_clear_cpu_in_lp2()); 211 211 local_fiq_enable(); 212 212 213 213 return err ?: index;
+3
drivers/firmware/xilinx/zynqmp.c
··· 147 147 return 0; 148 148 149 149 /* Return value if feature is already checked */ 150 + if (api_id > ARRAY_SIZE(zynqmp_pm_features)) 151 + return PM_FEATURE_INVALID; 152 + 150 153 if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED) 151 154 return zynqmp_pm_features[api_id]; 152 155
+1
drivers/gpio/gpio-aspeed.c
··· 1114 1114 1115 1115 static const struct aspeed_bank_props ast2600_bank_props[] = { 1116 1116 /* input output */ 1117 + {4, 0xffffffff, 0x00ffffff}, /* Q/R/S/T */ 1117 1118 {5, 0xffffffff, 0xffffff00}, /* U/V/W/X */ 1118 1119 {6, 0x0000ffff, 0x0000ffff}, /* Y/Z */ 1119 1120 { },
+2 -2
drivers/gpio/gpio-dwapb.c
··· 343 343 #ifdef CONFIG_PM_SLEEP 344 344 static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable) 345 345 { 346 - struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 347 - struct dwapb_gpio *gpio = igc->private; 346 + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 347 + struct dwapb_gpio *gpio = to_dwapb_gpio(gc); 348 348 struct dwapb_context *ctx = gpio->ports[0].ctx; 349 349 irq_hw_number_t bit = irqd_to_hwirq(d); 350 350
+11 -1
drivers/gpio/gpio-omap.c
··· 1114 1114 { 1115 1115 struct device *dev = bank->chip.parent; 1116 1116 void __iomem *base = bank->base; 1117 - u32 nowake; 1117 + u32 mask, nowake; 1118 1118 1119 1119 bank->saved_datain = readl_relaxed(base + bank->regs->datain); 1120 1120 1121 1121 if (!bank->enabled_non_wakeup_gpios) 1122 1122 goto update_gpio_context_count; 1123 + 1124 + /* Check for pending EDGE_FALLING, ignore EDGE_BOTH */ 1125 + mask = bank->enabled_non_wakeup_gpios & bank->context.fallingdetect; 1126 + mask &= ~bank->context.risingdetect; 1127 + bank->saved_datain |= mask; 1128 + 1129 + /* Check for pending EDGE_RISING, ignore EDGE_BOTH */ 1130 + mask = bank->enabled_non_wakeup_gpios & bank->context.risingdetect; 1131 + mask &= ~bank->context.fallingdetect; 1132 + bank->saved_datain &= ~mask; 1123 1133 1124 1134 if (!may_lose_context) 1125 1135 goto update_gpio_context_count;
+56 -6
drivers/gpio/gpio-pcie-idio-24.c
··· 28 28 #include <linux/spinlock.h> 29 29 #include <linux/types.h> 30 30 31 + /* 32 + * PLX PEX8311 PCI LCS_INTCSR Interrupt Control/Status 33 + * 34 + * Bit: Description 35 + * 0: Enable Interrupt Sources (Bit 0) 36 + * 1: Enable Interrupt Sources (Bit 1) 37 + * 2: Generate Internal PCI Bus Internal SERR# Interrupt 38 + * 3: Mailbox Interrupt Enable 39 + * 4: Power Management Interrupt Enable 40 + * 5: Power Management Interrupt 41 + * 6: Slave Read Local Data Parity Check Error Enable 42 + * 7: Slave Read Local Data Parity Check Error Status 43 + * 8: Internal PCI Wire Interrupt Enable 44 + * 9: PCI Express Doorbell Interrupt Enable 45 + * 10: PCI Abort Interrupt Enable 46 + * 11: Local Interrupt Input Enable 47 + * 12: Retry Abort Enable 48 + * 13: PCI Express Doorbell Interrupt Active 49 + * 14: PCI Abort Interrupt Active 50 + * 15: Local Interrupt Input Active 51 + * 16: Local Interrupt Output Enable 52 + * 17: Local Doorbell Interrupt Enable 53 + * 18: DMA Channel 0 Interrupt Enable 54 + * 19: DMA Channel 1 Interrupt Enable 55 + * 20: Local Doorbell Interrupt Active 56 + * 21: DMA Channel 0 Interrupt Active 57 + * 22: DMA Channel 1 Interrupt Active 58 + * 23: Built-In Self-Test (BIST) Interrupt Active 59 + * 24: Direct Master was the Bus Master during a Master or Target Abort 60 + * 25: DMA Channel 0 was the Bus Master during a Master or Target Abort 61 + * 26: DMA Channel 1 was the Bus Master during a Master or Target Abort 62 + * 27: Target Abort after internal 256 consecutive Master Retrys 63 + * 28: PCI Bus wrote data to LCS_MBOX0 64 + * 29: PCI Bus wrote data to LCS_MBOX1 65 + * 30: PCI Bus wrote data to LCS_MBOX2 66 + * 31: PCI Bus wrote data to LCS_MBOX3 67 + */ 68 + #define PLX_PEX8311_PCI_LCS_INTCSR 0x68 69 + #define INTCSR_INTERNAL_PCI_WIRE BIT(8) 70 + #define INTCSR_LOCAL_INPUT BIT(11) 71 + 31 72 /** 32 73 * struct idio_24_gpio_reg - GPIO device registers structure 33 74 * @out0_7: Read: FET Outputs 0-7 ··· 133 92 struct idio_24_gpio { 134 93 struct gpio_chip chip; 135 94 raw_spinlock_t lock; 95 + __u8 __iomem *plx; 136 96 struct idio_24_gpio_reg __iomem *reg; 137 97 unsigned long irq_mask; 138 98 }; ··· 376 334 unsigned long flags; 377 335 const unsigned long bit_offset = irqd_to_hwirq(data) - 24; 378 336 unsigned char new_irq_mask; 379 - const unsigned long bank_offset = bit_offset/8 * 8; 337 + const unsigned long bank_offset = bit_offset / 8; 380 338 unsigned char cos_enable_state; 381 339 382 340 raw_spin_lock_irqsave(&idio24gpio->lock, flags); 383 341 384 - idio24gpio->irq_mask &= BIT(bit_offset); 385 - new_irq_mask = idio24gpio->irq_mask >> bank_offset; 342 + idio24gpio->irq_mask &= ~BIT(bit_offset); 343 + new_irq_mask = idio24gpio->irq_mask >> bank_offset * 8; 386 344 387 345 if (!new_irq_mask) { 388 346 cos_enable_state = ioread8(&idio24gpio->reg->cos_enable); ··· 405 363 unsigned long flags; 406 364 unsigned char prev_irq_mask; 407 365 const unsigned long bit_offset = irqd_to_hwirq(data) - 24; 408 - const unsigned long bank_offset = bit_offset/8 * 8; 366 + const unsigned long bank_offset = bit_offset / 8; 409 367 unsigned char cos_enable_state; 410 368 411 369 raw_spin_lock_irqsave(&idio24gpio->lock, flags); 412 370 413 - prev_irq_mask = idio24gpio->irq_mask >> bank_offset; 371 + prev_irq_mask = idio24gpio->irq_mask >> bank_offset * 8; 414 372 idio24gpio->irq_mask |= BIT(bit_offset); 415 373 416 374 if (!prev_irq_mask) { ··· 497 455 struct device *const dev = &pdev->dev; 498 456 struct idio_24_gpio *idio24gpio; 499 457 int err; 458 + const size_t pci_plx_bar_index = 1; 500 459 const size_t pci_bar_index = 2; 501 460 const char *const name = pci_name(pdev); 502 461 struct gpio_irq_chip *girq; ··· 512 469 return err; 513 470 } 514 471 515 - err = pcim_iomap_regions(pdev, BIT(pci_bar_index), name); 472 + err = pcim_iomap_regions(pdev, BIT(pci_plx_bar_index) | BIT(pci_bar_index), name); 516 473 if (err) { 517 474 dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err); 518 475 return err; 519 476 } 520 477 478 + idio24gpio->plx = pcim_iomap_table(pdev)[pci_plx_bar_index]; 521 479 idio24gpio->reg = pcim_iomap_table(pdev)[pci_bar_index]; 522 480 523 481 idio24gpio->chip.label = name; ··· 548 504 549 505 /* Software board reset */ 550 506 iowrite8(0, &idio24gpio->reg->soft_reset); 507 + /* 508 + * enable PLX PEX8311 internal PCI wire interrupt and local interrupt 509 + * input 510 + */ 511 + iowrite8((INTCSR_INTERNAL_PCI_WIRE | INTCSR_LOCAL_INPUT) >> 8, 512 + idio24gpio->plx + PLX_PEX8311_PCI_LCS_INTCSR + 1); 551 513 552 514 err = devm_gpiochip_add_data(dev, &idio24gpio->chip, idio24gpio); 553 515 if (err) {
+1 -1
drivers/gpio/gpio-sifive.c
··· 183 183 return PTR_ERR(chip->regs); 184 184 185 185 ngpio = of_irq_count(node); 186 - if (ngpio >= SIFIVE_GPIO_MAX) { 186 + if (ngpio > SIFIVE_GPIO_MAX) { 187 187 dev_err(dev, "Too many GPIO interrupts (max=%d)\n", 188 188 SIFIVE_GPIO_MAX); 189 189 return -ENXIO;
-15
drivers/gpio/gpiolib-cdev.h
··· 7 7 8 8 struct gpio_device; 9 9 10 - #ifdef CONFIG_GPIO_CDEV 11 - 12 10 int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt); 13 11 void gpiolib_cdev_unregister(struct gpio_device *gdev); 14 - 15 - #else 16 - 17 - static inline int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt) 18 - { 19 - return 0; 20 - } 21 - 22 - static inline void gpiolib_cdev_unregister(struct gpio_device *gdev) 23 - { 24 - } 25 - 26 - #endif /* CONFIG_GPIO_CDEV */ 27 12 28 13 #endif /* GPIOLIB_CDEV_H */
+15 -3
drivers/gpio/gpiolib.c
··· 480 480 kfree(gdev); 481 481 } 482 482 483 + #ifdef CONFIG_GPIO_CDEV 484 + #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) 485 + #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) 486 + #else 487 + /* 488 + * gpiolib_cdev_register() indirectly calls device_add(), which is still 489 + * required even when cdev is not selected. 490 + */ 491 + #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) 492 + #define gcdev_unregister(gdev) device_del(&(gdev)->dev) 493 + #endif 494 + 483 495 static int gpiochip_setup_dev(struct gpio_device *gdev) 484 496 { 485 497 int ret; 486 498 487 - ret = gpiolib_cdev_register(gdev, gpio_devt); 499 + ret = gcdev_register(gdev, gpio_devt); 488 500 if (ret) 489 501 return ret; 490 502 ··· 512 500 return 0; 513 501 514 502 err_remove_device: 515 - gpiolib_cdev_unregister(gdev); 503 + gcdev_unregister(gdev); 516 504 return ret; 517 505 } 518 506 ··· 837 825 * be removed, else it will be dangling until the last user is 838 826 * gone. 839 827 */ 840 - gpiolib_cdev_unregister(gdev); 828 + gcdev_unregister(gdev); 841 829 put_device(&gdev->dev); 842 830 } 843 831 EXPORT_SYMBOL_GPL(gpiochip_remove);
+1 -2
drivers/gpu/drm/amd/amdgpu/nv.c
··· 492 492 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) 493 493 amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block); 494 494 #if defined(CONFIG_DRM_AMD_DC) 495 - else if (amdgpu_device_has_dc_support(adev) && 496 - !nv_is_headless_sku(adev->pdev)) 495 + else if (amdgpu_device_has_dc_support(adev)) 497 496 amdgpu_device_ip_block_add(adev, &dm_ip_block); 498 497 #endif 499 498 amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
+1
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
··· 40 40 MODULE_FIRMWARE("amdgpu/renoir_asd.bin"); 41 41 MODULE_FIRMWARE("amdgpu/renoir_ta.bin"); 42 42 MODULE_FIRMWARE("amdgpu/green_sardine_asd.bin"); 43 + MODULE_FIRMWARE("amdgpu/green_sardine_ta.bin"); 43 44 44 45 /* address block */ 45 46 #define smnMP1_FIRMWARE_FLAGS 0x3010024
+2 -2
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
··· 306 306 pflip_int_entry(1), 307 307 pflip_int_entry(2), 308 308 pflip_int_entry(3), 309 - [DC_IRQ_SOURCE_PFLIP5] = dummy_irq_entry(), 310 - [DC_IRQ_SOURCE_PFLIP6] = dummy_irq_entry(), 309 + pflip_int_entry(4), 310 + pflip_int_entry(5), 311 311 [DC_IRQ_SOURCE_PFLIP_UNDERLAY0] = dummy_irq_entry(), 312 312 gpio_pad_int_entry(0), 313 313 gpio_pad_int_entry(1),
+1 -1
drivers/gpu/drm/bridge/cadence/Kconfig
··· 13 13 if DRM_CDNS_MHDP8546 14 14 15 15 config DRM_CDNS_MHDP8546_J721E 16 - depends on ARCH_K3_J721E_SOC || COMPILE_TEST 16 + depends on ARCH_K3 || COMPILE_TEST 17 17 bool "J721E Cadence DPI/DP wrapper support" 18 18 default y 19 19 help
+12 -22
drivers/gpu/drm/gma500/psb_irq.c
··· 347 347 { 348 348 struct drm_psb_private *dev_priv = dev->dev_private; 349 349 unsigned long irqflags; 350 + unsigned int i; 350 351 351 352 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 352 353 ··· 360 359 PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R); 361 360 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 362 361 363 - if (dev->vblank[0].enabled) 364 - psb_enable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); 365 - else 366 - psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); 367 - 368 - if (dev->vblank[1].enabled) 369 - psb_enable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); 370 - else 371 - psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); 372 - 373 - if (dev->vblank[2].enabled) 374 - psb_enable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); 375 - else 376 - psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); 362 + for (i = 0; i < dev->num_crtcs; ++i) { 363 + if (dev->vblank[i].enabled) 364 + psb_enable_pipestat(dev_priv, i, PIPE_VBLANK_INTERRUPT_ENABLE); 365 + else 366 + psb_disable_pipestat(dev_priv, i, PIPE_VBLANK_INTERRUPT_ENABLE); 367 + } 377 368 378 369 if (dev_priv->ops->hotplug_enable) 379 370 dev_priv->ops->hotplug_enable(dev, true); ··· 378 385 { 379 386 struct drm_psb_private *dev_priv = dev->dev_private; 380 387 unsigned long irqflags; 388 + unsigned int i; 381 389 382 390 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags); 383 391 ··· 387 393 388 394 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM); 389 395 390 - if (dev->vblank[0].enabled) 391 - psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE); 392 - 393 - if (dev->vblank[1].enabled) 394 - psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE); 395 - 396 - if (dev->vblank[2].enabled) 397 - psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE); 396 + for (i = 0; i < dev->num_crtcs; ++i) { 397 + if (dev->vblank[i].enabled) 398 + psb_disable_pipestat(dev_priv, i, PIPE_VBLANK_INTERRUPT_ENABLE); 399 + } 398 400 399 401 dev_priv->vdc_irq_mask &= _PSB_IRQ_SGX_FLAG | 400 402 _PSB_IRQ_MSVDX_FLAG |
+2
drivers/gpu/drm/i915/gem/i915_gem_object_types.h
··· 56 56 void (*truncate)(struct drm_i915_gem_object *obj); 57 57 void (*writeback)(struct drm_i915_gem_object *obj); 58 58 59 + int (*pread)(struct drm_i915_gem_object *obj, 60 + const struct drm_i915_gem_pread *arg); 59 61 int (*pwrite)(struct drm_i915_gem_object *obj, 60 62 const struct drm_i915_gem_pwrite *arg); 61 63
+55
drivers/gpu/drm/i915/gem/i915_gem_phys.c
··· 134 134 vaddr, dma); 135 135 } 136 136 137 + static int 138 + phys_pwrite(struct drm_i915_gem_object *obj, 139 + const struct drm_i915_gem_pwrite *args) 140 + { 141 + void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; 142 + char __user *user_data = u64_to_user_ptr(args->data_ptr); 143 + int err; 144 + 145 + err = i915_gem_object_wait(obj, 146 + I915_WAIT_INTERRUPTIBLE | 147 + I915_WAIT_ALL, 148 + MAX_SCHEDULE_TIMEOUT); 149 + if (err) 150 + return err; 151 + 152 + /* 153 + * We manually control the domain here and pretend that it 154 + * remains coherent i.e. in the GTT domain, like shmem_pwrite. 155 + */ 156 + i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU); 157 + 158 + if (copy_from_user(vaddr, user_data, args->size)) 159 + return -EFAULT; 160 + 161 + drm_clflush_virt_range(vaddr, args->size); 162 + intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); 163 + 164 + i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); 165 + return 0; 166 + } 167 + 168 + static int 169 + phys_pread(struct drm_i915_gem_object *obj, 170 + const struct drm_i915_gem_pread *args) 171 + { 172 + void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; 173 + char __user *user_data = u64_to_user_ptr(args->data_ptr); 174 + int err; 175 + 176 + err = i915_gem_object_wait(obj, 177 + I915_WAIT_INTERRUPTIBLE, 178 + MAX_SCHEDULE_TIMEOUT); 179 + if (err) 180 + return err; 181 + 182 + drm_clflush_virt_range(vaddr, args->size); 183 + if (copy_to_user(user_data, vaddr, args->size)) 184 + return -EFAULT; 185 + 186 + return 0; 187 + } 188 + 137 189 static void phys_release(struct drm_i915_gem_object *obj) 138 190 { 139 191 fput(obj->base.filp); ··· 195 143 .name = "i915_gem_object_phys", 196 144 .get_pages = i915_gem_object_get_pages_phys, 197 145 .put_pages = i915_gem_object_put_pages_phys, 146 + 147 + .pread = phys_pread, 148 + .pwrite = phys_pwrite, 198 149 199 150 .release = phys_release, 200 151 };
+2 -1
drivers/gpu/drm/i915/gt/intel_engine_cs.c
··· 371 371 * instances. 372 372 */ 373 373 if ((INTEL_GEN(i915) >= 11 && 374 - engine->gt->info.vdbox_sfc_access & engine->mask) || 374 + (engine->gt->info.vdbox_sfc_access & 375 + BIT(engine->instance))) || 375 376 (INTEL_GEN(i915) >= 9 && engine->instance == 0)) 376 377 engine->uabi_capabilities |= 377 378 I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC;
+6 -26
drivers/gpu/drm/i915/i915_gem.c
··· 180 180 } 181 181 182 182 static int 183 - i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, 184 - struct drm_i915_gem_pwrite *args, 185 - struct drm_file *file) 186 - { 187 - void *vaddr = sg_page(obj->mm.pages->sgl) + args->offset; 188 - char __user *user_data = u64_to_user_ptr(args->data_ptr); 189 - 190 - /* 191 - * We manually control the domain here and pretend that it 192 - * remains coherent i.e. in the GTT domain, like shmem_pwrite. 193 - */ 194 - i915_gem_object_invalidate_frontbuffer(obj, ORIGIN_CPU); 195 - 196 - if (copy_from_user(vaddr, user_data, args->size)) 197 - return -EFAULT; 198 - 199 - drm_clflush_virt_range(vaddr, args->size); 200 - intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt); 201 - 202 - i915_gem_object_flush_frontbuffer(obj, ORIGIN_CPU); 203 - return 0; 204 - } 205 - 206 - static int 207 183 i915_gem_create(struct drm_file *file, 208 184 struct intel_memory_region *mr, 209 185 u64 *size_p, ··· 502 526 } 503 527 504 528 trace_i915_gem_object_pread(obj, args->offset, args->size); 529 + 530 + ret = -ENODEV; 531 + if (obj->ops->pread) 532 + ret = obj->ops->pread(obj, args); 533 + if (ret != -ENODEV) 534 + goto out; 505 535 506 536 ret = i915_gem_object_wait(obj, 507 537 I915_WAIT_INTERRUPTIBLE, ··· 848 866 if (ret == -EFAULT || ret == -ENOSPC) { 849 867 if (i915_gem_object_has_struct_page(obj)) 850 868 ret = i915_gem_shmem_pwrite(obj, args); 851 - else 852 - ret = i915_gem_phys_pwrite(obj, args, file); 853 869 } 854 870 855 871 i915_gem_object_unpin_pages(obj);
+7 -1
drivers/gpu/drm/mcde/mcde_drv.c
··· 413 413 match); 414 414 if (ret) { 415 415 dev_err(dev, "failed to add component master\n"); 416 - goto clk_disable; 416 + /* 417 + * The EPOD regulator is already disabled at this point so some 418 + * special errorpath code is needed 419 + */ 420 + clk_disable_unprepare(mcde->mcde_clk); 421 + regulator_disable(mcde->vana); 422 + return ret; 417 423 } 418 424 419 425 return 0;
+14 -15
drivers/gpu/drm/nouveau/dispnv50/disp.c
··· 455 455 * DAC 456 456 *****************************************************************************/ 457 457 static void 458 - nv50_dac_disable(struct drm_encoder *encoder) 458 + nv50_dac_disable(struct drm_encoder *encoder, struct drm_atomic_state *state) 459 459 { 460 460 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 461 461 struct nv50_core *core = nv50_disp(encoder->dev)->core; ··· 467 467 } 468 468 469 469 static void 470 - nv50_dac_enable(struct drm_encoder *encoder) 470 + nv50_dac_enable(struct drm_encoder *encoder, struct drm_atomic_state *state) 471 471 { 472 472 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 473 473 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); ··· 525 525 static const struct drm_encoder_helper_funcs 526 526 nv50_dac_help = { 527 527 .atomic_check = nv50_outp_atomic_check, 528 - .enable = nv50_dac_enable, 529 - .disable = nv50_dac_disable, 528 + .atomic_enable = nv50_dac_enable, 529 + .atomic_disable = nv50_dac_disable, 530 530 .detect = nv50_dac_detect 531 531 }; 532 532 ··· 1055 1055 } 1056 1056 1057 1057 static void 1058 - nv50_msto_enable(struct drm_encoder *encoder) 1058 + nv50_msto_enable(struct drm_encoder *encoder, struct drm_atomic_state *state) 1059 1059 { 1060 1060 struct nv50_head *head = nv50_head(encoder->crtc); 1061 1061 struct nv50_head_atom *armh = nv50_head_atom(head->base.base.state); ··· 1101 1101 } 1102 1102 1103 1103 static void 1104 - nv50_msto_disable(struct drm_encoder *encoder) 1104 + nv50_msto_disable(struct drm_encoder *encoder, struct drm_atomic_state *state) 1105 1105 { 1106 1106 struct nv50_msto *msto = nv50_msto(encoder); 1107 1107 struct nv50_mstc *mstc = msto->mstc; ··· 1118 1118 1119 1119 static const struct drm_encoder_helper_funcs 1120 1120 nv50_msto_help = { 1121 - .disable = nv50_msto_disable, 1122 - .enable = nv50_msto_enable, 1121 + .atomic_disable = nv50_msto_disable, 1122 + .atomic_enable = nv50_msto_enable, 1123 1123 .atomic_check = nv50_msto_atomic_check, 1124 1124 }; 1125 1125 ··· 1645 1645 } 1646 1646 1647 1647 static void 1648 - nv50_sor_enable(struct drm_encoder *encoder, 1649 - struct drm_atomic_state *state) 1648 + nv50_sor_enable(struct drm_encoder *encoder, struct drm_atomic_state *state) 1650 1649 { 1651 1650 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 1652 1651 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); ··· 1872 1873 } 1873 1874 1874 1875 static void 1875 - nv50_pior_disable(struct drm_encoder *encoder) 1876 + nv50_pior_disable(struct drm_encoder *encoder, struct drm_atomic_state *state) 1876 1877 { 1877 1878 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 1878 1879 struct nv50_core *core = nv50_disp(encoder->dev)->core; ··· 1884 1885 } 1885 1886 1886 1887 static void 1887 - nv50_pior_enable(struct drm_encoder *encoder) 1888 + nv50_pior_enable(struct drm_encoder *encoder, struct drm_atomic_state *state) 1888 1889 { 1889 1890 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 1890 1891 struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); ··· 1920 1921 } 1921 1922 1922 1923 core->func->pior->ctrl(core, nv_encoder->or, ctrl, asyh); 1923 - nv_encoder->crtc = encoder->crtc; 1924 + nv_encoder->crtc = &nv_crtc->base; 1924 1925 } 1925 1926 1926 1927 static const struct drm_encoder_helper_funcs 1927 1928 nv50_pior_help = { 1928 1929 .atomic_check = nv50_pior_atomic_check, 1929 - .enable = nv50_pior_enable, 1930 - .disable = nv50_pior_disable, 1930 + .atomic_enable = nv50_pior_enable, 1931 + .atomic_disable = nv50_pior_disable, 1931 1932 }; 1932 1933 1933 1934 static void
+1 -2
drivers/gpu/drm/nouveau/nouveau_bo.c
··· 350 350 351 351 if (domain & NOUVEAU_GEM_DOMAIN_VRAM) { 352 352 struct nvif_mmu *mmu = &drm->client.mmu; 353 - const u8 type = mmu->type[drm->ttm.type_vram].type; 354 353 355 354 pl[*n].mem_type = TTM_PL_VRAM; 356 355 pl[*n].flags = flags & ~TTM_PL_FLAG_CACHED; 357 356 358 357 /* Some BARs do not support being ioremapped WC */ 359 358 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA && 360 - type & NVIF_MEM_UNCACHED) 359 + mmu->type[drm->ttm.type_vram].type & NVIF_MEM_UNCACHED) 361 360 pl[*n].flags &= ~TTM_PL_FLAG_WC; 362 361 363 362 (*n)++;
+9 -5
drivers/gpu/drm/nouveau/nouveau_connector.c
··· 532 532 nouveau_connector_set_edid(struct nouveau_connector *nv_connector, 533 533 struct edid *edid) 534 534 { 535 - struct edid *old_edid = nv_connector->edid; 535 + if (nv_connector->edid != edid) { 536 + struct edid *old_edid = nv_connector->edid; 536 537 537 - drm_connector_update_edid_property(&nv_connector->base, edid); 538 - kfree(old_edid); 539 - nv_connector->edid = edid; 538 + drm_connector_update_edid_property(&nv_connector->base, edid); 539 + kfree(old_edid); 540 + nv_connector->edid = edid; 541 + } 540 542 } 541 543 542 544 static enum drm_connector_status ··· 671 669 /* Try retrieving EDID via DDC */ 672 670 if (!drm->vbios.fp_no_ddc) { 673 671 status = nouveau_connector_detect(connector, force); 674 - if (status == connector_status_connected) 672 + if (status == connector_status_connected) { 673 + edid = nv_connector->edid; 675 674 goto out; 675 + } 676 676 } 677 677 678 678 /* On some laptops (Sony, i'm looking at you) there appears to
+6 -2
drivers/hv/hv.c
··· 244 244 245 245 /* 246 246 * Hyper-V does not provide a way to change the connect CPU once 247 - * it is set; we must prevent the connect CPU from going offline. 247 + * it is set; we must prevent the connect CPU from going offline 248 + * while the VM is running normally. But in the panic or kexec() 249 + * path where the vmbus is already disconnected, the CPU must be 250 + * allowed to shut down. 248 251 */ 249 - if (cpu == VMBUS_CONNECT_CPU) 252 + if (cpu == VMBUS_CONNECT_CPU && 253 + vmbus_connection.conn_state == CONNECTED) 250 254 return -EBUSY; 251 255 252 256 /*
+1 -1
drivers/hwmon/amd_energy.c
··· 171 171 enum hwmon_sensor_types type, 172 172 u32 attr, int channel) 173 173 { 174 - return 0444; 174 + return 0440; 175 175 } 176 176 177 177 static int energy_accumulator(void *p)
+82 -48
drivers/hwmon/applesmc.c
··· 32 32 #include <linux/hwmon.h> 33 33 #include <linux/workqueue.h> 34 34 #include <linux/err.h> 35 + #include <linux/bits.h> 35 36 36 37 /* data port used by Apple SMC */ 37 38 #define APPLESMC_DATA_PORT 0x300 ··· 43 42 44 43 #define APPLESMC_MAX_DATA_LENGTH 32 45 44 46 - /* wait up to 128 ms for a status change. */ 47 - #define APPLESMC_MIN_WAIT 0x0010 48 - #define APPLESMC_RETRY_WAIT 0x0100 49 - #define APPLESMC_MAX_WAIT 0x20000 45 + /* Apple SMC status bits */ 46 + #define SMC_STATUS_AWAITING_DATA BIT(0) /* SMC has data waiting to be read */ 47 + #define SMC_STATUS_IB_CLOSED BIT(1) /* Will ignore any input */ 48 + #define SMC_STATUS_BUSY BIT(2) /* Command in progress */ 49 + 50 + /* Initial wait is 8us */ 51 + #define APPLESMC_MIN_WAIT 0x0008 50 52 51 53 #define APPLESMC_READ_CMD 0x10 52 54 #define APPLESMC_WRITE_CMD 0x11 ··· 155 151 static struct workqueue_struct *applesmc_led_wq; 156 152 157 153 /* 158 - * wait_read - Wait for a byte to appear on SMC port. Callers must 159 - * hold applesmc_lock. 154 + * Wait for specific status bits with a mask on the SMC. 155 + * Used before all transactions. 156 + * This does 10 fast loops of 8us then exponentially backs off for a 157 + * minimum total wait of 262ms. Depending on usleep_range this could 158 + * run out past 500ms. 160 159 */ 161 - static int wait_read(void) 160 + 161 + static int wait_status(u8 val, u8 mask) 162 162 { 163 - unsigned long end = jiffies + (APPLESMC_MAX_WAIT * HZ) / USEC_PER_SEC; 164 163 u8 status; 165 164 int us; 165 + int i; 166 166 167 - for (us = APPLESMC_MIN_WAIT; us < APPLESMC_MAX_WAIT; us <<= 1) { 168 - usleep_range(us, us * 16); 167 + us = APPLESMC_MIN_WAIT; 168 + for (i = 0; i < 24 ; i++) { 169 169 status = inb(APPLESMC_CMD_PORT); 170 - /* read: wait for smc to settle */ 171 - if (status & 0x01) 170 + if ((status & mask) == val) 172 171 return 0; 173 - /* timeout: give up */ 174 - if (time_after(jiffies, end)) 175 - break; 172 + usleep_range(us, us * 2); 173 + if (i > 9) 174 + us <<= 1; 176 175 } 177 - 178 - pr_warn("wait_read() fail: 0x%02x\n", status); 179 176 return -EIO; 180 177 } 181 178 182 - /* 183 - * send_byte - Write to SMC port, retrying when necessary. Callers 184 - * must hold applesmc_lock. 185 - */ 179 + /* send_byte - Write to SMC data port. Callers must hold applesmc_lock. */ 180 + 186 181 static int send_byte(u8 cmd, u16 port) 187 182 { 188 - u8 status; 189 - int us; 190 - unsigned long end = jiffies + (APPLESMC_MAX_WAIT * HZ) / USEC_PER_SEC; 183 + int status; 184 + 185 + status = wait_status(0, SMC_STATUS_IB_CLOSED); 186 + if (status) 187 + return status; 188 + /* 189 + * This needs to be a separate read looking for bit 0x04 190 + * after bit 0x02 falls. If consolidated with the wait above 191 + * this extra read may not happen if status returns both 192 + * simultaneously and this would appear to be required. 193 + */ 194 + status = wait_status(SMC_STATUS_BUSY, SMC_STATUS_BUSY); 195 + if (status) 196 + return status; 191 197 192 198 outb(cmd, port); 193 - for (us = APPLESMC_MIN_WAIT; us < APPLESMC_MAX_WAIT; us <<= 1) { 194 - usleep_range(us, us * 16); 195 - status = inb(APPLESMC_CMD_PORT); 196 - /* write: wait for smc to settle */ 197 - if (status & 0x02) 198 - continue; 199 - /* ready: cmd accepted, return */ 200 - if (status & 0x04) 201 - return 0; 202 - /* timeout: give up */ 203 - if (time_after(jiffies, end)) 204 - break; 205 - /* busy: long wait and resend */ 206 - udelay(APPLESMC_RETRY_WAIT); 207 - outb(cmd, port); 208 - } 209 - 210 - pr_warn("send_byte(0x%02x, 0x%04x) fail: 0x%02x\n", cmd, port, status); 211 - return -EIO; 199 + return 0; 212 200 } 201 + 202 + /* send_command - Write a command to the SMC. Callers must hold applesmc_lock. */ 213 203 214 204 static int send_command(u8 cmd) 215 205 { 216 - return send_byte(cmd, APPLESMC_CMD_PORT); 206 + int ret; 207 + 208 + ret = wait_status(0, SMC_STATUS_IB_CLOSED); 209 + if (ret) 210 + return ret; 211 + outb(cmd, APPLESMC_CMD_PORT); 212 + return 0; 213 + } 214 + 215 + /* 216 + * Based on logic from the Apple driver. This is issued before any interaction 217 + * If busy is stuck high, issue a read command to reset the SMC state machine. 218 + * If busy is stuck high after the command then the SMC is jammed. 219 + */ 220 + 221 + static int smc_sane(void) 222 + { 223 + int ret; 224 + 225 + ret = wait_status(0, SMC_STATUS_BUSY); 226 + if (!ret) 227 + return ret; 228 + ret = send_command(APPLESMC_READ_CMD); 229 + if (ret) 230 + return ret; 231 + return wait_status(0, SMC_STATUS_BUSY); 217 232 } 218 233 219 234 static int send_argument(const char *key) ··· 249 226 { 250 227 u8 status, data = 0; 251 228 int i; 229 + int ret; 230 + 231 + ret = smc_sane(); 232 + if (ret) 233 + return ret; 252 234 253 235 if (send_command(cmd) || send_argument(key)) { 254 236 pr_warn("%.4s: read arg fail\n", key); ··· 267 239 } 268 240 269 241 for (i = 0; i < len; i++) { 270 - if (wait_read()) { 242 + if (wait_status(SMC_STATUS_AWAITING_DATA | SMC_STATUS_BUSY, 243 + SMC_STATUS_AWAITING_DATA | SMC_STATUS_BUSY)) { 271 244 pr_warn("%.4s: read data[%d] fail\n", key, i); 272 245 return -EIO; 273 246 } ··· 279 250 for (i = 0; i < 16; i++) { 280 251 udelay(APPLESMC_MIN_WAIT); 281 252 status = inb(APPLESMC_CMD_PORT); 282 - if (!(status & 0x01)) 253 + if (!(status & SMC_STATUS_AWAITING_DATA)) 283 254 break; 284 255 data = inb(APPLESMC_DATA_PORT); 285 256 } 286 257 if (i) 287 258 pr_warn("flushed %d bytes, last value is: %d\n", i, data); 288 259 289 - return 0; 260 + return wait_status(0, SMC_STATUS_BUSY); 290 261 } 291 262 292 263 static int write_smc(u8 cmd, const char *key, const u8 *buffer, u8 len) 293 264 { 294 265 int i; 266 + int ret; 267 + 268 + ret = smc_sane(); 269 + if (ret) 270 + return ret; 295 271 296 272 if (send_command(cmd) || send_argument(key)) { 297 273 pr_warn("%s: write arg fail\n", key); ··· 315 281 } 316 282 } 317 283 318 - return 0; 284 + return wait_status(0, SMC_STATUS_BUSY); 319 285 } 320 286 321 287 static int read_register_count(unsigned int *count)
+13 -13
drivers/hwmon/pmbus/max20730.c
··· 122 122 switch (idx) { 123 123 case MAX20730_DEBUGFS_VOUT_MIN: 124 124 ret = VOLT_FROM_REG(data->mfr_voutmin * 10000); 125 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d.%d\n", 126 - ret / 10000, ret % 10000); 125 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d.%d\n", 126 + ret / 10000, ret % 10000); 127 127 break; 128 128 case MAX20730_DEBUGFS_FREQUENCY: 129 129 val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_FSW_MASK) ··· 141 141 ret = 800; 142 142 else 143 143 ret = 900; 144 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 144 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 145 145 break; 146 146 case MAX20730_DEBUGFS_PG_DELAY: 147 147 val = (data->mfr_devset1 & MAX20730_MFR_DEVSET1_TSTAT_MASK) ··· 223 223 case MAX20730_DEBUGFS_OC_PROTECT_MODE: 224 224 ret = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_OCPM_MASK) 225 225 >> MAX20730_MFR_DEVSET2_OCPM_BIT_POS; 226 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 226 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 227 227 break; 228 228 case MAX20730_DEBUGFS_SS_TIMING: 229 229 val = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_SS_MASK) ··· 241 241 case MAX20730_DEBUGFS_IMAX: 242 242 ret = (data->mfr_devset2 & MAX20730_MFR_DEVSET2_IMAX_MASK) 243 243 >> MAX20730_MFR_DEVSET2_IMAX_BIT_POS; 244 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 244 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 245 245 break; 246 246 case MAX20730_DEBUGFS_OPERATION: 247 247 ret = i2c_smbus_read_byte_data(psu->client, PMBUS_OPERATION); 248 248 if (ret < 0) 249 249 return ret; 250 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 250 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 251 251 break; 252 252 case MAX20730_DEBUGFS_ON_OFF_CONFIG: 253 253 ret = i2c_smbus_read_byte_data(psu->client, PMBUS_ON_OFF_CONFIG); 254 254 if (ret < 0) 255 255 return ret; 256 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 256 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 257 257 break; 258 258 case MAX20730_DEBUGFS_SMBALERT_MASK: 259 259 ret = i2c_smbus_read_word_data(psu->client, 260 260 PMBUS_SMB_ALERT_MASK); 261 261 if (ret < 0) 262 262 return ret; 263 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 263 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 264 264 break; 265 265 case MAX20730_DEBUGFS_VOUT_MODE: 266 266 ret = i2c_smbus_read_byte_data(psu->client, PMBUS_VOUT_MODE); 267 267 if (ret < 0) 268 268 return ret; 269 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 269 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, "%d\n", ret); 270 270 break; 271 271 case MAX20730_DEBUGFS_VOUT_COMMAND: 272 272 ret = i2c_smbus_read_word_data(psu->client, PMBUS_VOUT_COMMAND); ··· 274 274 return ret; 275 275 276 276 ret = VOLT_FROM_REG(ret * 10000); 277 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, 278 - "%d.%d\n", ret / 10000, ret % 10000); 277 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, 278 + "%d.%d\n", ret / 10000, ret % 10000); 279 279 break; 280 280 case MAX20730_DEBUGFS_VOUT_MAX: 281 281 ret = i2c_smbus_read_word_data(psu->client, PMBUS_VOUT_MAX); ··· 283 283 return ret; 284 284 285 285 ret = VOLT_FROM_REG(ret * 10000); 286 - len = snprintf(tbuf, DEBUG_FS_DATA_MAX, 287 - "%d.%d\n", ret / 10000, ret % 10000); 286 + len = scnprintf(tbuf, DEBUG_FS_DATA_MAX, 287 + "%d.%d\n", ret / 10000, ret % 10000); 288 288 break; 289 289 default: 290 290 len = strlcpy(tbuf, "Invalid\n", DEBUG_FS_DATA_MAX);
+10 -3
drivers/hwmon/pmbus/pmbus_core.c
··· 941 941 struct i2c_client *client = to_i2c_client(dev->parent); 942 942 struct pmbus_sensor *sensor = to_pmbus_sensor(devattr); 943 943 struct pmbus_data *data = i2c_get_clientdata(client); 944 + ssize_t ret; 944 945 946 + mutex_lock(&data->update_lock); 945 947 pmbus_update_sensor_data(client, sensor); 946 948 if (sensor->data < 0) 947 - return sensor->data; 948 - 949 - return snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor)); 949 + ret = sensor->data; 950 + else 951 + ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor)); 952 + mutex_unlock(&data->update_lock); 953 + return ret; 950 954 } 951 955 952 956 static ssize_t pmbus_set_sensor(struct device *dev, ··· 2016 2012 int val; 2017 2013 struct i2c_client *client = to_i2c_client(dev->parent); 2018 2014 struct pmbus_samples_reg *reg = to_samples_reg(devattr); 2015 + struct pmbus_data *data = i2c_get_clientdata(client); 2019 2016 2017 + mutex_lock(&data->update_lock); 2020 2018 val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg); 2019 + mutex_unlock(&data->update_lock); 2021 2020 if (val < 0) 2022 2021 return val; 2023 2022
+9 -7
drivers/hwmon/pwm-fan.c
··· 54 54 static void sample_timer(struct timer_list *t) 55 55 { 56 56 struct pwm_fan_ctx *ctx = from_timer(ctx, t, rpm_timer); 57 + unsigned int delta = ktime_ms_delta(ktime_get(), ctx->sample_start); 57 58 int pulses; 58 - u64 tmp; 59 59 60 - pulses = atomic_read(&ctx->pulses); 61 - atomic_sub(pulses, &ctx->pulses); 62 - tmp = (u64)pulses * ktime_ms_delta(ktime_get(), ctx->sample_start) * 60; 63 - do_div(tmp, ctx->pulses_per_revolution * 1000); 64 - ctx->rpm = tmp; 60 + if (delta) { 61 + pulses = atomic_read(&ctx->pulses); 62 + atomic_sub(pulses, &ctx->pulses); 63 + ctx->rpm = (unsigned int)(pulses * 1000 * 60) / 64 + (ctx->pulses_per_revolution * delta); 65 65 66 - ctx->sample_start = ktime_get(); 66 + ctx->sample_start = ktime_get(); 67 + } 68 + 67 69 mod_timer(&ctx->rpm_timer, jiffies + HZ); 68 70 } 69 71
+3
drivers/infiniband/Kconfig
··· 73 73 This allows the user to config the default GID type that the CM 74 74 uses for each device, when initiaing new connections. 75 75 76 + config INFINIBAND_VIRT_DMA 77 + def_bool !HIGHMEM 78 + 76 79 if INFINIBAND_USER_ACCESS || !INFINIBAND_USER_ACCESS 77 80 source "drivers/infiniband/hw/mthca/Kconfig" 78 81 source "drivers/infiniband/hw/qib/Kconfig"
+6 -6
drivers/infiniband/core/cm.c
··· 859 859 atomic_set(&cm_id_priv->work_count, -1); 860 860 refcount_set(&cm_id_priv->refcount, 1); 861 861 862 - ret = xa_alloc_cyclic_irq(&cm.local_id_table, &id, NULL, xa_limit_32b, 863 - &cm.local_id_next, GFP_KERNEL); 862 + ret = xa_alloc_cyclic(&cm.local_id_table, &id, NULL, xa_limit_32b, 863 + &cm.local_id_next, GFP_KERNEL); 864 864 if (ret < 0) 865 865 goto error; 866 866 cm_id_priv->id.local_id = (__force __be32)id ^ cm.random_id_operand; ··· 878 878 */ 879 879 static void cm_finalize_id(struct cm_id_private *cm_id_priv) 880 880 { 881 - xa_store_irq(&cm.local_id_table, cm_local_id(cm_id_priv->id.local_id), 882 - cm_id_priv, GFP_KERNEL); 881 + xa_store(&cm.local_id_table, cm_local_id(cm_id_priv->id.local_id), 882 + cm_id_priv, GFP_ATOMIC); 883 883 } 884 884 885 885 struct ib_cm_id *ib_create_cm_id(struct ib_device *device, ··· 1169 1169 spin_unlock(&cm.lock); 1170 1170 spin_unlock_irq(&cm_id_priv->lock); 1171 1171 1172 - xa_erase_irq(&cm.local_id_table, cm_local_id(cm_id->local_id)); 1172 + xa_erase(&cm.local_id_table, cm_local_id(cm_id->local_id)); 1173 1173 cm_deref_id(cm_id_priv); 1174 1174 wait_for_completion(&cm_id_priv->comp); 1175 1175 while ((work = cm_dequeue_work(cm_id_priv)) != NULL) ··· 4482 4482 cm.remote_id_table = RB_ROOT; 4483 4483 cm.remote_qp_table = RB_ROOT; 4484 4484 cm.remote_sidr_table = RB_ROOT; 4485 - xa_init_flags(&cm.local_id_table, XA_FLAGS_ALLOC | XA_FLAGS_LOCK_IRQ); 4485 + xa_init_flags(&cm.local_id_table, XA_FLAGS_ALLOC); 4486 4486 get_random_bytes(&cm.random_id_operand, sizeof cm.random_id_operand); 4487 4487 INIT_LIST_HEAD(&cm.timewait_list); 4488 4488
+2 -1
drivers/infiniband/hw/hfi1/chip.c
··· 15245 15245 & CCE_REVISION_SW_MASK); 15246 15246 15247 15247 /* alloc netdev data */ 15248 - if (hfi1_netdev_alloc(dd)) 15248 + ret = hfi1_netdev_alloc(dd); 15249 + if (ret) 15249 15250 goto bail_cleanup; 15250 15251 15251 15252 ret = set_up_context_variables(dd);
+1 -1
drivers/infiniband/hw/vmw_pvrdma/pvrdma_main.c
··· 266 266 } 267 267 ret = ib_device_set_netdev(&dev->ib_dev, dev->netdev, 1); 268 268 if (ret) 269 - return ret; 269 + goto err_srq_free; 270 270 spin_lock_init(&dev->srq_tbl_lock); 271 271 rdma_set_device_sysfs_group(&dev->ib_dev, &pvrdma_attr_group); 272 272
+2 -1
drivers/infiniband/sw/rdmavt/Kconfig
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 config INFINIBAND_RDMAVT 3 3 tristate "RDMA verbs transport library" 4 - depends on X86_64 && ARCH_DMA_ADDR_T_64BIT 4 + depends on INFINIBAND_VIRT_DMA 5 + depends on X86_64 5 6 depends on PCI 6 7 select DMA_VIRT_OPS 7 8 help
+1 -1
drivers/infiniband/sw/rxe/Kconfig
··· 2 2 config RDMA_RXE 3 3 tristate "Software RDMA over Ethernet (RoCE) driver" 4 4 depends on INET && PCI && INFINIBAND 5 - depends on !64BIT || ARCH_DMA_ADDR_T_64BIT 5 + depends on INFINIBAND_VIRT_DMA 6 6 select NET_UDP_TUNNEL 7 7 select CRYPTO_CRC32 8 8 select DMA_VIRT_OPS
+1
drivers/infiniband/sw/siw/Kconfig
··· 1 1 config RDMA_SIW 2 2 tristate "Software RDMA over TCP/IP (iWARP) driver" 3 3 depends on INET && INFINIBAND && LIBCRC32C 4 + depends on INFINIBAND_VIRT_DMA 4 5 select DMA_VIRT_OPS 5 6 help 6 7 This driver implements the iWARP RDMA transport over
+33 -8
drivers/input/keyboard/sunkbd.c
··· 99 99 switch (data) { 100 100 101 101 case SUNKBD_RET_RESET: 102 - schedule_work(&sunkbd->tq); 102 + if (sunkbd->enabled) 103 + schedule_work(&sunkbd->tq); 103 104 sunkbd->reset = -1; 104 105 break; 105 106 ··· 201 200 } 202 201 203 202 /* 204 - * sunkbd_reinit() sets leds and beeps to a state the computer remembers they 205 - * were in. 203 + * sunkbd_set_leds_beeps() sets leds and beeps to a state the computer remembers 204 + * they were in. 206 205 */ 207 206 208 - static void sunkbd_reinit(struct work_struct *work) 207 + static void sunkbd_set_leds_beeps(struct sunkbd *sunkbd) 209 208 { 210 - struct sunkbd *sunkbd = container_of(work, struct sunkbd, tq); 211 - 212 - wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ); 213 - 214 209 serio_write(sunkbd->serio, SUNKBD_CMD_SETLED); 215 210 serio_write(sunkbd->serio, 216 211 (!!test_bit(LED_CAPSL, sunkbd->dev->led) << 3) | ··· 219 222 SUNKBD_CMD_BELLOFF - !!test_bit(SND_BELL, sunkbd->dev->snd)); 220 223 } 221 224 225 + 226 + /* 227 + * sunkbd_reinit() wait for the keyboard reset to complete and restores state 228 + * of leds and beeps. 229 + */ 230 + 231 + static void sunkbd_reinit(struct work_struct *work) 232 + { 233 + struct sunkbd *sunkbd = container_of(work, struct sunkbd, tq); 234 + 235 + /* 236 + * It is OK that we check sunkbd->enabled without pausing serio, 237 + * as we only want to catch true->false transition that will 238 + * happen once and we will be woken up for it. 239 + */ 240 + wait_event_interruptible_timeout(sunkbd->wait, 241 + sunkbd->reset >= 0 || !sunkbd->enabled, 242 + HZ); 243 + 244 + if (sunkbd->reset >= 0 && sunkbd->enabled) 245 + sunkbd_set_leds_beeps(sunkbd); 246 + } 247 + 222 248 static void sunkbd_enable(struct sunkbd *sunkbd, bool enable) 223 249 { 224 250 serio_pause_rx(sunkbd->serio); 225 251 sunkbd->enabled = enable; 226 252 serio_continue_rx(sunkbd->serio); 253 + 254 + if (!enable) { 255 + wake_up_interruptible(&sunkbd->wait); 256 + cancel_work_sync(&sunkbd->tq); 257 + } 227 258 } 228 259 229 260 /*
+1 -1
drivers/input/misc/adxl34x.c
··· 696 696 struct input_dev *input_dev; 697 697 const struct adxl34x_platform_data *pdata; 698 698 int err, range, i; 699 - unsigned char revid; 699 + int revid; 700 700 701 701 if (!irq) { 702 702 dev_err(dev, "no IRQ?\n");
+1 -1
drivers/input/mouse/elan_i2c.h
··· 78 78 int (*iap_reset)(struct i2c_client *client); 79 79 80 80 int (*prepare_fw_update)(struct i2c_client *client, u16 ic_type, 81 - u8 iap_version); 81 + u8 iap_version, u16 fw_page_size); 82 82 int (*write_fw_block)(struct i2c_client *client, u16 fw_page_size, 83 83 const u8 *page, u16 checksum, int idx); 84 84 int (*finish_fw_update)(struct i2c_client *client,
+2 -1
drivers/input/mouse/elan_i2c_core.c
··· 497 497 u16 sw_checksum = 0, fw_checksum = 0; 498 498 499 499 error = data->ops->prepare_fw_update(client, data->ic_type, 500 - data->iap_version); 500 + data->iap_version, 501 + data->fw_page_size); 501 502 if (error) 502 503 return error; 503 504
+5 -5
drivers/input/mouse/elan_i2c_i2c.c
··· 517 517 return 0; 518 518 } 519 519 520 - static int elan_read_write_iap_type(struct i2c_client *client) 520 + static int elan_read_write_iap_type(struct i2c_client *client, u16 fw_page_size) 521 521 { 522 522 int error; 523 523 u16 constant; ··· 526 526 527 527 do { 528 528 error = elan_i2c_write_cmd(client, ETP_I2C_IAP_TYPE_CMD, 529 - ETP_I2C_IAP_TYPE_REG); 529 + fw_page_size / 2); 530 530 if (error) { 531 531 dev_err(&client->dev, 532 532 "cannot write iap type: %d\n", error); ··· 543 543 constant = le16_to_cpup((__le16 *)val); 544 544 dev_dbg(&client->dev, "iap type reg: 0x%04x\n", constant); 545 545 546 - if (constant == ETP_I2C_IAP_TYPE_REG) 546 + if (constant == fw_page_size / 2) 547 547 return 0; 548 548 549 549 } while (--retry > 0); ··· 553 553 } 554 554 555 555 static int elan_i2c_prepare_fw_update(struct i2c_client *client, u16 ic_type, 556 - u8 iap_version) 556 + u8 iap_version, u16 fw_page_size) 557 557 { 558 558 struct device *dev = &client->dev; 559 559 int error; ··· 594 594 } 595 595 596 596 if (ic_type >= 0x0D && iap_version >= 1) { 597 - error = elan_read_write_iap_type(client); 597 + error = elan_read_write_iap_type(client, fw_page_size); 598 598 if (error) 599 599 return error; 600 600 }
+1 -1
drivers/input/mouse/elan_i2c_smbus.c
··· 340 340 } 341 341 342 342 static int elan_smbus_prepare_fw_update(struct i2c_client *client, u16 ic_type, 343 - u8 iap_version) 343 + u8 iap_version, u16 fw_page_size) 344 344 { 345 345 struct device *dev = &client->dev; 346 346 int len;
+11 -1
drivers/input/serio/i8042.c
··· 122 122 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]"); 123 123 #endif 124 124 125 + static bool i8042_present; 125 126 static bool i8042_bypass_aux_irq_test; 126 127 static char i8042_kbd_firmware_id[128]; 127 128 static char i8042_aux_firmware_id[128]; ··· 343 342 { 344 343 unsigned long flags; 345 344 int retval; 345 + 346 + if (!i8042_present) 347 + return -1; 346 348 347 349 spin_lock_irqsave(&i8042_lock, flags); 348 350 retval = __i8042_command(param, command); ··· 1616 1612 1617 1613 err = i8042_platform_init(); 1618 1614 if (err) 1619 - return err; 1615 + return (err == -ENODEV) ? 0 : err; 1620 1616 1621 1617 err = i8042_controller_check(); 1622 1618 if (err) 1623 1619 goto err_platform_exit; 1620 + 1621 + /* Set this before creating the dev to allow i8042_command to work right away */ 1622 + i8042_present = true; 1624 1623 1625 1624 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0); 1626 1625 if (IS_ERR(pdev)) { ··· 1643 1636 1644 1637 static void __exit i8042_exit(void) 1645 1638 { 1639 + if (!i8042_present) 1640 + return; 1641 + 1646 1642 platform_device_unregister(i8042_platform_device); 1647 1643 platform_driver_unregister(&i8042_driver); 1648 1644 i8042_platform_exit();
+1
drivers/input/touchscreen/Kconfig
··· 96 96 config TOUCHSCREEN_ADC 97 97 tristate "Generic ADC based resistive touchscreen" 98 98 depends on IIO 99 + select IIO_BUFFER 99 100 select IIO_BUFFER_CB 100 101 help 101 102 Say Y here if you want to use the generic ADC
+18 -1
drivers/iommu/intel/dmar.c
··· 333 333 dmar_iommu_notify_scope_dev(info); 334 334 } 335 335 336 + static inline void vf_inherit_msi_domain(struct pci_dev *pdev) 337 + { 338 + dev_set_msi_domain(&pdev->dev, dev_get_msi_domain(&pdev->physfn->dev)); 339 + } 340 + 336 341 static int dmar_pci_bus_notifier(struct notifier_block *nb, 337 342 unsigned long action, void *data) 338 343 { ··· 347 342 /* Only care about add/remove events for physical functions. 348 343 * For VFs we actually do the lookup based on the corresponding 349 344 * PF in device_to_iommu() anyway. */ 350 - if (pdev->is_virtfn) 345 + if (pdev->is_virtfn) { 346 + /* 347 + * Ensure that the VF device inherits the irq domain of the 348 + * PF device. Ideally the device would inherit the domain 349 + * from the bus, but DMAR can have multiple units per bus 350 + * which makes this impossible. The VF 'bus' could inherit 351 + * from the PF device, but that's yet another x86'sism to 352 + * inflict on everybody else. 353 + */ 354 + if (action == BUS_NOTIFY_ADD_DEVICE) 355 + vf_inherit_msi_domain(pdev); 351 356 return NOTIFY_DONE; 357 + } 358 + 352 359 if (action != BUS_NOTIFY_ADD_DEVICE && 353 360 action != BUS_NOTIFY_REMOVED_DEVICE) 354 361 return NOTIFY_DONE;
+4 -5
drivers/misc/habanalabs/common/command_buffer.c
··· 142 142 { 143 143 if (cb->is_internal) 144 144 gen_pool_free(hdev->internal_cb_pool, 145 - cb->kernel_address, cb->size); 145 + (uintptr_t)cb->kernel_address, cb->size); 146 146 else 147 147 hdev->asic_funcs->asic_dma_free_coherent(hdev, cb->size, 148 - (void *) (uintptr_t) cb->kernel_address, 149 - cb->bus_address); 148 + cb->kernel_address, cb->bus_address); 150 149 151 150 kfree(cb); 152 151 } ··· 229 230 return NULL; 230 231 } 231 232 232 - cb->kernel_address = (u64) (uintptr_t) p; 233 + cb->kernel_address = p; 233 234 cb->size = cb_size; 234 235 235 236 return cb; ··· 508 509 509 510 vma->vm_private_data = cb; 510 511 511 - rc = hdev->asic_funcs->cb_mmap(hdev, vma, (void *) cb->kernel_address, 512 + rc = hdev->asic_funcs->cb_mmap(hdev, vma, cb->kernel_address, 512 513 cb->bus_address, cb->size); 513 514 if (rc) { 514 515 spin_lock(&cb->lock);
+7 -7
drivers/misc/habanalabs/common/habanalabs.h
··· 452 452 struct list_head pool_list; 453 453 struct list_head va_block_list; 454 454 u64 id; 455 - u64 kernel_address; 455 + void *kernel_address; 456 456 dma_addr_t bus_address; 457 457 u32 mmap_size; 458 458 u32 size; ··· 515 515 struct hl_hw_sob hw_sob[HL_RSVD_SOBS]; 516 516 struct hl_cs_job **shadow_queue; 517 517 enum hl_queue_type queue_type; 518 - u64 kernel_address; 518 + void *kernel_address; 519 519 dma_addr_t bus_address; 520 520 u32 pi; 521 521 atomic_t ci; ··· 544 544 */ 545 545 struct hl_cq { 546 546 struct hl_device *hdev; 547 - u64 kernel_address; 547 + void *kernel_address; 548 548 dma_addr_t bus_address; 549 549 u32 cq_idx; 550 550 u32 hw_queue_id; ··· 562 562 */ 563 563 struct hl_eq { 564 564 struct hl_device *hdev; 565 - u64 kernel_address; 565 + void *kernel_address; 566 566 dma_addr_t bus_address; 567 567 u32 ci; 568 568 }; ··· 757 757 u32 (*get_dma_desc_list_size)(struct hl_device *hdev, 758 758 struct sg_table *sgt); 759 759 void (*add_end_of_cb_packets)(struct hl_device *hdev, 760 - u64 kernel_address, u32 len, 760 + void *kernel_address, u32 len, 761 761 u64 cq_addr, u32 cq_val, u32 msix_num, 762 762 bool eb); 763 763 void (*update_eq_ci)(struct hl_device *hdev, u32 val); ··· 1382 1382 for (;;) { \ 1383 1383 /* Verify we read updates done by other cores or by device */ \ 1384 1384 mb(); \ 1385 - (val) = *((u32 *) (uintptr_t) (addr)); \ 1385 + (val) = *((u32 *)(addr)); \ 1386 1386 if (mem_written_by_device) \ 1387 1387 (val) = le32_to_cpu(*(__le32 *) &(val)); \ 1388 1388 if (cond) \ 1389 1389 break; \ 1390 1390 if (timeout_us && ktime_compare(ktime_get(), __timeout) > 0) { \ 1391 - (val) = *((u32 *) (uintptr_t) (addr)); \ 1391 + (val) = *((u32 *)(addr)); \ 1392 1392 if (mem_written_by_device) \ 1393 1393 (val) = le32_to_cpu(*(__le32 *) &(val)); \ 1394 1394 break; \
+9 -10
drivers/misc/habanalabs/common/hw_queue.c
··· 75 75 { 76 76 struct hl_bd *bd; 77 77 78 - bd = (struct hl_bd *) (uintptr_t) q->kernel_address; 78 + bd = q->kernel_address; 79 79 bd += hl_pi_2_offset(q->pi); 80 80 bd->ctl = cpu_to_le32(ctl); 81 81 bd->len = cpu_to_le32(len); ··· 335 335 bd.len = cpu_to_le32(job->job_cb_size); 336 336 bd.ptr = cpu_to_le64((u64) (uintptr_t) job->user_cb); 337 337 338 - pi = (__le64 *) (uintptr_t) (q->kernel_address + 339 - ((q->pi & (q->int_queue_len - 1)) * sizeof(bd))); 338 + pi = q->kernel_address + (q->pi & (q->int_queue_len - 1)) * sizeof(bd); 340 339 341 340 q->pi++; 342 341 q->pi &= ((q->int_queue_len << 1) - 1); ··· 629 630 if (!p) 630 631 return -ENOMEM; 631 632 632 - q->kernel_address = (u64) (uintptr_t) p; 633 + q->kernel_address = p; 633 634 634 635 q->shadow_queue = kmalloc_array(HL_QUEUE_LENGTH, 635 636 sizeof(*q->shadow_queue), ··· 652 653 if (is_cpu_queue) 653 654 hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, 654 655 HL_QUEUE_SIZE_IN_BYTES, 655 - (void *) (uintptr_t) q->kernel_address); 656 + q->kernel_address); 656 657 else 657 658 hdev->asic_funcs->asic_dma_free_coherent(hdev, 658 659 HL_QUEUE_SIZE_IN_BYTES, 659 - (void *) (uintptr_t) q->kernel_address, 660 + q->kernel_address, 660 661 q->bus_address); 661 662 662 663 return rc; ··· 675 676 return -EFAULT; 676 677 } 677 678 678 - q->kernel_address = (u64) (uintptr_t) p; 679 + q->kernel_address = p; 679 680 q->pi = 0; 680 681 atomic_set(&q->ci, 0); 681 682 ··· 703 704 if (!p) 704 705 return -ENOMEM; 705 706 706 - q->kernel_address = (u64) (uintptr_t) p; 707 + q->kernel_address = p; 707 708 708 709 /* Make sure read/write pointers are initialized to start of queue */ 709 710 atomic_set(&q->ci, 0); ··· 838 839 if (q->queue_type == QUEUE_TYPE_CPU) 839 840 hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, 840 841 HL_QUEUE_SIZE_IN_BYTES, 841 - (void *) (uintptr_t) q->kernel_address); 842 + q->kernel_address); 842 843 else 843 844 hdev->asic_funcs->asic_dma_free_coherent(hdev, 844 845 HL_QUEUE_SIZE_IN_BYTES, 845 - (void *) (uintptr_t) q->kernel_address, 846 + q->kernel_address, 846 847 q->bus_address); 847 848 } 848 849
+9 -8
drivers/misc/habanalabs/common/irq.c
··· 90 90 return IRQ_HANDLED; 91 91 } 92 92 93 - cq_base = (struct hl_cq_entry *) (uintptr_t) cq->kernel_address; 93 + cq_base = cq->kernel_address; 94 94 95 95 while (1) { 96 96 bool entry_ready = ((le32_to_cpu(cq_base[cq->ci].data) & ··· 152 152 struct hl_eq_entry *eq_base; 153 153 struct hl_eqe_work *handle_eqe_work; 154 154 155 - eq_base = (struct hl_eq_entry *) (uintptr_t) eq->kernel_address; 155 + eq_base = eq->kernel_address; 156 156 157 157 while (1) { 158 158 bool entry_ready = ··· 221 221 return -ENOMEM; 222 222 223 223 q->hdev = hdev; 224 - q->kernel_address = (u64) (uintptr_t) p; 224 + q->kernel_address = p; 225 225 q->hw_queue_id = hw_queue_id; 226 226 q->ci = 0; 227 227 q->pi = 0; ··· 242 242 void hl_cq_fini(struct hl_device *hdev, struct hl_cq *q) 243 243 { 244 244 hdev->asic_funcs->asic_dma_free_coherent(hdev, HL_CQ_SIZE_IN_BYTES, 245 - (void *) (uintptr_t) q->kernel_address, q->bus_address); 245 + q->kernel_address, 246 + q->bus_address); 246 247 } 247 248 248 249 void hl_cq_reset(struct hl_device *hdev, struct hl_cq *q) ··· 260 259 * when the device is operational again 261 260 */ 262 261 263 - memset((void *) (uintptr_t) q->kernel_address, 0, HL_CQ_SIZE_IN_BYTES); 262 + memset(q->kernel_address, 0, HL_CQ_SIZE_IN_BYTES); 264 263 } 265 264 266 265 /** ··· 283 282 return -ENOMEM; 284 283 285 284 q->hdev = hdev; 286 - q->kernel_address = (u64) (uintptr_t) p; 285 + q->kernel_address = p; 287 286 q->ci = 0; 288 287 289 288 return 0; ··· 303 302 304 303 hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, 305 304 HL_EQ_SIZE_IN_BYTES, 306 - (void *) (uintptr_t) q->kernel_address); 305 + q->kernel_address); 307 306 } 308 307 309 308 void hl_eq_reset(struct hl_device *hdev, struct hl_eq *q) ··· 317 316 * when the device is operational again 318 317 */ 319 318 320 - memset((void *) (uintptr_t) q->kernel_address, 0, HL_EQ_SIZE_IN_BYTES); 319 + memset(q->kernel_address, 0, HL_EQ_SIZE_IN_BYTES); 321 320 }
+15 -23
drivers/misc/habanalabs/gaudi/gaudi.c
··· 680 680 if (!cb) 681 681 return -EFAULT; 682 682 683 - init_tpc_mem_pkt = (struct packet_lin_dma *) (uintptr_t) 684 - cb->kernel_address; 683 + init_tpc_mem_pkt = cb->kernel_address; 685 684 cb_size = sizeof(*init_tpc_mem_pkt); 686 685 memset(init_tpc_mem_pkt, 0, cb_size); 687 686 ··· 3810 3811 u16 pkt_size; 3811 3812 struct gaudi_packet *user_pkt; 3812 3813 3813 - user_pkt = (struct gaudi_packet *) (uintptr_t) 3814 - (parser->user_cb->kernel_address + cb_parsed_length); 3814 + user_pkt = parser->user_cb->kernel_address + cb_parsed_length; 3815 3815 3816 3816 pkt_id = (enum packet_id) ( 3817 3817 (le64_to_cpu(user_pkt->header) & ··· 4033 4035 u32 new_pkt_size = 0; 4034 4036 struct gaudi_packet *user_pkt, *kernel_pkt; 4035 4037 4036 - user_pkt = (struct gaudi_packet *) (uintptr_t) 4037 - (parser->user_cb->kernel_address + cb_parsed_length); 4038 - kernel_pkt = (struct gaudi_packet *) (uintptr_t) 4039 - (parser->patched_cb->kernel_address + 4040 - cb_patched_cur_length); 4038 + user_pkt = parser->user_cb->kernel_address + cb_parsed_length; 4039 + kernel_pkt = parser->patched_cb->kernel_address + 4040 + cb_patched_cur_length; 4041 4041 4042 4042 pkt_id = (enum packet_id) ( 4043 4043 (le64_to_cpu(user_pkt->header) & ··· 4151 4155 * The check that parser->user_cb_size <= parser->user_cb->size was done 4152 4156 * in validate_queue_index(). 4153 4157 */ 4154 - memcpy((void *) (uintptr_t) parser->patched_cb->kernel_address, 4155 - (void *) (uintptr_t) parser->user_cb->kernel_address, 4158 + memcpy(parser->patched_cb->kernel_address, 4159 + parser->user_cb->kernel_address, 4156 4160 parser->user_cb_size); 4157 4161 4158 4162 patched_cb_size = parser->patched_cb_size; ··· 4286 4290 } 4287 4291 4288 4292 static void gaudi_add_end_of_cb_packets(struct hl_device *hdev, 4289 - u64 kernel_address, u32 len, 4293 + void *kernel_address, u32 len, 4290 4294 u64 cq_addr, u32 cq_val, u32 msi_vec, 4291 4295 bool eb) 4292 4296 { ··· 4294 4298 struct packet_msg_prot *cq_pkt; 4295 4299 u32 tmp; 4296 4300 4297 - cq_pkt = (struct packet_msg_prot *) (uintptr_t) 4298 - (kernel_address + len - (sizeof(struct packet_msg_prot) * 2)); 4301 + cq_pkt = kernel_address + len - (sizeof(struct packet_msg_prot) * 2); 4299 4302 4300 4303 tmp = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_PROT); 4301 4304 tmp |= FIELD_PREP(GAUDI_PKT_CTL_MB_MASK, 1); ··· 4337 4342 if (!cb) 4338 4343 return -EFAULT; 4339 4344 4340 - lin_dma_pkt = (struct packet_lin_dma *) (uintptr_t) cb->kernel_address; 4345 + lin_dma_pkt = cb->kernel_address; 4341 4346 memset(lin_dma_pkt, 0, sizeof(*lin_dma_pkt)); 4342 4347 cb_size = sizeof(*lin_dma_pkt); 4343 4348 ··· 4742 4747 (addr - gaudi->hbm_bar_cur_addr)); 4743 4748 } 4744 4749 4745 - static void gaudi_mmu_prepare_reg(struct hl_device *hdev, u64 reg, u32 asid) 4750 + void gaudi_mmu_prepare_reg(struct hl_device *hdev, u64 reg, u32 asid) 4746 4751 { 4747 4752 /* mask to zero the MMBP and ASID bits */ 4748 4753 WREG32_AND(reg, ~0x7FF); ··· 4910 4915 gaudi_mmu_prepare_reg(hdev, mmMME2_ACC_WBC, asid); 4911 4916 gaudi_mmu_prepare_reg(hdev, mmMME3_ACC_WBC, asid); 4912 4917 4913 - gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_ARUSER, asid); 4914 - gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_AWUSER, asid); 4915 - 4916 4918 hdev->asic_funcs->set_clock_gating(hdev); 4917 4919 4918 4920 mutex_unlock(&gaudi->clk_gate_mutex); ··· 4946 4954 4947 4955 cb = job->patched_cb; 4948 4956 4949 - fence_pkt = (struct packet_msg_prot *) (uintptr_t) (cb->kernel_address + 4950 - job->job_cb_size - sizeof(struct packet_msg_prot)); 4957 + fence_pkt = cb->kernel_address + 4958 + job->job_cb_size - sizeof(struct packet_msg_prot); 4951 4959 4952 4960 tmp = FIELD_PREP(GAUDI_PKT_CTL_OPCODE_MASK, PACKET_MSG_PROT); 4953 4961 tmp |= FIELD_PREP(GAUDI_PKT_CTL_EB_MASK, 1); ··· 6378 6386 struct packet_msg_short *pkt; 6379 6387 u32 value, ctl; 6380 6388 6381 - pkt = (struct packet_msg_short *) (uintptr_t) cb->kernel_address; 6389 + pkt = cb->kernel_address; 6382 6390 memset(pkt, 0, sizeof(*pkt)); 6383 6391 6384 6392 /* Inc by 1, Mode ADD */ ··· 6470 6478 u16 sob_val, u16 mon_id, u32 q_idx) 6471 6479 { 6472 6480 struct hl_cb *cb = (struct hl_cb *) data; 6473 - void *buf = (void *) (uintptr_t) cb->kernel_address; 6481 + void *buf = cb->kernel_address; 6474 6482 u64 monitor_base, fence_addr = 0; 6475 6483 u32 size = 0; 6476 6484 u16 msg_addr_offset;
+1
drivers/misc/habanalabs/gaudi/gaudiP.h
··· 271 271 int gaudi_debug_coresight(struct hl_device *hdev, void *data); 272 272 void gaudi_halt_coresight(struct hl_device *hdev); 273 273 int gaudi_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk); 274 + void gaudi_mmu_prepare_reg(struct hl_device *hdev, u64 reg, u32 asid); 274 275 275 276 #endif /* GAUDIP_H_ */
+5
drivers/misc/habanalabs/gaudi/gaudi_coresight.c
··· 623 623 return -EINVAL; 624 624 } 625 625 626 + gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_ARUSER, 627 + hdev->compute_ctx->asid); 628 + gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_AWUSER, 629 + hdev->compute_ctx->asid); 630 + 626 631 msb = upper_32_bits(input->buffer_address) >> 8; 627 632 msb &= PSOC_GLOBAL_CONF_TRACE_ADDR_MSB_MASK; 628 633 WREG32(mmPSOC_GLOBAL_CONF_TRACE_ADDR, msb);
+11 -15
drivers/misc/habanalabs/goya/goya.c
··· 2882 2882 2883 2883 cb = job->patched_cb; 2884 2884 2885 - fence_pkt = (struct packet_msg_prot *) (uintptr_t) (cb->kernel_address + 2886 - job->job_cb_size - sizeof(struct packet_msg_prot)); 2885 + fence_pkt = cb->kernel_address + 2886 + job->job_cb_size - sizeof(struct packet_msg_prot); 2887 2887 2888 2888 tmp = (PACKET_MSG_PROT << GOYA_PKT_CTL_OPCODE_SHIFT) | 2889 2889 (1 << GOYA_PKT_CTL_EB_SHIFT) | ··· 3475 3475 u16 pkt_size; 3476 3476 struct goya_packet *user_pkt; 3477 3477 3478 - user_pkt = (struct goya_packet *) (uintptr_t) 3479 - (parser->user_cb->kernel_address + cb_parsed_length); 3478 + user_pkt = parser->user_cb->kernel_address + cb_parsed_length; 3480 3479 3481 3480 pkt_id = (enum packet_id) ( 3482 3481 (le64_to_cpu(user_pkt->header) & ··· 3712 3713 u32 new_pkt_size = 0; 3713 3714 struct goya_packet *user_pkt, *kernel_pkt; 3714 3715 3715 - user_pkt = (struct goya_packet *) (uintptr_t) 3716 - (parser->user_cb->kernel_address + cb_parsed_length); 3717 - kernel_pkt = (struct goya_packet *) (uintptr_t) 3718 - (parser->patched_cb->kernel_address + 3719 - cb_patched_cur_length); 3716 + user_pkt = parser->user_cb->kernel_address + cb_parsed_length; 3717 + kernel_pkt = parser->patched_cb->kernel_address + 3718 + cb_patched_cur_length; 3720 3719 3721 3720 pkt_id = (enum packet_id) ( 3722 3721 (le64_to_cpu(user_pkt->header) & ··· 3838 3841 * The check that parser->user_cb_size <= parser->user_cb->size was done 3839 3842 * in validate_queue_index(). 3840 3843 */ 3841 - memcpy((void *) (uintptr_t) parser->patched_cb->kernel_address, 3842 - (void *) (uintptr_t) parser->user_cb->kernel_address, 3844 + memcpy(parser->patched_cb->kernel_address, 3845 + parser->user_cb->kernel_address, 3843 3846 parser->user_cb_size); 3844 3847 3845 3848 patched_cb_size = parser->patched_cb_size; ··· 3971 3974 return goya_parse_cb_no_mmu(hdev, parser); 3972 3975 } 3973 3976 3974 - void goya_add_end_of_cb_packets(struct hl_device *hdev, u64 kernel_address, 3977 + void goya_add_end_of_cb_packets(struct hl_device *hdev, void *kernel_address, 3975 3978 u32 len, u64 cq_addr, u32 cq_val, u32 msix_vec, 3976 3979 bool eb) 3977 3980 { 3978 3981 struct packet_msg_prot *cq_pkt; 3979 3982 u32 tmp; 3980 3983 3981 - cq_pkt = (struct packet_msg_prot *) (uintptr_t) 3982 - (kernel_address + len - (sizeof(struct packet_msg_prot) * 2)); 3984 + cq_pkt = kernel_address + len - (sizeof(struct packet_msg_prot) * 2); 3983 3985 3984 3986 tmp = (PACKET_MSG_PROT << GOYA_PKT_CTL_OPCODE_SHIFT) | 3985 3987 (1 << GOYA_PKT_CTL_EB_SHIFT) | ··· 4742 4746 if (!cb) 4743 4747 return -ENOMEM; 4744 4748 4745 - lin_dma_pkt = (struct packet_lin_dma *) (uintptr_t) cb->kernel_address; 4749 + lin_dma_pkt = cb->kernel_address; 4746 4750 4747 4751 do { 4748 4752 memset(lin_dma_pkt, 0, sizeof(*lin_dma_pkt));
+1 -1
drivers/misc/habanalabs/goya/goyaP.h
··· 217 217 void goya_handle_eqe(struct hl_device *hdev, struct hl_eq_entry *eq_entry); 218 218 void *goya_get_events_stat(struct hl_device *hdev, bool aggregate, u32 *size); 219 219 220 - void goya_add_end_of_cb_packets(struct hl_device *hdev, u64 kernel_address, 220 + void goya_add_end_of_cb_packets(struct hl_device *hdev, void *kernel_address, 221 221 u32 len, u64 cq_addr, u32 cq_val, u32 msix_vec, 222 222 bool eb); 223 223 int goya_cs_parser(struct hl_device *hdev, struct hl_cs_parser *parser);
-1
drivers/misc/habanalabs/include/gaudi/gaudi_masks.h
··· 421 421 422 422 #define QM_ARB_ERR_MSG_EN_MASK (\ 423 423 QM_ARB_ERR_MSG_EN_CHOISE_OVF_MASK |\ 424 - QM_ARB_ERR_MSG_EN_CHOISE_WDT_MASK |\ 425 424 QM_ARB_ERR_MSG_EN_AXI_LBW_ERR_MASK) 426 425 427 426 #define PCIE_AUX_FLR_CTRL_HW_CTRL_MASK 0x1
+2 -2
drivers/misc/mei/client.h
··· 182 182 * 183 183 * @cl: host client 184 184 * 185 - * Return: mtu 185 + * Return: mtu or 0 if client is not connected 186 186 */ 187 187 static inline size_t mei_cl_mtu(const struct mei_cl *cl) 188 188 { 189 - return cl->me_cl->props.max_msg_length; 189 + return cl->me_cl ? cl->me_cl->props.max_msg_length : 0; 190 190 } 191 191 192 192 /**
+1 -13
drivers/mmc/host/renesas_sdhi_core.c
··· 572 572 TMIO_MASK_INIT_RCAR2); 573 573 } 574 574 575 - /* 576 - * This is a temporary workaround! This driver used 'hw_reset' wrongly and the 577 - * fix for that showed a regression. So, we mimic the old behaviour until the 578 - * proper solution is found. 579 - */ 580 - static void renesas_sdhi_hw_reset(struct mmc_host *mmc) 581 - { 582 - struct tmio_mmc_host *host = mmc_priv(mmc); 583 - renesas_sdhi_reset(host); 584 - } 585 - 586 575 #define SH_MOBILE_SDHI_MIN_TAP_ROW 3 587 576 588 577 static int renesas_sdhi_select_tuning(struct tmio_mmc_host *host) ··· 1009 1020 if (of_data && of_data->scc_offset) { 1010 1021 priv->scc_ctl = host->ctl + of_data->scc_offset; 1011 1022 host->reset = renesas_sdhi_reset; 1012 - host->ops.hw_reset = renesas_sdhi_hw_reset; 1013 - host->mmc->caps |= MMC_CAP_HW_RESET; 1014 1023 } 1015 1024 } 1016 1025 ··· 1147 1160 1148 1161 tmio_mmc_host_remove(host); 1149 1162 renesas_sdhi_clk_disable(host); 1163 + tmio_mmc_host_free(host); 1150 1164 1151 1165 return 0; 1152 1166 }
+2
drivers/mmc/host/sdhci-of-esdhc.c
··· 1324 1324 1325 1325 static struct soc_device_attribute soc_unreliable_pulse_detection[] = { 1326 1326 { .family = "QorIQ LX2160A", .revision = "1.0", }, 1327 + { .family = "QorIQ LX2160A", .revision = "2.0", }, 1328 + { .family = "QorIQ LS1028A", .revision = "1.0", }, 1327 1329 { }, 1328 1330 }; 1329 1331
+5 -2
drivers/mmc/host/tmio_mmc_core.c
··· 175 175 if (host->reset) 176 176 host->reset(host); 177 177 178 + tmio_mmc_abort_dma(host); 179 + 178 180 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 179 181 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 180 182 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); ··· 225 223 226 224 /* Ready for new calls */ 227 225 host->mrq = NULL; 228 - 229 - tmio_mmc_abort_dma(host); 230 226 mmc_request_done(host->mmc, mrq); 231 227 } 232 228 ··· 927 927 switch (ios->power_mode) { 928 928 case MMC_POWER_OFF: 929 929 tmio_mmc_power_off(host); 930 + /* Downgrade ensures a sane state for tuning HW (e.g. SCC) */ 931 + if (host->mmc->ops->hs400_downgrade) 932 + host->mmc->ops->hs400_downgrade(host->mmc); 930 933 host->set_clock(host, 0); 931 934 break; 932 935 case MMC_POWER_UP:
+1 -1
drivers/net/can/dev.c
··· 592 592 593 593 cf->can_id |= CAN_ERR_RESTARTED; 594 594 595 - netif_rx(skb); 595 + netif_rx_ni(skb); 596 596 597 597 stats->rx_packets++; 598 598 stats->rx_bytes += cf->can_dlc;
+16 -12
drivers/net/can/flexcan.c
··· 728 728 int err; 729 729 730 730 err = pm_runtime_get_sync(priv->dev); 731 - if (err < 0) 731 + if (err < 0) { 732 + pm_runtime_put_noidle(priv->dev); 732 733 return err; 734 + } 733 735 734 736 err = __flexcan_get_berr_counter(dev, bec); 735 737 ··· 1567 1565 priv->write(reg_ctrl2, &regs->ctrl2); 1568 1566 } 1569 1567 1570 - err = flexcan_transceiver_enable(priv); 1571 - if (err) 1572 - goto out_chip_disable; 1573 - 1574 1568 /* synchronize with the can bus */ 1575 1569 err = flexcan_chip_unfreeze(priv); 1576 1570 if (err) 1577 - goto out_transceiver_disable; 1571 + goto out_chip_disable; 1578 1572 1579 1573 priv->can.state = CAN_STATE_ERROR_ACTIVE; 1580 1574 ··· 1588 1590 1589 1591 return 0; 1590 1592 1591 - out_transceiver_disable: 1592 - flexcan_transceiver_disable(priv); 1593 1593 out_chip_disable: 1594 1594 flexcan_chip_disable(priv); 1595 1595 return err; ··· 1617 1621 priv->write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL, 1618 1622 &regs->ctrl); 1619 1623 1620 - flexcan_transceiver_disable(priv); 1621 1624 priv->can.state = CAN_STATE_STOPPED; 1622 1625 1623 1626 return 0; ··· 1649 1654 } 1650 1655 1651 1656 err = pm_runtime_get_sync(priv->dev); 1652 - if (err < 0) 1657 + if (err < 0) { 1658 + pm_runtime_put_noidle(priv->dev); 1653 1659 return err; 1660 + } 1654 1661 1655 1662 err = open_candev(dev); 1656 1663 if (err) 1657 1664 goto out_runtime_put; 1658 1665 1659 - err = request_irq(dev->irq, flexcan_irq, IRQF_SHARED, dev->name, dev); 1666 + err = flexcan_transceiver_enable(priv); 1660 1667 if (err) 1661 1668 goto out_close; 1669 + 1670 + err = request_irq(dev->irq, flexcan_irq, IRQF_SHARED, dev->name, dev); 1671 + if (err) 1672 + goto out_transceiver_disable; 1662 1673 1663 1674 if (priv->can.ctrlmode & CAN_CTRLMODE_FD) 1664 1675 priv->mb_size = sizeof(struct flexcan_mb) + CANFD_MAX_DLEN; ··· 1717 1716 can_rx_offload_del(&priv->offload); 1718 1717 out_free_irq: 1719 1718 free_irq(dev->irq, dev); 1719 + out_transceiver_disable: 1720 + flexcan_transceiver_disable(priv); 1720 1721 out_close: 1721 1722 close_candev(dev); 1722 1723 out_runtime_put: ··· 1737 1734 1738 1735 can_rx_offload_del(&priv->offload); 1739 1736 free_irq(dev->irq, dev); 1737 + flexcan_transceiver_disable(priv); 1740 1738 1741 1739 close_candev(dev); 1742 1740 pm_runtime_put(priv->dev); ··· 1856 1852 return -EINVAL; 1857 1853 1858 1854 /* stop mode property format is: 1859 - * <&gpr req_gpr>. 1855 + * <&gpr req_gpr req_bit>. 1860 1856 */ 1861 1857 ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val, 1862 1858 ARRAY_SIZE(out_val));
+2 -2
drivers/net/can/kvaser_pciefd.c
··· 287 287 static const struct can_bittiming_const kvaser_pciefd_bittiming_const = { 288 288 .name = KVASER_PCIEFD_DRV_NAME, 289 289 .tseg1_min = 1, 290 - .tseg1_max = 255, 290 + .tseg1_max = 512, 291 291 .tseg2_min = 1, 292 292 .tseg2_max = 32, 293 293 .sjw_max = 16, 294 294 .brp_min = 1, 295 - .brp_max = 4096, 295 + .brp_max = 8192, 296 296 .brp_inc = 1, 297 297 }; 298 298
+2 -1
drivers/net/can/m_can/Kconfig
··· 16 16 17 17 config CAN_M_CAN_TCAN4X5X 18 18 depends on CAN_M_CAN 19 - depends on REGMAP_SPI 19 + depends on SPI 20 + select REGMAP_SPI 20 21 tristate "TCAN4X5X M_CAN device" 21 22 help 22 23 Say Y here if you want support for Texas Instruments TCAN4x5x
+13 -5
drivers/net/can/m_can/m_can.c
··· 665 665 unsigned int ecr; 666 666 667 667 switch (new_state) { 668 - case CAN_STATE_ERROR_ACTIVE: 668 + case CAN_STATE_ERROR_WARNING: 669 669 /* error warning state */ 670 670 cdev->can.can_stats.error_warning++; 671 671 cdev->can.state = CAN_STATE_ERROR_WARNING; ··· 694 694 __m_can_get_berr_counter(dev, &bec); 695 695 696 696 switch (new_state) { 697 - case CAN_STATE_ERROR_ACTIVE: 697 + case CAN_STATE_ERROR_WARNING: 698 698 /* error warning state */ 699 699 cf->can_id |= CAN_ERR_CRTL; 700 700 cf->data[1] = (bec.txerr > bec.rxerr) ? ··· 956 956 struct net_device_stats *stats = &dev->stats; 957 957 u32 ir; 958 958 959 + if (pm_runtime_suspended(cdev->dev)) 960 + return IRQ_NONE; 959 961 ir = m_can_read(cdev, M_CAN_IR); 960 962 if (!ir) 961 963 return IRQ_NONE; ··· 1416 1414 /* disable all interrupts */ 1417 1415 m_can_disable_all_interrupts(cdev); 1418 1416 1417 + /* Set init mode to disengage from the network */ 1418 + m_can_config_endisable(cdev, true); 1419 + 1419 1420 /* set the state as STOPPED */ 1420 1421 cdev->can.state = CAN_STATE_STOPPED; 1421 1422 } ··· 1817 1812 } 1818 1813 EXPORT_SYMBOL_GPL(m_can_class_allocate_dev); 1819 1814 1815 + void m_can_class_free_dev(struct net_device *net) 1816 + { 1817 + free_candev(net); 1818 + } 1819 + EXPORT_SYMBOL_GPL(m_can_class_free_dev); 1820 + 1820 1821 int m_can_class_register(struct m_can_classdev *m_can_dev) 1821 1822 { 1822 1823 int ret; ··· 1861 1850 if (ret) { 1862 1851 if (m_can_dev->pm_clock_support) 1863 1852 pm_runtime_disable(m_can_dev->dev); 1864 - free_candev(m_can_dev->net); 1865 1853 } 1866 1854 1867 1855 return ret; ··· 1918 1908 unregister_candev(m_can_dev->net); 1919 1909 1920 1910 m_can_clk_stop(m_can_dev); 1921 - 1922 - free_candev(m_can_dev->net); 1923 1911 } 1924 1912 EXPORT_SYMBOL_GPL(m_can_class_unregister); 1925 1913
+1
drivers/net/can/m_can/m_can.h
··· 99 99 }; 100 100 101 101 struct m_can_classdev *m_can_class_allocate_dev(struct device *dev); 102 + void m_can_class_free_dev(struct net_device *net); 102 103 int m_can_class_register(struct m_can_classdev *cdev); 103 104 void m_can_class_unregister(struct m_can_classdev *cdev); 104 105 int m_can_class_get_clocks(struct m_can_classdev *cdev);
+15 -8
drivers/net/can/m_can/m_can_platform.c
··· 67 67 return -ENOMEM; 68 68 69 69 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); 70 - if (!priv) 71 - return -ENOMEM; 70 + if (!priv) { 71 + ret = -ENOMEM; 72 + goto probe_fail; 73 + } 72 74 73 75 mcan_class->device_data = priv; 74 76 75 - m_can_class_get_clocks(mcan_class); 77 + ret = m_can_class_get_clocks(mcan_class); 78 + if (ret) 79 + goto probe_fail; 76 80 77 81 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can"); 78 82 addr = devm_ioremap_resource(&pdev->dev, res); 79 83 irq = platform_get_irq_byname(pdev, "int0"); 80 84 if (IS_ERR(addr) || irq < 0) { 81 85 ret = -EINVAL; 82 - goto failed_ret; 86 + goto probe_fail; 83 87 } 84 88 85 89 /* message ram could be shared */ 86 90 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram"); 87 91 if (!res) { 88 92 ret = -ENODEV; 89 - goto failed_ret; 93 + goto probe_fail; 90 94 } 91 95 92 96 mram_addr = devm_ioremap(&pdev->dev, res->start, resource_size(res)); 93 97 if (!mram_addr) { 94 98 ret = -ENOMEM; 95 - goto failed_ret; 99 + goto probe_fail; 96 100 } 97 101 98 102 priv->base = addr; ··· 115 111 116 112 m_can_init_ram(mcan_class); 117 113 118 - ret = m_can_class_register(mcan_class); 114 + return m_can_class_register(mcan_class); 119 115 120 - failed_ret: 116 + probe_fail: 117 + m_can_class_free_dev(mcan_class->net); 121 118 return ret; 122 119 } 123 120 ··· 138 133 struct m_can_classdev *mcan_class = netdev_priv(dev); 139 134 140 135 m_can_class_unregister(mcan_class); 136 + 137 + m_can_class_free_dev(mcan_class->net); 141 138 142 139 platform_set_drvdata(pdev, NULL); 143 140
+23 -9
drivers/net/can/m_can/tcan4x5x.c
··· 440 440 return -ENOMEM; 441 441 442 442 priv = devm_kzalloc(&spi->dev, sizeof(*priv), GFP_KERNEL); 443 - if (!priv) 444 - return -ENOMEM; 443 + if (!priv) { 444 + ret = -ENOMEM; 445 + goto out_m_can_class_free_dev; 446 + } 445 447 446 448 priv->power = devm_regulator_get_optional(&spi->dev, "vsup"); 447 - if (PTR_ERR(priv->power) == -EPROBE_DEFER) 448 - return -EPROBE_DEFER; 449 - else 449 + if (PTR_ERR(priv->power) == -EPROBE_DEFER) { 450 + ret = -EPROBE_DEFER; 451 + goto out_m_can_class_free_dev; 452 + } else { 450 453 priv->power = NULL; 454 + } 451 455 452 456 mcan_class->device_data = priv; 453 457 ··· 464 460 } 465 461 466 462 /* Sanity check */ 467 - if (freq < 20000000 || freq > TCAN4X5X_EXT_CLK_DEF) 468 - return -ERANGE; 463 + if (freq < 20000000 || freq > TCAN4X5X_EXT_CLK_DEF) { 464 + ret = -ERANGE; 465 + goto out_m_can_class_free_dev; 466 + } 469 467 470 468 priv->reg_offset = TCAN4X5X_MCAN_OFFSET; 471 469 priv->mram_start = TCAN4X5X_MRAM_START; ··· 493 487 494 488 priv->regmap = devm_regmap_init(&spi->dev, &tcan4x5x_bus, 495 489 &spi->dev, &tcan4x5x_regmap); 490 + if (IS_ERR(priv->regmap)) { 491 + ret = PTR_ERR(priv->regmap); 492 + goto out_clk; 493 + } 496 494 497 495 ret = tcan4x5x_power_enable(priv->power, 1); 498 496 if (ret) ··· 524 514 clk_disable_unprepare(mcan_class->cclk); 525 515 clk_disable_unprepare(mcan_class->hclk); 526 516 } 527 - 517 + out_m_can_class_free_dev: 518 + m_can_class_free_dev(mcan_class->net); 528 519 dev_err(&spi->dev, "Probe failed, err=%d\n", ret); 520 + 529 521 return ret; 530 522 } 531 523 ··· 535 523 { 536 524 struct tcan4x5x_priv *priv = spi_get_drvdata(spi); 537 525 526 + m_can_class_unregister(priv->mcan_dev); 527 + 538 528 tcan4x5x_power_enable(priv->power, 0); 539 529 540 - m_can_class_unregister(priv->mcan_dev); 530 + m_can_class_free_dev(priv->mcan_dev->net); 541 531 542 532 return 0; 543 533 }
+8 -5
drivers/net/can/ti_hecc.c
··· 881 881 priv->base = devm_platform_ioremap_resource_byname(pdev, "hecc"); 882 882 if (IS_ERR(priv->base)) { 883 883 dev_err(&pdev->dev, "hecc ioremap failed\n"); 884 - return PTR_ERR(priv->base); 884 + err = PTR_ERR(priv->base); 885 + goto probe_exit_candev; 885 886 } 886 887 887 888 /* handle hecc-ram memory */ ··· 890 889 "hecc-ram"); 891 890 if (IS_ERR(priv->hecc_ram)) { 892 891 dev_err(&pdev->dev, "hecc-ram ioremap failed\n"); 893 - return PTR_ERR(priv->hecc_ram); 892 + err = PTR_ERR(priv->hecc_ram); 893 + goto probe_exit_candev; 894 894 } 895 895 896 896 /* handle mbx memory */ 897 897 priv->mbx = devm_platform_ioremap_resource_byname(pdev, "mbx"); 898 898 if (IS_ERR(priv->mbx)) { 899 899 dev_err(&pdev->dev, "mbx ioremap failed\n"); 900 - return PTR_ERR(priv->mbx); 900 + err = PTR_ERR(priv->mbx); 901 + goto probe_exit_candev; 901 902 } 902 903 903 904 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 904 905 if (!irq) { 905 906 dev_err(&pdev->dev, "No irq resource\n"); 906 - goto probe_exit; 907 + goto probe_exit_candev; 907 908 } 908 909 909 910 priv->ndev = ndev; ··· 969 966 clk_put(priv->clk); 970 967 probe_exit_candev: 971 968 free_candev(ndev); 972 - probe_exit: 969 + 973 970 return err; 974 971 } 975 972
+1 -1
drivers/net/can/usb/kvaser_usb/kvaser_usb_hydra.c
··· 367 367 .tseg2_max = 32, 368 368 .sjw_max = 16, 369 369 .brp_min = 1, 370 - .brp_max = 4096, 370 + .brp_max = 8192, 371 371 .brp_inc = 1, 372 372 }; 373 373
+2 -2
drivers/net/can/usb/mcba_usb.c
··· 326 326 if (!ctx) 327 327 return NETDEV_TX_BUSY; 328 328 329 - can_put_echo_skb(skb, priv->netdev, ctx->ndx); 330 - 331 329 if (cf->can_id & CAN_EFF_FLAG) { 332 330 /* SIDH | SIDL | EIDH | EIDL 333 331 * 28 - 21 | 20 19 18 x x x 17 16 | 15 - 8 | 7 - 0 ··· 354 356 355 357 if (cf->can_id & CAN_RTR_FLAG) 356 358 usb_msg.dlc |= MCBA_DLC_RTR_MASK; 359 + 360 + can_put_echo_skb(skb, priv->netdev, ctx->ndx); 357 361 358 362 err = mcba_usb_xmit(priv, (struct mcba_usb_msg *)&usb_msg, ctx); 359 363 if (err)
+2 -2
drivers/net/can/usb/peak_usb/pcan_usb_core.c
··· 156 156 if (time_ref->ts_dev_1 < time_ref->ts_dev_2) { 157 157 /* case when event time (tsw) wraps */ 158 158 if (ts < time_ref->ts_dev_1) 159 - delta_ts = 1 << time_ref->adapter->ts_used_bits; 159 + delta_ts = BIT_ULL(time_ref->adapter->ts_used_bits); 160 160 161 161 /* Otherwise, sync time counter (ts_dev_2) has wrapped: 162 162 * handle case when event time (tsn) hasn't. ··· 168 168 * tsn ts 169 169 */ 170 170 } else if (time_ref->ts_dev_1 < ts) { 171 - delta_ts = -(1 << time_ref->adapter->ts_used_bits); 171 + delta_ts = -BIT_ULL(time_ref->adapter->ts_used_bits); 172 172 } 173 173 174 174 /* add delay between last sync and event timestamps */
+11
drivers/net/dsa/lantiq_gswip.c
··· 26 26 */ 27 27 28 28 #include <linux/clk.h> 29 + #include <linux/delay.h> 29 30 #include <linux/etherdevice.h> 30 31 #include <linux/firmware.h> 31 32 #include <linux/if_bridge.h> ··· 1837 1836 goto remove_gphy; 1838 1837 i++; 1839 1838 } 1839 + 1840 + /* The standalone PHY11G requires 300ms to be fully 1841 + * initialized and ready for any MDIO communication after being 1842 + * taken out of reset. For the SoC-internal GPHY variant there 1843 + * is no (known) documentation for the minimum time after a 1844 + * reset. Use the same value as for the standalone variant as 1845 + * some users have reported internal PHYs not being detected 1846 + * without any delay. 1847 + */ 1848 + msleep(300); 1840 1849 1841 1850 return 0; 1842 1851
+2
drivers/net/dsa/mv88e6xxx/chip.c
··· 2297 2297 usleep_range(10000, 20000); 2298 2298 gpiod_set_value_cansleep(gpiod, 0); 2299 2299 usleep_range(10000, 20000); 2300 + 2301 + mv88e6xxx_g1_wait_eeprom_done(chip); 2300 2302 } 2301 2303 } 2302 2304
+31
drivers/net/dsa/mv88e6xxx/global1.c
··· 75 75 return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_STS, bit, 1); 76 76 } 77 77 78 + void mv88e6xxx_g1_wait_eeprom_done(struct mv88e6xxx_chip *chip) 79 + { 80 + const unsigned long timeout = jiffies + 1 * HZ; 81 + u16 val; 82 + int err; 83 + 84 + /* Wait up to 1 second for the switch to finish reading the 85 + * EEPROM. 86 + */ 87 + while (time_before(jiffies, timeout)) { 88 + err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_STS, &val); 89 + if (err) { 90 + dev_err(chip->dev, "Error reading status"); 91 + return; 92 + } 93 + 94 + /* If the switch is still resetting, it may not 95 + * respond on the bus, and so MDIO read returns 96 + * 0xffff. Differentiate between that, and waiting for 97 + * the EEPROM to be done by bit 0 being set. 98 + */ 99 + if (val != 0xffff && 100 + val & BIT(MV88E6XXX_G1_STS_IRQ_EEPROM_DONE)) 101 + return; 102 + 103 + usleep_range(1000, 2000); 104 + } 105 + 106 + dev_err(chip->dev, "Timeout waiting for EEPROM done"); 107 + } 108 + 78 109 /* Offset 0x01: Switch MAC Address Register Bytes 0 & 1 79 110 * Offset 0x02: Switch MAC Address Register Bytes 2 & 3 80 111 * Offset 0x03: Switch MAC Address Register Bytes 4 & 5
+1
drivers/net/dsa/mv88e6xxx/global1.h
··· 278 278 int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip); 279 279 int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip); 280 280 int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip); 281 + void mv88e6xxx_g1_wait_eeprom_done(struct mv88e6xxx_chip *chip); 281 282 282 283 int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip); 283 284 int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);
+50 -11
drivers/net/dsa/mv88e6xxx/global1_vtu.c
··· 125 125 * Offset 0x08: VTU/STU Data Register 2 126 126 * Offset 0x09: VTU/STU Data Register 3 127 127 */ 128 - 129 - static int mv88e6185_g1_vtu_data_read(struct mv88e6xxx_chip *chip, 130 - struct mv88e6xxx_vtu_entry *entry) 128 + static int mv88e6185_g1_vtu_stu_data_read(struct mv88e6xxx_chip *chip, 129 + u16 *regs) 131 130 { 132 - u16 regs[3]; 133 131 int i; 134 132 135 133 /* Read all 3 VTU/STU Data registers */ ··· 140 142 return err; 141 143 } 142 144 143 - /* Extract MemberTag and PortState data */ 145 + return 0; 146 + } 147 + 148 + static int mv88e6185_g1_vtu_data_read(struct mv88e6xxx_chip *chip, 149 + struct mv88e6xxx_vtu_entry *entry) 150 + { 151 + u16 regs[3]; 152 + int err; 153 + int i; 154 + 155 + err = mv88e6185_g1_vtu_stu_data_read(chip, regs); 156 + if (err) 157 + return err; 158 + 159 + /* Extract MemberTag data */ 144 160 for (i = 0; i < mv88e6xxx_num_ports(chip); ++i) { 145 161 unsigned int member_offset = (i % 4) * 4; 146 - unsigned int state_offset = member_offset + 2; 147 162 148 163 entry->member[i] = (regs[i / 4] >> member_offset) & 0x3; 164 + } 165 + 166 + return 0; 167 + } 168 + 169 + static int mv88e6185_g1_stu_data_read(struct mv88e6xxx_chip *chip, 170 + struct mv88e6xxx_vtu_entry *entry) 171 + { 172 + u16 regs[3]; 173 + int err; 174 + int i; 175 + 176 + err = mv88e6185_g1_vtu_stu_data_read(chip, regs); 177 + if (err) 178 + return err; 179 + 180 + /* Extract PortState data */ 181 + for (i = 0; i < mv88e6xxx_num_ports(chip); ++i) { 182 + unsigned int state_offset = (i % 4) * 4 + 2; 183 + 149 184 entry->state[i] = (regs[i / 4] >> state_offset) & 0x3; 150 185 } 151 186 ··· 380 349 if (err) 381 350 return err; 382 351 352 + err = mv88e6185_g1_stu_data_read(chip, entry); 353 + if (err) 354 + return err; 355 + 383 356 /* VTU DBNum[3:0] are located in VTU Operation 3:0 384 357 * VTU DBNum[7:4] are located in VTU Operation 11:8 385 358 */ ··· 409 374 return err; 410 375 411 376 if (entry->valid) { 412 - /* Fetch (and mask) VLAN PortState data from the STU */ 413 - err = mv88e6xxx_g1_vtu_stu_get(chip, entry); 414 - if (err) 415 - return err; 416 - 417 377 err = mv88e6185_g1_vtu_data_read(chip, entry); 418 378 if (err) 419 379 return err; 420 380 421 381 err = mv88e6xxx_g1_vtu_fid_read(chip, entry); 382 + if (err) 383 + return err; 384 + 385 + /* Fetch VLAN PortState data from the STU */ 386 + err = mv88e6xxx_g1_vtu_stu_get(chip, entry); 387 + if (err) 388 + return err; 389 + 390 + err = mv88e6185_g1_stu_data_read(chip, entry); 422 391 if (err) 423 392 return err; 424 393 }
+2 -2
drivers/net/ethernet/atheros/atl1c/atl1c_main.c
··· 2543 2543 * various kernel subsystems to support the mechanics required by a 2544 2544 * fixed-high-32-bit system. 2545 2545 */ 2546 - if ((dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) || 2547 - (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0)) { 2546 + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2547 + if (err) { 2548 2548 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2549 2549 goto err_dma; 2550 2550 }
+2 -2
drivers/net/ethernet/atheros/atl1e/atl1e_main.c
··· 2312 2312 * various kernel subsystems to support the mechanics required by a 2313 2313 * fixed-high-32-bit system. 2314 2314 */ 2315 - if ((dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) || 2316 - (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0)) { 2315 + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2316 + if (err) { 2317 2317 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n"); 2318 2318 goto err_dma; 2319 2319 }
+2 -1
drivers/net/ethernet/broadcom/b44.c
··· 2383 2383 goto err_out_free_dev; 2384 2384 } 2385 2385 2386 - if (dma_set_mask_and_coherent(sdev->dma_dev, DMA_BIT_MASK(30))) { 2386 + err = dma_set_mask_and_coherent(sdev->dma_dev, DMA_BIT_MASK(30)); 2387 + if (err) { 2387 2388 dev_err(sdev->dev, 2388 2389 "Required 30BIT DMA mask unsupported by the system\n"); 2389 2390 goto err_out_powerdown;
+3 -1
drivers/net/ethernet/broadcom/bnxt/bnxt.c
··· 4099 4099 bnxt_free_ntp_fltrs(bp, irq_re_init); 4100 4100 if (irq_re_init) { 4101 4101 bnxt_free_ring_stats(bp); 4102 - if (!(bp->fw_cap & BNXT_FW_CAP_PORT_STATS_NO_RESET)) 4102 + if (!(bp->fw_cap & BNXT_FW_CAP_PORT_STATS_NO_RESET) || 4103 + test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) 4103 4104 bnxt_free_port_stats(bp); 4104 4105 bnxt_free_ring_grps(bp); 4105 4106 bnxt_free_vnics(bp); ··· 7758 7757 { 7759 7758 u64 sw_tmp; 7760 7759 7760 + hw &= mask; 7761 7761 sw_tmp = (*sw & ~mask) | hw; 7762 7762 if (hw < (*sw & mask)) 7763 7763 sw_tmp += mask + 1;
+4 -1
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c
··· 2079 2079 struct hwrm_nvm_get_dev_info_input req = {0}; 2080 2080 int rc; 2081 2081 2082 + if (BNXT_VF(bp)) 2083 + return -EOPNOTSUPP; 2084 + 2082 2085 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DEV_INFO, -1, -1); 2083 2086 mutex_lock(&bp->hwrm_cmd_lock); 2084 2087 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT); ··· 3000 2997 /* Read A2 portion of the EEPROM */ 3001 2998 if (length) { 3002 2999 start -= ETH_MODULE_SFF_8436_LEN; 3003 - rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, 3000 + rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 0, 3004 3001 start, length, data); 3005 3002 } 3006 3003 return rc;
+4
drivers/net/ethernet/faraday/ftgmac100.c
··· 1926 1926 err_phy_connect: 1927 1927 ftgmac100_phy_disconnect(netdev); 1928 1928 err_ncsi_dev: 1929 + if (priv->ndev) 1930 + ncsi_unregister_dev(priv->ndev); 1929 1931 ftgmac100_destroy_mdio(netdev); 1930 1932 err_setup_mdio: 1931 1933 iounmap(priv->base); ··· 1947 1945 netdev = platform_get_drvdata(pdev); 1948 1946 priv = netdev_priv(netdev); 1949 1947 1948 + if (priv->ndev) 1949 + ncsi_unregister_dev(priv->ndev); 1950 1950 unregister_netdev(netdev); 1951 1951 1952 1952 clk_disable_unprepare(priv->rclk);
+1
drivers/net/ethernet/freescale/enetc/Kconfig
··· 16 16 config FSL_ENETC_VF 17 17 tristate "ENETC VF driver" 18 18 depends on PCI && PCI_MSI 19 + select FSL_ENETC_MDIO 19 20 select PHYLINK 20 21 select DIMLIB 21 22 help
+45 -17
drivers/net/ethernet/freescale/enetc/enetc.c
··· 33 33 return NETDEV_TX_BUSY; 34 34 } 35 35 36 + enetc_lock_mdio(); 36 37 count = enetc_map_tx_buffs(tx_ring, skb, priv->active_offloads); 38 + enetc_unlock_mdio(); 39 + 37 40 if (unlikely(!count)) 38 41 goto drop_packet_err; 39 42 ··· 202 199 skb_tx_timestamp(skb); 203 200 204 201 /* let H/W know BD ring has been updated */ 205 - enetc_wr_reg(tx_ring->tpir, i); /* includes wmb() */ 202 + enetc_wr_reg_hot(tx_ring->tpir, i); /* includes wmb() */ 206 203 207 204 return count; 208 205 ··· 225 222 struct enetc_int_vector *v = data; 226 223 int i; 227 224 225 + enetc_lock_mdio(); 226 + 228 227 /* disable interrupts */ 229 - enetc_wr_reg(v->rbier, 0); 230 - enetc_wr_reg(v->ricr1, v->rx_ictt); 228 + enetc_wr_reg_hot(v->rbier, 0); 229 + enetc_wr_reg_hot(v->ricr1, v->rx_ictt); 231 230 232 231 for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS) 233 - enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 0); 232 + enetc_wr_reg_hot(v->tbier_base + ENETC_BDR_OFF(i), 0); 233 + 234 + enetc_unlock_mdio(); 234 235 235 236 napi_schedule(&v->napi); 236 237 ··· 301 294 302 295 v->rx_napi_work = false; 303 296 297 + enetc_lock_mdio(); 298 + 304 299 /* enable interrupts */ 305 - enetc_wr_reg(v->rbier, ENETC_RBIER_RXTIE); 300 + enetc_wr_reg_hot(v->rbier, ENETC_RBIER_RXTIE); 306 301 307 302 for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS) 308 - enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 309 - ENETC_TBIER_TXTIE); 303 + enetc_wr_reg_hot(v->tbier_base + ENETC_BDR_OFF(i), 304 + ENETC_TBIER_TXTIE); 305 + 306 + enetc_unlock_mdio(); 310 307 311 308 return work_done; 312 309 } 313 310 314 311 static int enetc_bd_ready_count(struct enetc_bdr *tx_ring, int ci) 315 312 { 316 - int pi = enetc_rd_reg(tx_ring->tcir) & ENETC_TBCIR_IDX_MASK; 313 + int pi = enetc_rd_reg_hot(tx_ring->tcir) & ENETC_TBCIR_IDX_MASK; 317 314 318 315 return pi >= ci ? pi - ci : tx_ring->bd_count - ci + pi; 319 316 } ··· 357 346 358 347 i = tx_ring->next_to_clean; 359 348 tx_swbd = &tx_ring->tx_swbd[i]; 349 + 350 + enetc_lock_mdio(); 360 351 bds_to_clean = enetc_bd_ready_count(tx_ring, i); 352 + enetc_unlock_mdio(); 361 353 362 354 do_tstamp = false; 363 355 ··· 403 389 tx_swbd = tx_ring->tx_swbd; 404 390 } 405 391 392 + enetc_lock_mdio(); 393 + 406 394 /* BD iteration loop end */ 407 395 if (is_eof) { 408 396 tx_frm_cnt++; 409 397 /* re-arm interrupt source */ 410 - enetc_wr_reg(tx_ring->idr, BIT(tx_ring->index) | 411 - BIT(16 + tx_ring->index)); 398 + enetc_wr_reg_hot(tx_ring->idr, BIT(tx_ring->index) | 399 + BIT(16 + tx_ring->index)); 412 400 } 413 401 414 402 if (unlikely(!bds_to_clean)) 415 403 bds_to_clean = enetc_bd_ready_count(tx_ring, i); 404 + 405 + enetc_unlock_mdio(); 416 406 } 417 407 418 408 tx_ring->next_to_clean = i; ··· 493 475 if (likely(j)) { 494 476 rx_ring->next_to_alloc = i; /* keep track from page reuse */ 495 477 rx_ring->next_to_use = i; 496 - /* update ENETC's consumer index */ 497 - enetc_wr_reg(rx_ring->rcir, i); 498 478 } 499 479 500 480 return j; ··· 510 494 u64 tstamp; 511 495 512 496 if (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_TSTMP) { 513 - lo = enetc_rd(hw, ENETC_SICTR0); 514 - hi = enetc_rd(hw, ENETC_SICTR1); 497 + lo = enetc_rd_reg_hot(hw->reg + ENETC_SICTR0); 498 + hi = enetc_rd_reg_hot(hw->reg + ENETC_SICTR1); 515 499 rxbd = enetc_rxbd_ext(rxbd); 516 500 tstamp_lo = le32_to_cpu(rxbd->ext.tstamp); 517 501 if (lo <= tstamp_lo) ··· 660 644 u32 bd_status; 661 645 u16 size; 662 646 647 + enetc_lock_mdio(); 648 + 663 649 if (cleaned_cnt >= ENETC_RXBD_BUNDLE) { 664 650 int count = enetc_refill_rx_ring(rx_ring, cleaned_cnt); 665 651 652 + /* update ENETC's consumer index */ 653 + enetc_wr_reg_hot(rx_ring->rcir, rx_ring->next_to_use); 666 654 cleaned_cnt -= count; 667 655 } 668 656 669 657 rxbd = enetc_rxbd(rx_ring, i); 670 658 bd_status = le32_to_cpu(rxbd->r.lstatus); 671 - if (!bd_status) 659 + if (!bd_status) { 660 + enetc_unlock_mdio(); 672 661 break; 662 + } 673 663 674 - enetc_wr_reg(rx_ring->idr, BIT(rx_ring->index)); 664 + enetc_wr_reg_hot(rx_ring->idr, BIT(rx_ring->index)); 675 665 dma_rmb(); /* for reading other rxbd fields */ 676 666 size = le16_to_cpu(rxbd->r.buf_len); 677 667 skb = enetc_map_rx_buff_to_skb(rx_ring, i, size); 678 - if (!skb) 668 + if (!skb) { 669 + enetc_unlock_mdio(); 679 670 break; 671 + } 680 672 681 673 enetc_get_offloads(rx_ring, rxbd, skb); 682 674 ··· 696 672 697 673 if (unlikely(bd_status & 698 674 ENETC_RXBD_LSTATUS(ENETC_RXBD_ERR_MASK))) { 675 + enetc_unlock_mdio(); 699 676 dev_kfree_skb(skb); 700 677 while (!(bd_status & ENETC_RXBD_LSTATUS_F)) { 701 678 dma_rmb(); ··· 735 710 rx_byte_cnt += skb->len; 736 711 737 712 enetc_process_skb(rx_ring, skb); 713 + 714 + enetc_unlock_mdio(); 738 715 739 716 napi_gro_receive(napi, skb); 740 717 ··· 1212 1185 rx_ring->idr = hw->reg + ENETC_SIRXIDR; 1213 1186 1214 1187 enetc_refill_rx_ring(rx_ring, enetc_bd_unused(rx_ring)); 1188 + enetc_wr(hw, ENETC_SIRXIDR, rx_ring->next_to_use); 1215 1189 1216 1190 /* enable ring */ 1217 1191 enetc_rxbdr_wr(hw, idx, ENETC_RBMR, rbmr);
+109 -6
drivers/net/ethernet/freescale/enetc/enetc_hw.h
··· 324 324 void __iomem *global; 325 325 }; 326 326 327 - /* general register accessors */ 328 - #define enetc_rd_reg(reg) ioread32((reg)) 329 - #define enetc_wr_reg(reg, val) iowrite32((val), (reg)) 327 + /* ENETC register accessors */ 328 + 329 + /* MDIO issue workaround (on LS1028A) - 330 + * Due to a hardware issue, an access to MDIO registers 331 + * that is concurrent with other ENETC register accesses 332 + * may lead to the MDIO access being dropped or corrupted. 333 + * To protect the MDIO accesses a readers-writers locking 334 + * scheme is used, where the MDIO register accesses are 335 + * protected by write locks to insure exclusivity, while 336 + * the remaining ENETC registers are accessed under read 337 + * locks since they only compete with MDIO accesses. 338 + */ 339 + extern rwlock_t enetc_mdio_lock; 340 + 341 + /* use this locking primitive only on the fast datapath to 342 + * group together multiple non-MDIO register accesses to 343 + * minimize the overhead of the lock 344 + */ 345 + static inline void enetc_lock_mdio(void) 346 + { 347 + read_lock(&enetc_mdio_lock); 348 + } 349 + 350 + static inline void enetc_unlock_mdio(void) 351 + { 352 + read_unlock(&enetc_mdio_lock); 353 + } 354 + 355 + /* use these accessors only on the fast datapath under 356 + * the enetc_lock_mdio() locking primitive to minimize 357 + * the overhead of the lock 358 + */ 359 + static inline u32 enetc_rd_reg_hot(void __iomem *reg) 360 + { 361 + lockdep_assert_held(&enetc_mdio_lock); 362 + 363 + return ioread32(reg); 364 + } 365 + 366 + static inline void enetc_wr_reg_hot(void __iomem *reg, u32 val) 367 + { 368 + lockdep_assert_held(&enetc_mdio_lock); 369 + 370 + iowrite32(val, reg); 371 + } 372 + 373 + /* internal helpers for the MDIO w/a */ 374 + static inline u32 _enetc_rd_reg_wa(void __iomem *reg) 375 + { 376 + u32 val; 377 + 378 + enetc_lock_mdio(); 379 + val = ioread32(reg); 380 + enetc_unlock_mdio(); 381 + 382 + return val; 383 + } 384 + 385 + static inline void _enetc_wr_reg_wa(void __iomem *reg, u32 val) 386 + { 387 + enetc_lock_mdio(); 388 + iowrite32(val, reg); 389 + enetc_unlock_mdio(); 390 + } 391 + 392 + static inline u32 _enetc_rd_mdio_reg_wa(void __iomem *reg) 393 + { 394 + unsigned long flags; 395 + u32 val; 396 + 397 + write_lock_irqsave(&enetc_mdio_lock, flags); 398 + val = ioread32(reg); 399 + write_unlock_irqrestore(&enetc_mdio_lock, flags); 400 + 401 + return val; 402 + } 403 + 404 + static inline void _enetc_wr_mdio_reg_wa(void __iomem *reg, u32 val) 405 + { 406 + unsigned long flags; 407 + 408 + write_lock_irqsave(&enetc_mdio_lock, flags); 409 + iowrite32(val, reg); 410 + write_unlock_irqrestore(&enetc_mdio_lock, flags); 411 + } 412 + 330 413 #ifdef ioread64 331 - #define enetc_rd_reg64(reg) ioread64((reg)) 414 + static inline u64 _enetc_rd_reg64(void __iomem *reg) 415 + { 416 + return ioread64(reg); 417 + } 332 418 #else 333 419 /* using this to read out stats on 32b systems */ 334 - static inline u64 enetc_rd_reg64(void __iomem *reg) 420 + static inline u64 _enetc_rd_reg64(void __iomem *reg) 335 421 { 336 422 u32 low, high, tmp; 337 423 ··· 431 345 } 432 346 #endif 433 347 348 + static inline u64 _enetc_rd_reg64_wa(void __iomem *reg) 349 + { 350 + u64 val; 351 + 352 + enetc_lock_mdio(); 353 + val = _enetc_rd_reg64(reg); 354 + enetc_unlock_mdio(); 355 + 356 + return val; 357 + } 358 + 359 + /* general register accessors */ 360 + #define enetc_rd_reg(reg) _enetc_rd_reg_wa((reg)) 361 + #define enetc_wr_reg(reg, val) _enetc_wr_reg_wa((reg), (val)) 434 362 #define enetc_rd(hw, off) enetc_rd_reg((hw)->reg + (off)) 435 363 #define enetc_wr(hw, off, val) enetc_wr_reg((hw)->reg + (off), val) 436 - #define enetc_rd64(hw, off) enetc_rd_reg64((hw)->reg + (off)) 364 + #define enetc_rd64(hw, off) _enetc_rd_reg64_wa((hw)->reg + (off)) 437 365 /* port register accessors - PF only */ 438 366 #define enetc_port_rd(hw, off) enetc_rd_reg((hw)->port + (off)) 439 367 #define enetc_port_wr(hw, off, val) enetc_wr_reg((hw)->port + (off), val) 368 + #define enetc_port_rd_mdio(hw, off) _enetc_rd_mdio_reg_wa((hw)->port + (off)) 369 + #define enetc_port_wr_mdio(hw, off, val) _enetc_wr_mdio_reg_wa(\ 370 + (hw)->port + (off), val) 440 371 /* global register accessors - PF only */ 441 372 #define enetc_global_rd(hw, off) enetc_rd_reg((hw)->global + (off)) 442 373 #define enetc_global_wr(hw, off, val) enetc_wr_reg((hw)->global + (off), val)
+6 -2
drivers/net/ethernet/freescale/enetc/enetc_mdio.c
··· 16 16 17 17 static inline u32 _enetc_mdio_rd(struct enetc_mdio_priv *mdio_priv, int off) 18 18 { 19 - return enetc_port_rd(mdio_priv->hw, mdio_priv->mdio_base + off); 19 + return enetc_port_rd_mdio(mdio_priv->hw, mdio_priv->mdio_base + off); 20 20 } 21 21 22 22 static inline void _enetc_mdio_wr(struct enetc_mdio_priv *mdio_priv, int off, 23 23 u32 val) 24 24 { 25 - enetc_port_wr(mdio_priv->hw, mdio_priv->mdio_base + off, val); 25 + enetc_port_wr_mdio(mdio_priv->hw, mdio_priv->mdio_base + off, val); 26 26 } 27 27 28 28 #define enetc_mdio_rd(mdio_priv, off) \ ··· 174 174 return hw; 175 175 } 176 176 EXPORT_SYMBOL_GPL(enetc_hw_alloc); 177 + 178 + /* Lock for MDIO access errata on LS1028A */ 179 + DEFINE_RWLOCK(enetc_mdio_lock); 180 + EXPORT_SYMBOL_GPL(enetc_mdio_lock);
+5 -7
drivers/net/ethernet/freescale/fec_main.c
··· 1808 1808 int ret = 0, frame_start, frame_addr, frame_op; 1809 1809 bool is_c45 = !!(regnum & MII_ADDR_C45); 1810 1810 1811 - ret = pm_runtime_get_sync(dev); 1811 + ret = pm_runtime_resume_and_get(dev); 1812 1812 if (ret < 0) 1813 1813 return ret; 1814 1814 ··· 1867 1867 int ret, frame_start, frame_addr; 1868 1868 bool is_c45 = !!(regnum & MII_ADDR_C45); 1869 1869 1870 - ret = pm_runtime_get_sync(dev); 1870 + ret = pm_runtime_resume_and_get(dev); 1871 1871 if (ret < 0) 1872 1872 return ret; 1873 - else 1874 - ret = 0; 1875 1873 1876 1874 if (is_c45) { 1877 1875 frame_start = FEC_MMFR_ST_C45; ··· 2273 2275 u32 i, off; 2274 2276 int ret; 2275 2277 2276 - ret = pm_runtime_get_sync(dev); 2278 + ret = pm_runtime_resume_and_get(dev); 2277 2279 if (ret < 0) 2278 2280 return; 2279 2281 ··· 2974 2976 int ret; 2975 2977 bool reset_again; 2976 2978 2977 - ret = pm_runtime_get_sync(&fep->pdev->dev); 2979 + ret = pm_runtime_resume_and_get(&fep->pdev->dev); 2978 2980 if (ret < 0) 2979 2981 return ret; 2980 2982 ··· 3768 3770 struct device_node *np = pdev->dev.of_node; 3769 3771 int ret; 3770 3772 3771 - ret = pm_runtime_get_sync(&pdev->dev); 3773 + ret = pm_runtime_resume_and_get(&pdev->dev); 3772 3774 if (ret < 0) 3773 3775 return ret; 3774 3776
+3 -2
drivers/net/ethernet/marvell/mvneta.c
··· 2295 2295 dma_sync_single_for_cpu(dev->dev.parent, 2296 2296 rx_desc->buf_phys_addr, 2297 2297 len, dma_dir); 2298 + rx_desc->buf_phys_addr = 0; 2298 2299 2299 2300 if (data_len > 0 && sinfo->nr_frags < MAX_SKB_FRAGS) { 2300 2301 skb_frag_t *frag = &sinfo->frags[sinfo->nr_frags]; ··· 2304 2303 skb_frag_size_set(frag, data_len); 2305 2304 __skb_frag_set_page(frag, page); 2306 2305 sinfo->nr_frags++; 2307 - 2308 - rx_desc->buf_phys_addr = 0; 2306 + } else { 2307 + page_pool_put_full_page(rxq->page_pool, page, true); 2309 2308 } 2310 2309 *size -= len; 2311 2310 }
+5 -2
drivers/net/ethernet/marvell/prestera/prestera_pci.c
··· 676 676 if (err) 677 677 return err; 678 678 679 - if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(30))) { 679 + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(30)); 680 + if (err) { 680 681 dev_err(&pdev->dev, "fail to set DMA mask\n"); 681 682 goto err_dma_mask; 682 683 } ··· 703 702 dev_info(fw->dev.dev, "Prestera FW is ready\n"); 704 703 705 704 fw->wq = alloc_workqueue("prestera_fw_wq", WQ_HIGHPRI, 1); 706 - if (!fw->wq) 705 + if (!fw->wq) { 706 + err = -ENOMEM; 707 707 goto err_wq_alloc; 708 + } 708 709 709 710 INIT_WORK(&fw->evt_work, prestera_fw_evt_work_fn); 710 711
+2 -1
drivers/net/ethernet/mediatek/mtk_star_emac.c
··· 966 966 mtk_star_adjust_link, 0, priv->phy_intf); 967 967 if (!priv->phydev) { 968 968 netdev_err(ndev, "failed to connect to PHY\n"); 969 + ret = -ENODEV; 969 970 goto err_free_irq; 970 971 } 971 972 ··· 1054 1053 err_drop_packet: 1055 1054 dev_kfree_skb(skb); 1056 1055 ndev->stats.tx_dropped++; 1057 - return NETDEV_TX_BUSY; 1056 + return NETDEV_TX_OK; 1058 1057 } 1059 1058 1060 1059 /* Returns the number of bytes sent or a negative number on the first
+3 -3
drivers/net/ethernet/mellanox/mlx4/fw.c
··· 1864 1864 #define INIT_HCA_LOG_RD_OFFSET (INIT_HCA_QPC_OFFSET + 0x77) 1865 1865 #define INIT_HCA_MCAST_OFFSET 0x0c0 1866 1866 #define INIT_HCA_MC_BASE_OFFSET (INIT_HCA_MCAST_OFFSET + 0x00) 1867 - #define INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x12) 1868 - #define INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x16) 1867 + #define INIT_HCA_LOG_MC_ENTRY_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x13) 1868 + #define INIT_HCA_LOG_MC_HASH_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x17) 1869 1869 #define INIT_HCA_UC_STEERING_OFFSET (INIT_HCA_MCAST_OFFSET + 0x18) 1870 1870 #define INIT_HCA_LOG_MC_TABLE_SZ_OFFSET (INIT_HCA_MCAST_OFFSET + 0x1b) 1871 1871 #define INIT_HCA_DEVICE_MANAGED_FLOW_STEERING_EN 0x6 ··· 1873 1873 #define INIT_HCA_DRIVER_VERSION_SZ 0x40 1874 1874 #define INIT_HCA_FS_PARAM_OFFSET 0x1d0 1875 1875 #define INIT_HCA_FS_BASE_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x00) 1876 - #define INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x12) 1876 + #define INIT_HCA_FS_LOG_ENTRY_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x13) 1877 1877 #define INIT_HCA_FS_A0_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x18) 1878 1878 #define INIT_HCA_FS_LOG_TABLE_SZ_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x1b) 1879 1879 #define INIT_HCA_FS_ETH_BITS_OFFSET (INIT_HCA_FS_PARAM_OFFSET + 0x21)
+2 -2
drivers/net/ethernet/mellanox/mlx4/fw.h
··· 182 182 u64 cmpt_base; 183 183 u64 mtt_base; 184 184 u64 global_caps; 185 - u16 log_mc_entry_sz; 186 - u16 log_mc_hash_sz; 185 + u8 log_mc_entry_sz; 186 + u8 log_mc_hash_sz; 187 187 u16 hca_core_clock; /* Internal Clock Frequency (in MHz) */ 188 188 u8 log_num_qps; 189 189 u8 log_num_srqs;
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/en/rep/bond.c
··· 187 187 struct mlx5e_priv *priv; 188 188 189 189 /* A given netdev is not a representor or not a slave of LAG configuration */ 190 - if (!mlx5e_eswitch_rep(netdev) || !bond_slave_get_rtnl(netdev)) 190 + if (!mlx5e_eswitch_rep(netdev) || !netif_is_lag_port(netdev)) 191 191 return false; 192 192 193 193 priv = netdev_priv(netdev);
+7 -7
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c
··· 64 64 if (!spec) 65 65 return -ENOMEM; 66 66 67 - /* Action to copy 7 bit ipsec_syndrome to regB[0:6] */ 67 + /* Action to copy 7 bit ipsec_syndrome to regB[24:30] */ 68 68 MLX5_SET(copy_action_in, action, action_type, MLX5_ACTION_TYPE_COPY); 69 69 MLX5_SET(copy_action_in, action, src_field, MLX5_ACTION_IN_FIELD_IPSEC_SYNDROME); 70 70 MLX5_SET(copy_action_in, action, src_offset, 0); 71 71 MLX5_SET(copy_action_in, action, length, 7); 72 72 MLX5_SET(copy_action_in, action, dst_field, MLX5_ACTION_IN_FIELD_METADATA_REG_B); 73 - MLX5_SET(copy_action_in, action, dst_offset, 0); 73 + MLX5_SET(copy_action_in, action, dst_offset, 24); 74 74 75 75 modify_hdr = mlx5_modify_header_alloc(mdev, MLX5_FLOW_NAMESPACE_KERNEL, 76 76 1, action); ··· 488 488 489 489 setup_fte_common(attrs, ipsec_obj_id, spec, &flow_act); 490 490 491 - /* Set 1 bit ipsec marker */ 492 - /* Set 24 bit ipsec_obj_id */ 491 + /* Set bit[31] ipsec marker */ 492 + /* Set bit[23-0] ipsec_obj_id */ 493 493 MLX5_SET(set_action_in, action, action_type, MLX5_ACTION_TYPE_SET); 494 494 MLX5_SET(set_action_in, action, field, MLX5_ACTION_IN_FIELD_METADATA_REG_B); 495 - MLX5_SET(set_action_in, action, data, (ipsec_obj_id << 1) | 0x1); 496 - MLX5_SET(set_action_in, action, offset, 7); 497 - MLX5_SET(set_action_in, action, length, 25); 495 + MLX5_SET(set_action_in, action, data, (ipsec_obj_id | BIT(31))); 496 + MLX5_SET(set_action_in, action, offset, 0); 497 + MLX5_SET(set_action_in, action, length, 32); 498 498 499 499 modify_hdr = mlx5_modify_header_alloc(priv->mdev, MLX5_FLOW_NAMESPACE_KERNEL, 500 500 1, action);
+1 -2
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c
··· 453 453 struct mlx5_cqe64 *cqe) 454 454 { 455 455 u32 ipsec_meta_data = be32_to_cpu(cqe->ft_metadata); 456 - u8 ipsec_syndrome = ipsec_meta_data & 0xFF; 457 456 struct mlx5e_priv *priv; 458 457 struct xfrm_offload *xo; 459 458 struct xfrm_state *xs; ··· 480 481 xo = xfrm_offload(skb); 481 482 xo->flags = CRYPTO_DONE; 482 483 483 - switch (ipsec_syndrome & MLX5_IPSEC_METADATA_SYNDROM_MASK) { 484 + switch (MLX5_IPSEC_METADATA_SYNDROM(ipsec_meta_data)) { 484 485 case MLX5E_IPSEC_OFFLOAD_RX_SYNDROME_DECRYPTED: 485 486 xo->status = CRYPTO_SUCCESS; 486 487 if (WARN_ON_ONCE(priv->ipsec->no_trailer))
+5 -4
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h
··· 39 39 #include "en.h" 40 40 #include "en/txrx.h" 41 41 42 - #define MLX5_IPSEC_METADATA_MARKER_MASK (0x80) 43 - #define MLX5_IPSEC_METADATA_SYNDROM_MASK (0x7F) 44 - #define MLX5_IPSEC_METADATA_HANDLE(metadata) (((metadata) >> 8) & 0xFF) 42 + /* Bit31: IPsec marker, Bit30-24: IPsec syndrome, Bit23-0: IPsec obj id */ 43 + #define MLX5_IPSEC_METADATA_MARKER(metadata) (((metadata) >> 31) & 0x1) 44 + #define MLX5_IPSEC_METADATA_SYNDROM(metadata) (((metadata) >> 24) & GENMASK(6, 0)) 45 + #define MLX5_IPSEC_METADATA_HANDLE(metadata) ((metadata) & GENMASK(23, 0)) 45 46 46 47 struct mlx5e_accel_tx_ipsec_state { 47 48 struct xfrm_offload *xo; ··· 79 78 80 79 static inline bool mlx5_ipsec_is_rx_flow(struct mlx5_cqe64 *cqe) 81 80 { 82 - return !!(MLX5_IPSEC_METADATA_MARKER_MASK & be32_to_cpu(cqe->ft_metadata)); 81 + return MLX5_IPSEC_METADATA_MARKER(be32_to_cpu(cqe->ft_metadata)); 83 82 } 84 83 85 84 static inline bool mlx5e_ipsec_is_tx_flow(struct mlx5e_accel_tx_ipsec_state *ipsec_st)
+8 -5
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
··· 476 476 477 477 depth += sizeof(struct tcphdr); 478 478 479 - if (unlikely(!sk || sk->sk_state == TCP_TIME_WAIT)) 479 + if (unlikely(!sk)) 480 480 return; 481 + 482 + if (unlikely(sk->sk_state == TCP_TIME_WAIT)) 483 + goto unref; 481 484 482 485 if (unlikely(!resync_queue_get_psv(sk))) 483 - return; 484 - 485 - skb->sk = sk; 486 - skb->destructor = sock_edemux; 486 + goto unref; 487 487 488 488 seq = th->seq; 489 489 datalen = skb->len - depth; 490 490 tls_offload_rx_resync_async_request_start(sk, seq, datalen); 491 491 rq->stats->tls_resync_req_start++; 492 + 493 + unref: 494 + sock_gen_put(sk); 492 495 } 493 496 494 497 void mlx5e_ktls_rx_resync(struct net_device *netdev, struct sock *sk,
+3 -1
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
··· 5229 5229 5230 5230 tc->ct = mlx5_tc_ct_init(priv, tc->chains, &priv->fs.tc.mod_hdr, 5231 5231 MLX5_FLOW_NAMESPACE_KERNEL); 5232 - if (IS_ERR(tc->ct)) 5232 + if (IS_ERR(tc->ct)) { 5233 + err = PTR_ERR(tc->ct); 5233 5234 goto err_ct; 5235 + } 5234 5236 5235 5237 tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event; 5236 5238 err = register_netdevice_notifier_dev_net(priv->netdev,
+3
drivers/net/ethernet/mellanox/mlx5/core/en_tc.h
··· 283 283 284 284 reg_b = be32_to_cpu(cqe->ft_metadata); 285 285 286 + if (reg_b >> (MLX5E_TC_TABLE_CHAIN_TAG_BITS + ZONE_RESTORE_BITS)) 287 + return false; 288 + 286 289 chain = reg_b & MLX5E_TC_TABLE_CHAIN_TAG_MASK; 287 290 if (chain) 288 291 return true;
+6 -7
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c
··· 144 144 memcpy(&vhdr->h_vlan_encapsulated_proto, skb->data + cpy1_sz, cpy2_sz); 145 145 } 146 146 147 - /* RM 2311217: no L4 inner checksum for IPsec tunnel type packet */ 147 + /* If packet is not IP's CHECKSUM_PARTIAL (e.g. icmd packet), 148 + * need to set L3 checksum flag for IPsec 149 + */ 148 150 static void 149 151 ipsec_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb, 150 152 struct mlx5_wqe_eth_seg *eseg) ··· 156 154 eseg->cs_flags |= MLX5_ETH_WQE_L3_INNER_CSUM; 157 155 sq->stats->csum_partial_inner++; 158 156 } else { 159 - eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM; 160 157 sq->stats->csum_partial++; 161 158 } 162 159 } ··· 163 162 static inline void 164 163 mlx5e_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb, struct mlx5_wqe_eth_seg *eseg) 165 164 { 166 - if (unlikely(eseg->flow_table_metadata & cpu_to_be32(MLX5_ETH_WQE_FT_META_IPSEC))) { 167 - ipsec_txwqe_build_eseg_csum(sq, skb, eseg); 168 - return; 169 - } 170 - 171 165 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 172 166 eseg->cs_flags = MLX5_ETH_WQE_L3_CSUM; 173 167 if (skb->encapsulation) { ··· 173 177 eseg->cs_flags |= MLX5_ETH_WQE_L4_CSUM; 174 178 sq->stats->csum_partial++; 175 179 } 180 + } else if (unlikely(eseg->flow_table_metadata & cpu_to_be32(MLX5_ETH_WQE_FT_META_IPSEC))) { 181 + ipsec_txwqe_build_eseg_csum(sq, skb, eseg); 182 + 176 183 } else 177 184 sq->stats->csum_none++; 178 185 }
+13 -7
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c
··· 1142 1142 struct mlx5_vport *vport; 1143 1143 1144 1144 vport = mlx5_eswitch_get_vport(esw, vport_num); 1145 + 1146 + if (!vport->qos.enabled) 1147 + return -EOPNOTSUPP; 1148 + 1145 1149 MLX5_SET(scheduling_context, ctx, max_average_bw, rate_mbps); 1146 1150 1147 1151 return mlx5_modify_scheduling_element_cmd(esw->dev, ··· 1412 1408 int i; 1413 1409 1414 1410 mlx5_esw_for_each_vf_vport(esw, i, vport, esw->esw_funcs.num_vfs) { 1411 + memset(&vport->qos, 0, sizeof(vport->qos)); 1415 1412 memset(&vport->info, 0, sizeof(vport->info)); 1416 1413 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO; 1417 1414 } ··· 2226 2221 max_guarantee = evport->info.min_rate; 2227 2222 } 2228 2223 2229 - return max_t(u32, max_guarantee / fw_max_bw_share, 1); 2224 + if (max_guarantee) 2225 + return max_t(u32, max_guarantee / fw_max_bw_share, 1); 2226 + return 0; 2230 2227 } 2231 2228 2232 - static int normalize_vports_min_rate(struct mlx5_eswitch *esw, u32 divider) 2229 + static int normalize_vports_min_rate(struct mlx5_eswitch *esw) 2233 2230 { 2234 2231 u32 fw_max_bw_share = MLX5_CAP_QOS(esw->dev, max_tsar_bw_share); 2232 + u32 divider = calculate_vports_min_rate_divider(esw); 2235 2233 struct mlx5_vport *evport; 2236 2234 u32 vport_max_rate; 2237 2235 u32 vport_min_rate; ··· 2247 2239 continue; 2248 2240 vport_min_rate = evport->info.min_rate; 2249 2241 vport_max_rate = evport->info.max_rate; 2250 - bw_share = MLX5_MIN_BW_SHARE; 2242 + bw_share = 0; 2251 2243 2252 - if (vport_min_rate) 2244 + if (divider) 2253 2245 bw_share = MLX5_RATE_TO_BW_SHARE(vport_min_rate, 2254 2246 divider, 2255 2247 fw_max_bw_share); ··· 2274 2266 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport); 2275 2267 u32 fw_max_bw_share; 2276 2268 u32 previous_min_rate; 2277 - u32 divider; 2278 2269 bool min_rate_supported; 2279 2270 bool max_rate_supported; 2280 2271 int err = 0; ··· 2298 2291 2299 2292 previous_min_rate = evport->info.min_rate; 2300 2293 evport->info.min_rate = min_rate; 2301 - divider = calculate_vports_min_rate_divider(esw); 2302 - err = normalize_vports_min_rate(esw, divider); 2294 + err = normalize_vports_min_rate(esw); 2303 2295 if (err) { 2304 2296 evport->info.min_rate = previous_min_rate; 2305 2297 goto unlock;
+7
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
··· 534 534 goto out; 535 535 } 536 536 537 + if (rule->dest_attr.type == MLX5_FLOW_DESTINATION_TYPE_PORT && 538 + --fte->dests_size) { 539 + fte->modify_mask |= BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION); 540 + fte->action.action &= ~MLX5_FLOW_CONTEXT_ACTION_ALLOW; 541 + goto out; 542 + } 543 + 537 544 if ((fte->action.action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) && 538 545 --fte->dests_size) { 539 546 fte->modify_mask |=
+1 -1
drivers/net/ethernet/mellanox/mlxsw/Kconfig
··· 6 6 config MLXSW_CORE 7 7 tristate "Mellanox Technologies Switch ASICs support" 8 8 select NET_DEVLINK 9 + select MLXFW 9 10 help 10 11 This driver supports Mellanox Technologies Switch ASICs family. 11 12 ··· 83 82 select GENERIC_ALLOCATOR 84 83 select PARMAN 85 84 select OBJAGG 86 - select MLXFW 87 85 imply PTP_1588_CLOCK 88 86 select NET_PTP_CLASSIFY if PTP_1588_CLOCK 89 87 default m
+2 -1
drivers/net/ethernet/mellanox/mlxsw/core.c
··· 571 571 if (trans->core->fw_flash_in_progress) 572 572 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 573 573 574 - queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 574 + queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, 575 + timeout << trans->retries); 575 576 } 576 577 577 578 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
+7 -6
drivers/net/ethernet/microchip/lan743x_main.c
··· 148 148 149 149 int_sts = lan743x_csr_read(adapter, INT_STS); 150 150 if (int_sts & INT_BIT_SW_GP_) { 151 - lan743x_csr_write(adapter, INT_STS, INT_BIT_SW_GP_); 151 + /* disable the interrupt to prevent repeated re-triggering */ 152 + lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 152 153 intr->software_isr_flag = 1; 153 154 } 154 155 } ··· 1288 1287 goto clear_active; 1289 1288 1290 1289 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1291 - dev_kfree_skb(buffer_info->skb); 1290 + dev_kfree_skb_any(buffer_info->skb); 1292 1291 goto clear_skb; 1293 1292 } 1294 1293 1295 1294 if (cleanup) { 1296 1295 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1297 - dev_kfree_skb(buffer_info->skb); 1296 + dev_kfree_skb_any(buffer_info->skb); 1298 1297 } else { 1299 1298 ignore_sync = (buffer_info->flags & 1300 1299 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; ··· 1604 1603 if (required_number_of_descriptors > 1605 1604 lan743x_tx_get_avail_desc(tx)) { 1606 1605 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1607 - dev_kfree_skb(skb); 1606 + dev_kfree_skb_irq(skb); 1608 1607 } else { 1609 1608 /* save to overflow buffer */ 1610 1609 tx->overflow_skb = skb; ··· 1637 1636 start_frame_length, 1638 1637 do_timestamp, 1639 1638 skb->ip_summed == CHECKSUM_PARTIAL)) { 1640 - dev_kfree_skb(skb); 1639 + dev_kfree_skb_irq(skb); 1641 1640 goto unlock; 1642 1641 } 1643 1642 ··· 1656 1655 * frame assembler clean up was performed inside 1657 1656 * lan743x_tx_frame_add_fragment 1658 1657 */ 1659 - dev_kfree_skb(skb); 1658 + dev_kfree_skb_irq(skb); 1660 1659 goto unlock; 1661 1660 } 1662 1661 }
+2 -2
drivers/net/ethernet/qlogic/qed/qed_cxt.c
··· 1647 1647 ilog2(rounded_conn_num)); 1648 1648 1649 1649 STORE_RT_REG_AGG(p_hwfn, SRC_REG_FIRSTFREE_RT_OFFSET, 1650 - p_hwfn->p_cxt_mngr->first_free); 1650 + p_hwfn->p_cxt_mngr->src_t2.first_free); 1651 1651 STORE_RT_REG_AGG(p_hwfn, SRC_REG_LASTFREE_RT_OFFSET, 1652 - p_hwfn->p_cxt_mngr->last_free); 1652 + p_hwfn->p_cxt_mngr->src_t2.last_free); 1653 1653 } 1654 1654 1655 1655 /* Timers PF */
-3
drivers/net/ethernet/qlogic/qed/qed_cxt.h
··· 326 326 327 327 /* SRC T2 */ 328 328 struct qed_src_t2 src_t2; 329 - u32 t2_num_pages; 330 - u64 first_free; 331 - u64 last_free; 332 329 333 330 /* total number of SRQ's for this hwfn */ 334 331 u32 srq_count;
+9 -3
drivers/net/ethernet/qlogic/qed/qed_iwarp.c
··· 2754 2754 iwarp_info->partial_fpdus = kcalloc((u16)p_hwfn->p_rdma_info->num_qps, 2755 2755 sizeof(*iwarp_info->partial_fpdus), 2756 2756 GFP_KERNEL); 2757 - if (!iwarp_info->partial_fpdus) 2757 + if (!iwarp_info->partial_fpdus) { 2758 + rc = -ENOMEM; 2758 2759 goto err; 2760 + } 2759 2761 2760 2762 iwarp_info->max_num_partial_fpdus = (u16)p_hwfn->p_rdma_info->num_qps; 2761 2763 2762 2764 iwarp_info->mpa_intermediate_buf = kzalloc(buff_size, GFP_KERNEL); 2763 - if (!iwarp_info->mpa_intermediate_buf) 2765 + if (!iwarp_info->mpa_intermediate_buf) { 2766 + rc = -ENOMEM; 2764 2767 goto err; 2768 + } 2765 2769 2766 2770 /* The mpa_bufs array serves for pending RX packets received on the 2767 2771 * mpa ll2 that don't have place on the tx ring and require later ··· 2775 2771 iwarp_info->mpa_bufs = kcalloc(data.input.rx_num_desc, 2776 2772 sizeof(*iwarp_info->mpa_bufs), 2777 2773 GFP_KERNEL); 2778 - if (!iwarp_info->mpa_bufs) 2774 + if (!iwarp_info->mpa_bufs) { 2775 + rc = -ENOMEM; 2779 2776 goto err; 2777 + } 2780 2778 2781 2779 INIT_LIST_HEAD(&iwarp_info->mpa_buf_pending_list); 2782 2780 INIT_LIST_HEAD(&iwarp_info->mpa_buf_list);
+2 -1
drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c
··· 2231 2231 2232 2232 /* Boot either flash image or firmware image from host file system */ 2233 2233 if (qlcnic_load_fw_file == 1) { 2234 - if (qlcnic_83xx_load_fw_image_from_host(adapter)) 2234 + err = qlcnic_83xx_load_fw_image_from_host(adapter); 2235 + if (err) 2235 2236 return err; 2236 2237 } else { 2237 2238 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID,
+5
drivers/net/ethernet/qualcomm/rmnet/rmnet_handlers.c
··· 188 188 189 189 dev = skb->dev; 190 190 port = rmnet_get_port_rcu(dev); 191 + if (unlikely(!port)) { 192 + atomic_long_inc(&skb->dev->rx_nohandler); 193 + kfree_skb(skb); 194 + goto done; 195 + } 191 196 192 197 switch (port->rmnet_mode) { 193 198 case RMNET_EPMODE_VND:
+3 -1
drivers/net/ethernet/stmicro/stmmac/dwmac-intel-plat.c
··· 113 113 /* Enable TX clock */ 114 114 if (dwmac->data->tx_clk_en) { 115 115 dwmac->tx_clk = devm_clk_get(&pdev->dev, "tx_clk"); 116 - if (IS_ERR(dwmac->tx_clk)) 116 + if (IS_ERR(dwmac->tx_clk)) { 117 + ret = PTR_ERR(dwmac->tx_clk); 117 118 goto err_remove_config_dt; 119 + } 118 120 119 121 clk_prepare_enable(dwmac->tx_clk); 120 122
+1 -1
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
··· 23 23 24 24 return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value, 25 25 !(value & DMA_BUS_MODE_SFT_RESET), 26 - 10000, 100000); 26 + 10000, 200000); 27 27 } 28 28 29 29 /* CSR1 enables the transmit DMA to check for new descriptor */
+2
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
··· 5272 5272 return ret; 5273 5273 } 5274 5274 5275 + rtnl_lock(); 5275 5276 mutex_lock(&priv->lock); 5276 5277 5277 5278 stmmac_reset_queues_param(priv); ··· 5288 5287 stmmac_enable_all_queues(priv); 5289 5288 5290 5289 mutex_unlock(&priv->lock); 5290 + rtnl_unlock(); 5291 5291 5292 5292 if (!device_may_wakeup(priv->device) || !priv->plat->pmt) { 5293 5293 rtnl_lock();
+1 -2
drivers/net/ethernet/ti/am65-cpts.c
··· 1001 1001 if (IS_ERR_OR_NULL(cpts->ptp_clock)) { 1002 1002 dev_err(dev, "Failed to register ptp clk %ld\n", 1003 1003 PTR_ERR(cpts->ptp_clock)); 1004 - if (!cpts->ptp_clock) 1005 - ret = -ENODEV; 1004 + ret = cpts->ptp_clock ? PTR_ERR(cpts->ptp_clock) : -ENODEV; 1006 1005 goto refclk_disable; 1007 1006 } 1008 1007 cpts->phc_index = ptp_clock_index(cpts->ptp_clock);
+7 -4
drivers/net/ethernet/ti/cpsw.c
··· 838 838 if (ret < 0) 839 839 goto err_cleanup; 840 840 841 - if (cpts_register(cpsw->cpts)) 842 - dev_err(priv->dev, "error registering cpts device\n"); 843 - 841 + if (cpsw->cpts) { 842 + if (cpts_register(cpsw->cpts)) 843 + dev_err(priv->dev, "error registering cpts device\n"); 844 + else 845 + writel(0x10, &cpsw->wr_regs->misc_en); 846 + } 844 847 } 845 848 846 849 cpsw_restore(priv); ··· 1634 1631 CPSW_MAX_QUEUES, CPSW_MAX_QUEUES); 1635 1632 if (!ndev) { 1636 1633 dev_err(dev, "error allocating net_device\n"); 1634 + ret = -ENOMEM; 1637 1635 goto clean_cpts; 1638 1636 } 1639 1637 ··· 1720 1716 1721 1717 /* Enable misc CPTS evnt_pend IRQ */ 1722 1718 cpts_set_irqpoll(cpsw->cpts, false); 1723 - writel(0x10, &cpsw->wr_regs->misc_en); 1724 1719 1725 1720 skip_cpts: 1726 1721 cpsw_notice(priv, probe,
+6 -3
drivers/net/ethernet/ti/cpsw_new.c
··· 873 873 if (ret < 0) 874 874 goto err_cleanup; 875 875 876 - if (cpts_register(cpsw->cpts)) 877 - dev_err(priv->dev, "error registering cpts device\n"); 876 + if (cpsw->cpts) { 877 + if (cpts_register(cpsw->cpts)) 878 + dev_err(priv->dev, "error registering cpts device\n"); 879 + else 880 + writel(0x10, &cpsw->wr_regs->misc_en); 881 + } 878 882 879 883 napi_enable(&cpsw->napi_rx); 880 884 napi_enable(&cpsw->napi_tx); ··· 2010 2006 2011 2007 /* Enable misc CPTS evnt_pend IRQ */ 2012 2008 cpts_set_irqpoll(cpsw->cpts, false); 2013 - writel(0x10, &cpsw->wr_regs->misc_en); 2014 2009 2015 2010 skip_cpts: 2016 2011 ret = cpsw_register_notifiers(cpsw);
+1 -2
drivers/net/geneve.c
··· 224 224 if (ip_tunnel_collect_metadata() || gs->collect_md) { 225 225 __be16 flags; 226 226 227 - flags = TUNNEL_KEY | TUNNEL_GENEVE_OPT | 228 - (gnvh->oam ? TUNNEL_OAM : 0) | 227 + flags = TUNNEL_KEY | (gnvh->oam ? TUNNEL_OAM : 0) | 229 228 (gnvh->critical ? TUNNEL_CRIT_OPT : 0); 230 229 231 230 tun_dst = udp_tun_rx_dst(skb, geneve_get_sk_family(gs), flags,
+12 -3
drivers/net/ipa/gsi_trans.c
··· 362 362 return trans; 363 363 } 364 364 365 - /* Free a previously-allocated transaction (used only in case of error) */ 365 + /* Free a previously-allocated transaction */ 366 366 void gsi_trans_free(struct gsi_trans *trans) 367 367 { 368 + refcount_t *refcount = &trans->refcount; 368 369 struct gsi_trans_info *trans_info; 370 + bool last; 369 371 370 - if (!refcount_dec_and_test(&trans->refcount)) 372 + /* We must hold the lock to release the last reference */ 373 + if (refcount_dec_not_one(refcount)) 371 374 return; 372 375 373 376 trans_info = &trans->gsi->channel[trans->channel_id].trans_info; 374 377 375 378 spin_lock_bh(&trans_info->spinlock); 376 379 377 - list_del(&trans->links); 380 + /* Reference might have been added before we got the lock */ 381 + last = refcount_dec_and_test(refcount); 382 + if (last) 383 + list_del(&trans->links); 378 384 379 385 spin_unlock_bh(&trans_info->spinlock); 386 + 387 + if (!last) 388 + return; 380 389 381 390 ipa_gsi_trans_release(trans); 382 391
+2
drivers/net/netdevsim/dev.c
··· 96 96 .open = simple_open, 97 97 .write = nsim_dev_take_snapshot_write, 98 98 .llseek = generic_file_llseek, 99 + .owner = THIS_MODULE, 99 100 }; 100 101 101 102 static ssize_t nsim_dev_trap_fa_cookie_read(struct file *file, ··· 189 188 .read = nsim_dev_trap_fa_cookie_read, 190 189 .write = nsim_dev_trap_fa_cookie_write, 191 190 .llseek = generic_file_llseek, 191 + .owner = THIS_MODULE, 192 192 }; 193 193 194 194 static int nsim_dev_debugfs_init(struct nsim_dev *nsim_dev)
+1
drivers/net/netdevsim/health.c
··· 261 261 .open = simple_open, 262 262 .write = nsim_dev_health_break_write, 263 263 .llseek = generic_file_llseek, 264 + .owner = THIS_MODULE, 264 265 }; 265 266 266 267 int nsim_dev_health_init(struct nsim_dev *nsim_dev, struct devlink *devlink)
+1
drivers/net/netdevsim/udp_tunnels.c
··· 124 124 .open = simple_open, 125 125 .write = nsim_udp_tunnels_info_reset_write, 126 126 .llseek = generic_file_llseek, 127 + .owner = THIS_MODULE, 127 128 }; 128 129 129 130 int nsim_udp_tunnels_info_create(struct nsim_dev *nsim_dev,
-1
drivers/net/phy/mscc/mscc_macsec.c
··· 981 981 982 982 switch (phydev->phy_id & phydev->drv->phy_id_mask) { 983 983 case PHY_ID_VSC856X: 984 - case PHY_ID_VSC8575: 985 984 case PHY_ID_VSC8582: 986 985 case PHY_ID_VSC8584: 987 986 INIT_LIST_HEAD(&vsc8531->macsec_flows);
+3 -1
drivers/net/phy/smsc.c
··· 324 324 return ret; 325 325 326 326 ret = clk_set_rate(priv->refclk, 50 * 1000 * 1000); 327 - if (ret) 327 + if (ret) { 328 + clk_disable_unprepare(priv->refclk); 328 329 return ret; 330 + } 329 331 330 332 return 0; 331 333 }
+2 -1
drivers/net/usb/cx82310_eth.c
··· 197 197 } 198 198 199 199 /* enable ethernet mode (?) */ 200 - if (cx82310_enable_ethernet(dev)) 200 + ret = cx82310_enable_ethernet(dev); 201 + if (ret) 201 202 goto err; 202 203 203 204 /* get the MAC address */
+1 -1
drivers/net/usb/qmi_wwan.c
··· 1047 1047 {QMI_FIXED_INTF(0x05c6, 0x9011, 4)}, 1048 1048 {QMI_FIXED_INTF(0x05c6, 0x9021, 1)}, 1049 1049 {QMI_FIXED_INTF(0x05c6, 0x9022, 2)}, 1050 - {QMI_FIXED_INTF(0x05c6, 0x9025, 4)}, /* Alcatel-sbell ASB TL131 TDD LTE (China Mobile) */ 1050 + {QMI_QUIRK_SET_DTR(0x05c6, 0x9025, 4)}, /* Alcatel-sbell ASB TL131 TDD LTE (China Mobile) */ 1051 1051 {QMI_FIXED_INTF(0x05c6, 0x9026, 3)}, 1052 1052 {QMI_FIXED_INTF(0x05c6, 0x902e, 5)}, 1053 1053 {QMI_FIXED_INTF(0x05c6, 0x9031, 5)},
-2
drivers/nvme/host/core.c
··· 2060 2060 2061 2061 if (id->nsattr & NVME_NS_ATTR_RO) 2062 2062 set_disk_ro(disk, true); 2063 - else 2064 - set_disk_ro(disk, false); 2065 2063 } 2066 2064 2067 2065 static inline bool nvme_first_scan(struct gendisk *disk)
+3 -1
drivers/of/address.c
··· 1034 1034 */ 1035 1035 bool of_dma_is_coherent(struct device_node *np) 1036 1036 { 1037 - struct device_node *node = of_node_get(np); 1037 + struct device_node *node; 1038 1038 1039 1039 if (IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT)) 1040 1040 return true; 1041 + 1042 + node = of_node_get(np); 1041 1043 1042 1044 while (node) { 1043 1045 if (of_property_read_bool(node, "dma-coherent")) {
+4 -3
drivers/pinctrl/aspeed/pinctrl-aspeed.c
··· 286 286 static bool aspeed_expr_is_gpio(const struct aspeed_sig_expr *expr) 287 287 { 288 288 /* 289 - * The signal type is GPIO if the signal name has "GPIO" as a prefix. 289 + * The signal type is GPIO if the signal name has "GPI" as a prefix. 290 290 * strncmp (rather than strcmp) is used to implement the prefix 291 291 * requirement. 292 292 * 293 - * expr->signal might look like "GPIOT3" in the GPIO case. 293 + * expr->signal might look like "GPIOB1" in the GPIO case. 294 + * expr->signal might look like "GPIT0" in the GPI case. 294 295 */ 295 - return strncmp(expr->signal, "GPIO", 4) == 0; 296 + return strncmp(expr->signal, "GPI", 3) == 0; 296 297 } 297 298 298 299 static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs)
+30 -10
drivers/pinctrl/intel/pinctrl-intel.c
··· 62 62 #define PADCFG1_TERM_UP BIT(13) 63 63 #define PADCFG1_TERM_SHIFT 10 64 64 #define PADCFG1_TERM_MASK GENMASK(12, 10) 65 - #define PADCFG1_TERM_20K 4 66 - #define PADCFG1_TERM_2K 3 67 - #define PADCFG1_TERM_5K 2 68 - #define PADCFG1_TERM_1K 1 65 + #define PADCFG1_TERM_20K BIT(2) 66 + #define PADCFG1_TERM_5K BIT(1) 67 + #define PADCFG1_TERM_1K BIT(0) 68 + #define PADCFG1_TERM_833 (BIT(1) | BIT(0)) 69 69 70 70 #define PADCFG2 0x008 71 71 #define PADCFG2_DEBEN BIT(0) ··· 549 549 return -EINVAL; 550 550 551 551 switch (term) { 552 + case PADCFG1_TERM_833: 553 + *arg = 833; 554 + break; 552 555 case PADCFG1_TERM_1K: 553 556 *arg = 1000; 554 - break; 555 - case PADCFG1_TERM_2K: 556 - *arg = 2000; 557 557 break; 558 558 case PADCFG1_TERM_5K: 559 559 *arg = 5000; ··· 570 570 return -EINVAL; 571 571 572 572 switch (term) { 573 + case PADCFG1_TERM_833: 574 + if (!(community->features & PINCTRL_FEATURE_1K_PD)) 575 + return -EINVAL; 576 + *arg = 833; 577 + break; 573 578 case PADCFG1_TERM_1K: 574 579 if (!(community->features & PINCTRL_FEATURE_1K_PD)) 575 580 return -EINVAL; ··· 683 678 684 679 value |= PADCFG1_TERM_UP; 685 680 681 + /* Set default strength value in case none is given */ 682 + if (arg == 1) 683 + arg = 5000; 684 + 686 685 switch (arg) { 687 686 case 20000: 688 687 value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT; ··· 694 685 case 5000: 695 686 value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT; 696 687 break; 697 - case 2000: 698 - value |= PADCFG1_TERM_2K << PADCFG1_TERM_SHIFT; 699 - break; 700 688 case 1000: 701 689 value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT; 690 + break; 691 + case 833: 692 + value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT; 702 693 break; 703 694 default: 704 695 ret = -EINVAL; ··· 708 699 709 700 case PIN_CONFIG_BIAS_PULL_DOWN: 710 701 value &= ~(PADCFG1_TERM_UP | PADCFG1_TERM_MASK); 702 + 703 + /* Set default strength value in case none is given */ 704 + if (arg == 1) 705 + arg = 5000; 711 706 712 707 switch (arg) { 713 708 case 20000: ··· 726 713 break; 727 714 } 728 715 value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT; 716 + break; 717 + case 833: 718 + if (!(community->features & PINCTRL_FEATURE_1K_PD)) { 719 + ret = -EINVAL; 720 + break; 721 + } 722 + value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT; 729 723 break; 730 724 default: 731 725 ret = -EINVAL;
+3 -3
drivers/pinctrl/pinctrl-amd.c
··· 156 156 pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF); 157 157 pin_reg &= ~BIT(DB_TMR_LARGE_OFF); 158 158 } else if (debounce < 250000) { 159 - time = debounce / 15600; 159 + time = debounce / 15625; 160 160 pin_reg |= time & DB_TMR_OUT_MASK; 161 161 pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF); 162 162 pin_reg |= BIT(DB_TMR_LARGE_OFF); ··· 166 166 pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF); 167 167 pin_reg |= BIT(DB_TMR_LARGE_OFF); 168 168 } else { 169 - pin_reg &= ~DB_CNTRl_MASK; 169 + pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF); 170 170 ret = -EINVAL; 171 171 } 172 172 } else { 173 173 pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF); 174 174 pin_reg &= ~BIT(DB_TMR_LARGE_OFF); 175 175 pin_reg &= ~DB_TMR_OUT_MASK; 176 - pin_reg &= ~DB_CNTRl_MASK; 176 + pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF); 177 177 } 178 178 writel(pin_reg, gpio_dev->base + offset * 4); 179 179 raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
+36 -36
drivers/pinctrl/pinctrl-ingenic.c
··· 635 635 static int jz4770_uart3_hwflow_pins[] = { 0x88, 0x89, }; 636 636 static int jz4770_ssi0_dt_a_pins[] = { 0x15, }; 637 637 static int jz4770_ssi0_dt_b_pins[] = { 0x35, }; 638 - static int jz4770_ssi0_dt_d_pins[] = { 0x55, }; 639 - static int jz4770_ssi0_dt_e_pins[] = { 0x71, }; 638 + static int jz4770_ssi0_dt_d_pins[] = { 0x75, }; 639 + static int jz4770_ssi0_dt_e_pins[] = { 0x91, }; 640 640 static int jz4770_ssi0_dr_a_pins[] = { 0x14, }; 641 641 static int jz4770_ssi0_dr_b_pins[] = { 0x34, }; 642 - static int jz4770_ssi0_dr_d_pins[] = { 0x54, }; 643 - static int jz4770_ssi0_dr_e_pins[] = { 0x6e, }; 642 + static int jz4770_ssi0_dr_d_pins[] = { 0x74, }; 643 + static int jz4770_ssi0_dr_e_pins[] = { 0x8e, }; 644 644 static int jz4770_ssi0_clk_a_pins[] = { 0x12, }; 645 645 static int jz4770_ssi0_clk_b_pins[] = { 0x3c, }; 646 - static int jz4770_ssi0_clk_d_pins[] = { 0x58, }; 647 - static int jz4770_ssi0_clk_e_pins[] = { 0x6f, }; 646 + static int jz4770_ssi0_clk_d_pins[] = { 0x78, }; 647 + static int jz4770_ssi0_clk_e_pins[] = { 0x8f, }; 648 648 static int jz4770_ssi0_gpc_b_pins[] = { 0x3e, }; 649 - static int jz4770_ssi0_gpc_d_pins[] = { 0x56, }; 650 - static int jz4770_ssi0_gpc_e_pins[] = { 0x73, }; 649 + static int jz4770_ssi0_gpc_d_pins[] = { 0x76, }; 650 + static int jz4770_ssi0_gpc_e_pins[] = { 0x93, }; 651 651 static int jz4770_ssi0_ce0_a_pins[] = { 0x13, }; 652 652 static int jz4770_ssi0_ce0_b_pins[] = { 0x3d, }; 653 - static int jz4770_ssi0_ce0_d_pins[] = { 0x59, }; 654 - static int jz4770_ssi0_ce0_e_pins[] = { 0x70, }; 653 + static int jz4770_ssi0_ce0_d_pins[] = { 0x79, }; 654 + static int jz4770_ssi0_ce0_e_pins[] = { 0x90, }; 655 655 static int jz4770_ssi0_ce1_b_pins[] = { 0x3f, }; 656 - static int jz4770_ssi0_ce1_d_pins[] = { 0x57, }; 657 - static int jz4770_ssi0_ce1_e_pins[] = { 0x72, }; 656 + static int jz4770_ssi0_ce1_d_pins[] = { 0x77, }; 657 + static int jz4770_ssi0_ce1_e_pins[] = { 0x92, }; 658 658 static int jz4770_ssi1_dt_b_pins[] = { 0x35, }; 659 - static int jz4770_ssi1_dt_d_pins[] = { 0x55, }; 660 - static int jz4770_ssi1_dt_e_pins[] = { 0x71, }; 659 + static int jz4770_ssi1_dt_d_pins[] = { 0x75, }; 660 + static int jz4770_ssi1_dt_e_pins[] = { 0x91, }; 661 661 static int jz4770_ssi1_dr_b_pins[] = { 0x34, }; 662 - static int jz4770_ssi1_dr_d_pins[] = { 0x54, }; 663 - static int jz4770_ssi1_dr_e_pins[] = { 0x6e, }; 662 + static int jz4770_ssi1_dr_d_pins[] = { 0x74, }; 663 + static int jz4770_ssi1_dr_e_pins[] = { 0x8e, }; 664 664 static int jz4770_ssi1_clk_b_pins[] = { 0x3c, }; 665 - static int jz4770_ssi1_clk_d_pins[] = { 0x58, }; 666 - static int jz4770_ssi1_clk_e_pins[] = { 0x6f, }; 665 + static int jz4770_ssi1_clk_d_pins[] = { 0x78, }; 666 + static int jz4770_ssi1_clk_e_pins[] = { 0x8f, }; 667 667 static int jz4770_ssi1_gpc_b_pins[] = { 0x3e, }; 668 - static int jz4770_ssi1_gpc_d_pins[] = { 0x56, }; 669 - static int jz4770_ssi1_gpc_e_pins[] = { 0x73, }; 668 + static int jz4770_ssi1_gpc_d_pins[] = { 0x76, }; 669 + static int jz4770_ssi1_gpc_e_pins[] = { 0x93, }; 670 670 static int jz4770_ssi1_ce0_b_pins[] = { 0x3d, }; 671 - static int jz4770_ssi1_ce0_d_pins[] = { 0x59, }; 672 - static int jz4770_ssi1_ce0_e_pins[] = { 0x70, }; 671 + static int jz4770_ssi1_ce0_d_pins[] = { 0x79, }; 672 + static int jz4770_ssi1_ce0_e_pins[] = { 0x90, }; 673 673 static int jz4770_ssi1_ce1_b_pins[] = { 0x3f, }; 674 - static int jz4770_ssi1_ce1_d_pins[] = { 0x57, }; 675 - static int jz4770_ssi1_ce1_e_pins[] = { 0x72, }; 674 + static int jz4770_ssi1_ce1_d_pins[] = { 0x77, }; 675 + static int jz4770_ssi1_ce1_e_pins[] = { 0x92, }; 676 676 static int jz4770_mmc0_1bit_a_pins[] = { 0x12, 0x13, 0x14, }; 677 677 static int jz4770_mmc0_4bit_a_pins[] = { 0x15, 0x16, 0x17, }; 678 678 static int jz4770_mmc0_1bit_e_pins[] = { 0x9c, 0x9d, 0x94, }; ··· 1050 1050 static int jz4780_ssi0_dt_a_21_pins[] = { 0x15, }; 1051 1051 static int jz4780_ssi0_dt_a_28_pins[] = { 0x1c, }; 1052 1052 static int jz4780_ssi0_dt_b_pins[] = { 0x3d, }; 1053 - static int jz4780_ssi0_dt_d_pins[] = { 0x59, }; 1053 + static int jz4780_ssi0_dt_d_pins[] = { 0x79, }; 1054 1054 static int jz4780_ssi0_dr_a_20_pins[] = { 0x14, }; 1055 1055 static int jz4780_ssi0_dr_a_27_pins[] = { 0x1b, }; 1056 1056 static int jz4780_ssi0_dr_b_pins[] = { 0x34, }; 1057 - static int jz4780_ssi0_dr_d_pins[] = { 0x54, }; 1057 + static int jz4780_ssi0_dr_d_pins[] = { 0x74, }; 1058 1058 static int jz4780_ssi0_clk_a_pins[] = { 0x12, }; 1059 1059 static int jz4780_ssi0_clk_b_5_pins[] = { 0x25, }; 1060 1060 static int jz4780_ssi0_clk_b_28_pins[] = { 0x3c, }; 1061 - static int jz4780_ssi0_clk_d_pins[] = { 0x58, }; 1061 + static int jz4780_ssi0_clk_d_pins[] = { 0x78, }; 1062 1062 static int jz4780_ssi0_gpc_b_pins[] = { 0x3e, }; 1063 - static int jz4780_ssi0_gpc_d_pins[] = { 0x56, }; 1063 + static int jz4780_ssi0_gpc_d_pins[] = { 0x76, }; 1064 1064 static int jz4780_ssi0_ce0_a_23_pins[] = { 0x17, }; 1065 1065 static int jz4780_ssi0_ce0_a_25_pins[] = { 0x19, }; 1066 1066 static int jz4780_ssi0_ce0_b_pins[] = { 0x3f, }; 1067 - static int jz4780_ssi0_ce0_d_pins[] = { 0x57, }; 1067 + static int jz4780_ssi0_ce0_d_pins[] = { 0x77, }; 1068 1068 static int jz4780_ssi0_ce1_b_pins[] = { 0x35, }; 1069 - static int jz4780_ssi0_ce1_d_pins[] = { 0x55, }; 1069 + static int jz4780_ssi0_ce1_d_pins[] = { 0x75, }; 1070 1070 static int jz4780_ssi1_dt_b_pins[] = { 0x3d, }; 1071 - static int jz4780_ssi1_dt_d_pins[] = { 0x59, }; 1071 + static int jz4780_ssi1_dt_d_pins[] = { 0x79, }; 1072 1072 static int jz4780_ssi1_dr_b_pins[] = { 0x34, }; 1073 - static int jz4780_ssi1_dr_d_pins[] = { 0x54, }; 1073 + static int jz4780_ssi1_dr_d_pins[] = { 0x74, }; 1074 1074 static int jz4780_ssi1_clk_b_pins[] = { 0x3c, }; 1075 - static int jz4780_ssi1_clk_d_pins[] = { 0x58, }; 1075 + static int jz4780_ssi1_clk_d_pins[] = { 0x78, }; 1076 1076 static int jz4780_ssi1_gpc_b_pins[] = { 0x3e, }; 1077 - static int jz4780_ssi1_gpc_d_pins[] = { 0x56, }; 1077 + static int jz4780_ssi1_gpc_d_pins[] = { 0x76, }; 1078 1078 static int jz4780_ssi1_ce0_b_pins[] = { 0x3f, }; 1079 - static int jz4780_ssi1_ce0_d_pins[] = { 0x57, }; 1079 + static int jz4780_ssi1_ce0_d_pins[] = { 0x77, }; 1080 1080 static int jz4780_ssi1_ce1_b_pins[] = { 0x35, }; 1081 - static int jz4780_ssi1_ce1_d_pins[] = { 0x55, }; 1081 + static int jz4780_ssi1_ce1_d_pins[] = { 0x75, }; 1082 1082 static int jz4780_mmc0_8bit_a_pins[] = { 0x04, 0x05, 0x06, 0x07, 0x18, }; 1083 1083 static int jz4780_i2c3_pins[] = { 0x6a, 0x6b, }; 1084 1084 static int jz4780_i2c4_e_pins[] = { 0x8c, 0x8d, };
+3 -1
drivers/pinctrl/pinctrl-mcp23s08_spi.c
··· 119 119 return -EINVAL; 120 120 } 121 121 122 - copy = devm_kmemdup(dev, &config, sizeof(config), GFP_KERNEL); 122 + copy = devm_kmemdup(dev, config, sizeof(*config), GFP_KERNEL); 123 123 if (!copy) 124 124 return -ENOMEM; 125 125 126 126 copy->name = name; 127 127 128 128 mcp->regmap = devm_regmap_init(dev, &mcp23sxx_spi_regmap, mcp, copy); 129 + if (IS_ERR(mcp->regmap)) 130 + dev_err(dev, "regmap init failed for %s\n", mcp->chip.label); 129 131 return PTR_ERR_OR_ZERO(mcp->regmap); 130 132 } 131 133
+14 -16
drivers/pinctrl/pinctrl-rockchip.c
··· 3155 3155 if (!bank->domain) 3156 3156 return -ENXIO; 3157 3157 3158 + clk_enable(bank->clk); 3158 3159 virq = irq_create_mapping(bank->domain, offset); 3160 + clk_disable(bank->clk); 3159 3161 3160 3162 return (virq) ? : -ENXIO; 3161 3163 } ··· 3196 3194 3197 3195 irq = __ffs(pend); 3198 3196 pend &= ~BIT(irq); 3199 - virq = irq_linear_revmap(bank->domain, irq); 3197 + virq = irq_find_mapping(bank->domain, irq); 3200 3198 3201 3199 if (!virq) { 3202 3200 dev_err(bank->drvdata->dev, "unmapped irq %d\n", irq); ··· 3375 3373 unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; 3376 3374 struct irq_chip_generic *gc; 3377 3375 int ret; 3378 - int i, j; 3376 + int i; 3379 3377 3380 3378 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { 3381 3379 if (!bank->valid) { ··· 3402 3400 3403 3401 ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, 3404 3402 "rockchip_gpio_irq", handle_level_irq, 3405 - clr, 0, IRQ_GC_INIT_MASK_CACHE); 3403 + clr, 0, 0); 3406 3404 if (ret) { 3407 3405 dev_err(&pdev->dev, "could not alloc generic chips for bank %s\n", 3408 3406 bank->name); ··· 3410 3408 clk_disable(bank->clk); 3411 3409 continue; 3412 3410 } 3413 - 3414 - /* 3415 - * Linux assumes that all interrupts start out disabled/masked. 3416 - * Our driver only uses the concept of masked and always keeps 3417 - * things enabled, so for us that's all masked and all enabled. 3418 - */ 3419 - writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTMASK); 3420 - writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTEN); 3421 3411 3422 3412 gc = irq_get_domain_generic_chip(bank->domain, 0); 3423 3413 gc->reg_base = bank->reg_base; ··· 3427 3433 gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type; 3428 3434 gc->wake_enabled = IRQ_MSK(bank->nr_pins); 3429 3435 3436 + /* 3437 + * Linux assumes that all interrupts start out disabled/masked. 3438 + * Our driver only uses the concept of masked and always keeps 3439 + * things enabled, so for us that's all masked and all enabled. 3440 + */ 3441 + writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTMASK); 3442 + writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTEN); 3443 + gc->mask_cache = 0xffffffff; 3444 + 3430 3445 irq_set_chained_handler_and_data(bank->irq, 3431 3446 rockchip_irq_demux, bank); 3432 - 3433 - /* map the gpio irqs here, when the clock is still running */ 3434 - for (j = 0 ; j < 32 ; j++) 3435 - irq_create_mapping(bank->domain, j); 3436 - 3437 3447 clk_disable(bank->clk); 3438 3448 } 3439 3449
+20 -14
drivers/pinctrl/qcom/pinctrl-msm.c
··· 815 815 816 816 static void msm_gpio_irq_enable(struct irq_data *d) 817 817 { 818 - /* 819 - * Clear the interrupt that may be pending before we enable 820 - * the line. 821 - * This is especially a problem with the GPIOs routed to the 822 - * PDC. These GPIOs are direct-connect interrupts to the GIC. 823 - * Disabling the interrupt line at the PDC does not prevent 824 - * the interrupt from being latched at the GIC. The state at 825 - * GIC needs to be cleared before enabling. 826 - */ 827 - if (d->parent_data) { 828 - irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, 0); 829 - irq_chip_enable_parent(d); 830 - } 818 + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 819 + struct msm_pinctrl *pctrl = gpiochip_get_data(gc); 831 820 832 - msm_gpio_irq_clear_unmask(d, true); 821 + if (d->parent_data) 822 + irq_chip_enable_parent(d); 823 + 824 + if (!test_bit(d->hwirq, pctrl->skip_wake_irqs)) 825 + msm_gpio_irq_clear_unmask(d, true); 833 826 } 834 827 835 828 static void msm_gpio_irq_disable(struct irq_data *d) ··· 1097 1104 ret = -EINVAL; 1098 1105 goto out; 1099 1106 } 1107 + 1108 + /* 1109 + * Clear the interrupt that may be pending before we enable 1110 + * the line. 1111 + * This is especially a problem with the GPIOs routed to the 1112 + * PDC. These GPIOs are direct-connect interrupts to the GIC. 1113 + * Disabling the interrupt line at the PDC does not prevent 1114 + * the interrupt from being latched at the GIC. The state at 1115 + * GIC needs to be cleared before enabling. 1116 + */ 1117 + if (d->parent_data && test_bit(d->hwirq, pctrl->skip_wake_irqs)) 1118 + irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, 0); 1119 + 1100 1120 return 0; 1101 1121 out: 1102 1122 module_put(gc->owner);
+18
drivers/pinctrl/qcom/pinctrl-sm8250.c
··· 1313 1313 [183] = SDC_PINGROUP(sdc2_data, 0xb7000, 9, 0), 1314 1314 }; 1315 1315 1316 + static const struct msm_gpio_wakeirq_map sm8250_pdc_map[] = { 1317 + { 0, 79 }, { 1, 84 }, { 2, 80 }, { 3, 82 }, { 4, 107 }, { 7, 43 }, 1318 + { 11, 42 }, { 14, 44 }, { 15, 52 }, { 19, 67 }, { 23, 68 }, { 24, 105 }, 1319 + { 27, 92 }, { 28, 106 }, { 31, 69 }, { 35, 70 }, { 39, 37 }, 1320 + { 40, 108 }, { 43, 71 }, { 45, 72 }, { 47, 83 }, { 51, 74 }, { 55, 77 }, 1321 + { 59, 78 }, { 63, 75 }, { 64, 81 }, { 65, 87 }, { 66, 88 }, { 67, 89 }, 1322 + { 68, 54 }, { 70, 85 }, { 77, 46 }, { 80, 90 }, { 81, 91 }, { 83, 97 }, 1323 + { 84, 98 }, { 86, 99 }, { 87, 100 }, { 88, 101 }, { 89, 102 }, 1324 + { 92, 103 }, { 93, 104 }, { 100, 53 }, { 103, 47 }, { 104, 48 }, 1325 + { 108, 49 }, { 109, 94 }, { 110, 95 }, { 111, 96 }, { 112, 55 }, 1326 + { 113, 56 }, { 118, 50 }, { 121, 51 }, { 122, 57 }, { 123, 58 }, 1327 + { 124, 45 }, { 126, 59 }, { 128, 76 }, { 129, 86 }, { 132, 93 }, 1328 + { 133, 65 }, { 134, 66 }, { 136, 62 }, { 137, 63 }, { 138, 64 }, 1329 + { 142, 60 }, { 143, 61 } 1330 + }; 1331 + 1316 1332 static const struct msm_pinctrl_soc_data sm8250_pinctrl = { 1317 1333 .pins = sm8250_pins, 1318 1334 .npins = ARRAY_SIZE(sm8250_pins), ··· 1339 1323 .ngpios = 181, 1340 1324 .tiles = sm8250_tiles, 1341 1325 .ntiles = ARRAY_SIZE(sm8250_tiles), 1326 + .wakeirq_map = sm8250_pdc_map, 1327 + .nwakeirq_map = ARRAY_SIZE(sm8250_pdc_map), 1342 1328 }; 1343 1329 1344 1330 static int sm8250_pinctrl_probe(struct platform_device *pdev)
+25 -18
drivers/regulator/core.c
··· 1315 1315 /** 1316 1316 * set_machine_constraints - sets regulator constraints 1317 1317 * @rdev: regulator source 1318 - * @constraints: constraints to apply 1319 1318 * 1320 1319 * Allows platform initialisation code to define and constrain 1321 1320 * regulator circuits e.g. valid voltage/current ranges, etc. NOTE: ··· 1322 1323 * regulator operations to proceed i.e. set_voltage, set_current_limit, 1323 1324 * set_mode. 1324 1325 */ 1325 - static int set_machine_constraints(struct regulator_dev *rdev, 1326 - const struct regulation_constraints *constraints) 1326 + static int set_machine_constraints(struct regulator_dev *rdev) 1327 1327 { 1328 1328 int ret = 0; 1329 1329 const struct regulator_ops *ops = rdev->desc->ops; 1330 - 1331 - if (constraints) 1332 - rdev->constraints = kmemdup(constraints, sizeof(*constraints), 1333 - GFP_KERNEL); 1334 - else 1335 - rdev->constraints = kzalloc(sizeof(*constraints), 1336 - GFP_KERNEL); 1337 - if (!rdev->constraints) 1338 - return -ENOMEM; 1339 1330 1340 1331 ret = machine_constraints_voltage(rdev, rdev->constraints); 1341 1332 if (ret != 0) ··· 1839 1850 rdev->supply_name, rdev->desc->name); 1840 1851 return -EPROBE_DEFER; 1841 1852 } 1853 + } 1854 + 1855 + if (r == rdev) { 1856 + dev_err(dev, "Supply for %s (%s) resolved to itself\n", 1857 + rdev->desc->name, rdev->supply_name); 1858 + if (!have_full_constraints()) 1859 + return -EINVAL; 1860 + r = dummy_regulator_rdev; 1861 + get_device(&r->dev); 1842 1862 } 1843 1863 1844 1864 /* ··· 5144 5146 regulator_register(const struct regulator_desc *regulator_desc, 5145 5147 const struct regulator_config *cfg) 5146 5148 { 5147 - const struct regulation_constraints *constraints = NULL; 5148 5149 const struct regulator_init_data *init_data; 5149 5150 struct regulator_config *config = NULL; 5150 5151 static atomic_t regulator_no = ATOMIC_INIT(-1); ··· 5282 5285 5283 5286 /* set regulator constraints */ 5284 5287 if (init_data) 5285 - constraints = &init_data->constraints; 5288 + rdev->constraints = kmemdup(&init_data->constraints, 5289 + sizeof(*rdev->constraints), 5290 + GFP_KERNEL); 5291 + else 5292 + rdev->constraints = kzalloc(sizeof(*rdev->constraints), 5293 + GFP_KERNEL); 5294 + if (!rdev->constraints) { 5295 + ret = -ENOMEM; 5296 + goto wash; 5297 + } 5286 5298 5287 5299 if (init_data && init_data->supply_regulator) 5288 5300 rdev->supply_name = init_data->supply_regulator; 5289 5301 else if (regulator_desc->supply_name) 5290 5302 rdev->supply_name = regulator_desc->supply_name; 5291 5303 5292 - ret = set_machine_constraints(rdev, constraints); 5304 + ret = set_machine_constraints(rdev); 5293 5305 if (ret == -EPROBE_DEFER) { 5294 5306 /* Regulator might be in bypass mode and so needs its supply 5295 5307 * to set the constraints */ ··· 5307 5301 * that is just being created */ 5308 5302 ret = regulator_resolve_supply(rdev); 5309 5303 if (!ret) 5310 - ret = set_machine_constraints(rdev, constraints); 5304 + ret = set_machine_constraints(rdev); 5311 5305 else 5312 5306 rdev_dbg(rdev, "unable to resolve supply early: %pe\n", 5313 5307 ERR_PTR(ret)); ··· 5849 5843 if (rdev->use_count) 5850 5844 goto unlock; 5851 5845 5852 - /* If we can't read the status assume it's on. */ 5846 + /* If we can't read the status assume it's always on. */ 5853 5847 if (ops->is_enabled) 5854 5848 enabled = ops->is_enabled(rdev); 5855 5849 else 5856 5850 enabled = 1; 5857 5851 5858 - if (!enabled) 5852 + /* But if reading the status failed, assume that it's off. */ 5853 + if (enabled <= 0) 5859 5854 goto unlock; 5860 5855 5861 5856 if (have_full_constraints()) {
+8 -5
drivers/regulator/pfuze100-regulator.c
··· 836 836 * the switched regulator till yet. 837 837 */ 838 838 if (pfuze_chip->flags & PFUZE_FLAG_DISABLE_SW) { 839 - if (pfuze_chip->regulator_descs[i].sw_reg) { 840 - desc->ops = &pfuze100_sw_disable_regulator_ops; 841 - desc->enable_val = 0x8; 842 - desc->disable_val = 0x0; 843 - desc->enable_time = 500; 839 + if (pfuze_chip->chip_id == PFUZE100 || 840 + pfuze_chip->chip_id == PFUZE200) { 841 + if (pfuze_chip->regulator_descs[i].sw_reg) { 842 + desc->ops = &pfuze100_sw_disable_regulator_ops; 843 + desc->enable_val = 0x8; 844 + desc->disable_val = 0x0; 845 + desc->enable_time = 500; 846 + } 844 847 } 845 848 } 846 849
+11 -1
drivers/regulator/ti-abb-regulator.c
··· 342 342 return ret; 343 343 } 344 344 345 - /* If data is exactly the same, then just update index, no change */ 346 345 info = &abb->info[sel]; 346 + /* 347 + * When Linux kernel is starting up, we are'nt sure of the 348 + * Bias configuration that bootloader has configured. 349 + * So, we get to know the actual setting the first time 350 + * we are asked to transition. 351 + */ 352 + if (abb->current_info_idx == -EINVAL) 353 + goto just_set_abb; 354 + 355 + /* If data is exactly the same, then just update index, no change */ 347 356 oinfo = &abb->info[abb->current_info_idx]; 348 357 if (!memcmp(info, oinfo, sizeof(*info))) { 349 358 dev_dbg(dev, "%s: Same data new idx=%d, old idx=%d\n", __func__, ··· 360 351 goto out; 361 352 } 362 353 354 + just_set_abb: 363 355 ret = ti_abb_set_opp(rdev, abb, info); 364 356 365 357 out:
+29 -5
drivers/scsi/ufs/ufshcd.c
··· 1627 1627 */ 1628 1628 fallthrough; 1629 1629 case CLKS_OFF: 1630 - ufshcd_scsi_block_requests(hba); 1631 1630 hba->clk_gating.state = REQ_CLKS_ON; 1632 1631 trace_ufshcd_clk_gating(dev_name(hba->dev), 1633 1632 hba->clk_gating.state); 1634 - queue_work(hba->clk_gating.clk_gating_workq, 1635 - &hba->clk_gating.ungate_work); 1633 + if (queue_work(hba->clk_gating.clk_gating_workq, 1634 + &hba->clk_gating.ungate_work)) 1635 + ufshcd_scsi_block_requests(hba); 1636 1636 /* 1637 1637 * fall through to check if we should wait for this 1638 1638 * work to be done or not. ··· 2115 2115 unsigned long flags; 2116 2116 2117 2117 if (wait_for_completion_timeout(&uic_cmd->done, 2118 - msecs_to_jiffies(UIC_CMD_TIMEOUT))) 2118 + msecs_to_jiffies(UIC_CMD_TIMEOUT))) { 2119 2119 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT; 2120 - else 2120 + } else { 2121 2121 ret = -ETIMEDOUT; 2122 + dev_err(hba->dev, 2123 + "uic cmd 0x%x with arg3 0x%x completion timeout\n", 2124 + uic_cmd->command, uic_cmd->argument3); 2125 + 2126 + if (!uic_cmd->cmd_active) { 2127 + dev_err(hba->dev, "%s: UIC cmd has been completed, return the result\n", 2128 + __func__); 2129 + ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT; 2130 + } 2131 + } 2122 2132 2123 2133 spin_lock_irqsave(hba->host->host_lock, flags); 2124 2134 hba->active_uic_cmd = NULL; ··· 2160 2150 if (completion) 2161 2151 init_completion(&uic_cmd->done); 2162 2152 2153 + uic_cmd->cmd_active = 1; 2163 2154 ufshcd_dispatch_uic_cmd(hba, uic_cmd); 2164 2155 2165 2156 return 0; ··· 3818 3807 dev_err(hba->dev, 3819 3808 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n", 3820 3809 cmd->command, cmd->argument3); 3810 + 3811 + if (!cmd->cmd_active) { 3812 + dev_err(hba->dev, "%s: Power Mode Change operation has been completed, go check UPMCRS\n", 3813 + __func__); 3814 + goto check_upmcrs; 3815 + } 3816 + 3821 3817 ret = -ETIMEDOUT; 3822 3818 goto out; 3823 3819 } 3824 3820 3821 + check_upmcrs: 3825 3822 status = ufshcd_get_upmcrs(hba); 3826 3823 if (status != PWR_LOCAL) { 3827 3824 dev_err(hba->dev, ··· 4921 4902 ufshcd_get_uic_cmd_result(hba); 4922 4903 hba->active_uic_cmd->argument3 = 4923 4904 ufshcd_get_dme_attr_val(hba); 4905 + if (!hba->uic_async_done) 4906 + hba->active_uic_cmd->cmd_active = 0; 4924 4907 complete(&hba->active_uic_cmd->done); 4925 4908 retval = IRQ_HANDLED; 4926 4909 } 4927 4910 4928 4911 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) { 4912 + hba->active_uic_cmd->cmd_active = 0; 4929 4913 complete(hba->uic_async_done); 4930 4914 retval = IRQ_HANDLED; 4931 4915 } ··· 8928 8906 blk_mq_free_tag_set(&hba->tmf_tag_set); 8929 8907 blk_cleanup_queue(hba->cmd_queue); 8930 8908 scsi_remove_host(hba->host); 8909 + destroy_workqueue(hba->eh_wq); 8931 8910 /* disable interrupts */ 8932 8911 ufshcd_disable_intr(hba, hba->intr_mask); 8933 8912 ufshcd_hba_stop(hba); ··· 9229 9206 exit_gating: 9230 9207 ufshcd_exit_clk_scaling(hba); 9231 9208 ufshcd_exit_clk_gating(hba); 9209 + destroy_workqueue(hba->eh_wq); 9232 9210 out_disable: 9233 9211 hba->is_irq_enabled = false; 9234 9212 ufshcd_hba_exit(hba);
+2
drivers/scsi/ufs/ufshcd.h
··· 64 64 * @argument1: UIC command argument 1 65 65 * @argument2: UIC command argument 2 66 66 * @argument3: UIC command argument 3 67 + * @cmd_active: Indicate if UIC command is outstanding 67 68 * @done: UIC command completion 68 69 */ 69 70 struct uic_command { ··· 72 71 u32 argument1; 73 72 u32 argument2; 74 73 u32 argument3; 74 + int cmd_active; 75 75 struct completion done; 76 76 }; 77 77
+12 -22
drivers/spi/spi-bcm-qspi.c
··· 1327 1327 1328 1328 data = of_id->data; 1329 1329 1330 - master = spi_alloc_master(dev, sizeof(struct bcm_qspi)); 1330 + master = devm_spi_alloc_master(dev, sizeof(struct bcm_qspi)); 1331 1331 if (!master) { 1332 1332 dev_err(dev, "error allocating spi_master\n"); 1333 1333 return -ENOMEM; ··· 1367 1367 1368 1368 if (res) { 1369 1369 qspi->base[MSPI] = devm_ioremap_resource(dev, res); 1370 - if (IS_ERR(qspi->base[MSPI])) { 1371 - ret = PTR_ERR(qspi->base[MSPI]); 1372 - goto qspi_resource_err; 1373 - } 1370 + if (IS_ERR(qspi->base[MSPI])) 1371 + return PTR_ERR(qspi->base[MSPI]); 1374 1372 } else { 1375 - goto qspi_resource_err; 1373 + return 0; 1376 1374 } 1377 1375 1378 1376 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "bspi"); 1379 1377 if (res) { 1380 1378 qspi->base[BSPI] = devm_ioremap_resource(dev, res); 1381 - if (IS_ERR(qspi->base[BSPI])) { 1382 - ret = PTR_ERR(qspi->base[BSPI]); 1383 - goto qspi_resource_err; 1384 - } 1379 + if (IS_ERR(qspi->base[BSPI])) 1380 + return PTR_ERR(qspi->base[BSPI]); 1385 1381 qspi->bspi_mode = true; 1386 1382 } else { 1387 1383 qspi->bspi_mode = false; ··· 1388 1392 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cs_reg"); 1389 1393 if (res) { 1390 1394 qspi->base[CHIP_SELECT] = devm_ioremap_resource(dev, res); 1391 - if (IS_ERR(qspi->base[CHIP_SELECT])) { 1392 - ret = PTR_ERR(qspi->base[CHIP_SELECT]); 1393 - goto qspi_resource_err; 1394 - } 1395 + if (IS_ERR(qspi->base[CHIP_SELECT])) 1396 + return PTR_ERR(qspi->base[CHIP_SELECT]); 1395 1397 } 1396 1398 1397 1399 qspi->dev_ids = kcalloc(num_irqs, sizeof(struct bcm_qspi_dev_id), 1398 1400 GFP_KERNEL); 1399 - if (!qspi->dev_ids) { 1400 - ret = -ENOMEM; 1401 - goto qspi_resource_err; 1402 - } 1401 + if (!qspi->dev_ids) 1402 + return -ENOMEM; 1403 1403 1404 1404 for (val = 0; val < num_irqs; val++) { 1405 1405 irq = -1; ··· 1476 1484 qspi->xfer_mode.addrlen = -1; 1477 1485 qspi->xfer_mode.hp = -1; 1478 1486 1479 - ret = devm_spi_register_master(&pdev->dev, master); 1487 + ret = spi_register_master(master); 1480 1488 if (ret < 0) { 1481 1489 dev_err(dev, "can't register master\n"); 1482 1490 goto qspi_reg_err; ··· 1489 1497 clk_disable_unprepare(qspi->clk); 1490 1498 qspi_probe_err: 1491 1499 kfree(qspi->dev_ids); 1492 - qspi_resource_err: 1493 - spi_master_put(master); 1494 1500 return ret; 1495 1501 } 1496 1502 /* probe function to be called by SoC specific platform driver probe */ ··· 1498 1508 { 1499 1509 struct bcm_qspi *qspi = platform_get_drvdata(pdev); 1500 1510 1511 + spi_unregister_master(qspi->master); 1501 1512 bcm_qspi_hw_uninit(qspi); 1502 1513 clk_disable_unprepare(qspi->clk); 1503 1514 kfree(qspi->dev_ids); 1504 - spi_unregister_master(qspi->master); 1505 1515 1506 1516 return 0; 1507 1517 }
+8 -16
drivers/spi/spi-bcm2835.c
··· 1278 1278 struct bcm2835_spi *bs; 1279 1279 int err; 1280 1280 1281 - ctlr = spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs), 1281 + ctlr = devm_spi_alloc_master(&pdev->dev, ALIGN(sizeof(*bs), 1282 1282 dma_get_cache_alignment())); 1283 1283 if (!ctlr) 1284 1284 return -ENOMEM; ··· 1299 1299 bs->ctlr = ctlr; 1300 1300 1301 1301 bs->regs = devm_platform_ioremap_resource(pdev, 0); 1302 - if (IS_ERR(bs->regs)) { 1303 - err = PTR_ERR(bs->regs); 1304 - goto out_controller_put; 1305 - } 1302 + if (IS_ERR(bs->regs)) 1303 + return PTR_ERR(bs->regs); 1306 1304 1307 1305 bs->clk = devm_clk_get(&pdev->dev, NULL); 1308 - if (IS_ERR(bs->clk)) { 1309 - err = dev_err_probe(&pdev->dev, PTR_ERR(bs->clk), 1310 - "could not get clk\n"); 1311 - goto out_controller_put; 1312 - } 1306 + if (IS_ERR(bs->clk)) 1307 + return dev_err_probe(&pdev->dev, PTR_ERR(bs->clk), 1308 + "could not get clk\n"); 1313 1309 1314 1310 bs->irq = platform_get_irq(pdev, 0); 1315 - if (bs->irq <= 0) { 1316 - err = bs->irq ? bs->irq : -ENODEV; 1317 - goto out_controller_put; 1318 - } 1311 + if (bs->irq <= 0) 1312 + return bs->irq ? bs->irq : -ENODEV; 1319 1313 1320 1314 clk_prepare_enable(bs->clk); 1321 1315 ··· 1343 1349 bcm2835_dma_release(ctlr, bs); 1344 1350 out_clk_disable: 1345 1351 clk_disable_unprepare(bs->clk); 1346 - out_controller_put: 1347 - spi_controller_put(ctlr); 1348 1352 return err; 1349 1353 } 1350 1354
+7 -13
drivers/spi/spi-bcm2835aux.c
··· 494 494 unsigned long clk_hz; 495 495 int err; 496 496 497 - master = spi_alloc_master(&pdev->dev, sizeof(*bs)); 497 + master = devm_spi_alloc_master(&pdev->dev, sizeof(*bs)); 498 498 if (!master) 499 499 return -ENOMEM; 500 500 ··· 524 524 525 525 /* the main area */ 526 526 bs->regs = devm_platform_ioremap_resource(pdev, 0); 527 - if (IS_ERR(bs->regs)) { 528 - err = PTR_ERR(bs->regs); 529 - goto out_master_put; 530 - } 527 + if (IS_ERR(bs->regs)) 528 + return PTR_ERR(bs->regs); 531 529 532 530 bs->clk = devm_clk_get(&pdev->dev, NULL); 533 531 if (IS_ERR(bs->clk)) { 534 532 err = PTR_ERR(bs->clk); 535 533 dev_err(&pdev->dev, "could not get clk: %d\n", err); 536 - goto out_master_put; 534 + return err; 537 535 } 538 536 539 537 bs->irq = platform_get_irq(pdev, 0); 540 - if (bs->irq <= 0) { 541 - err = bs->irq ? bs->irq : -ENODEV; 542 - goto out_master_put; 543 - } 538 + if (bs->irq <= 0) 539 + return bs->irq ? bs->irq : -ENODEV; 544 540 545 541 /* this also enables the HW block */ 546 542 err = clk_prepare_enable(bs->clk); 547 543 if (err) { 548 544 dev_err(&pdev->dev, "could not prepare clock: %d\n", err); 549 - goto out_master_put; 545 + return err; 550 546 } 551 547 552 548 /* just checking if the clock returns a sane value */ ··· 577 581 578 582 out_clk_disable: 579 583 clk_disable_unprepare(bs->clk); 580 - out_master_put: 581 - spi_master_put(master); 582 584 return err; 583 585 } 584 586
+2
drivers/spi/spi-cadence-quadspi.c
··· 1260 1260 /* Obtain QSPI reset control */ 1261 1261 rstc = devm_reset_control_get_optional_exclusive(dev, "qspi"); 1262 1262 if (IS_ERR(rstc)) { 1263 + ret = PTR_ERR(rstc); 1263 1264 dev_err(dev, "Cannot get QSPI reset.\n"); 1264 1265 goto probe_reset_failed; 1265 1266 } 1266 1267 1267 1268 rstc_ocp = devm_reset_control_get_optional_exclusive(dev, "qspi-ocp"); 1268 1269 if (IS_ERR(rstc_ocp)) { 1270 + ret = PTR_ERR(rstc_ocp); 1269 1271 dev_err(dev, "Cannot get QSPI OCP reset.\n"); 1270 1272 goto probe_reset_failed; 1271 1273 }
+2 -2
drivers/spi/spi-dw-core.c
··· 357 357 dw_writel(dws, DW_SPI_TXFTLR, level); 358 358 dw_writel(dws, DW_SPI_RXFTLR, level - 1); 359 359 360 + dws->transfer_handler = dw_spi_transfer_handler; 361 + 360 362 imask = SPI_INT_TXEI | SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI | 361 363 SPI_INT_RXFI; 362 364 spi_umask_intr(dws, imask); 363 - 364 - dws->transfer_handler = dw_spi_transfer_handler; 365 365 } 366 366 367 367 /*
+1 -1
drivers/spi/spi-fsi.c
··· 477 477 478 478 rc = fsi_spi_check_mux(ctx->fsi, ctx->dev); 479 479 if (rc) 480 - return rc; 480 + goto error; 481 481 482 482 list_for_each_entry(transfer, &mesg->transfers, transfer_list) { 483 483 struct fsi_spi_sequence seq;
-3
drivers/spi/spi-fsl-lpspi.c
··· 938 938 spi_controller_get_devdata(controller); 939 939 940 940 pm_runtime_disable(fsl_lpspi->dev); 941 - 942 - spi_master_put(controller); 943 - 944 941 return 0; 945 942 } 946 943
+1 -1
drivers/spi/spi-npcm-fiu.c
··· 679 679 struct resource *res; 680 680 int id; 681 681 682 - ctrl = spi_alloc_master(dev, sizeof(*fiu)); 682 + ctrl = devm_spi_alloc_master(dev, sizeof(*fiu)); 683 683 if (!ctrl) 684 684 return -ENOMEM; 685 685
+63 -18
drivers/spi/spi.c
··· 812 812 enable = !enable; 813 813 814 814 if (spi->cs_gpiod || gpio_is_valid(spi->cs_gpio)) { 815 - /* 816 - * Honour the SPI_NO_CS flag and invert the enable line, as 817 - * active low is default for SPI. Execution paths that handle 818 - * polarity inversion in gpiolib (such as device tree) will 819 - * enforce active high using the SPI_CS_HIGH resulting in a 820 - * double inversion through the code above. 821 - */ 822 815 if (!(spi->mode & SPI_NO_CS)) { 823 816 if (spi->cs_gpiod) 817 + /* polarity handled by gpiolib */ 824 818 gpiod_set_value_cansleep(spi->cs_gpiod, 825 - !enable); 819 + enable1); 826 820 else 821 + /* 822 + * invert the enable line, as active low is 823 + * default for SPI. 824 + */ 827 825 gpio_set_value_cansleep(spi->cs_gpio, !enable); 828 826 } 829 827 /* Some SPI masters need both GPIO CS & slave_select */ ··· 1990 1992 } 1991 1993 spi->chip_select = value; 1992 1994 1993 - /* 1994 - * For descriptors associated with the device, polarity inversion is 1995 - * handled in the gpiolib, so all gpio chip selects are "active high" 1996 - * in the logical sense, the gpiolib will invert the line if need be. 1997 - */ 1998 - if ((ctlr->use_gpio_descriptors) && ctlr->cs_gpiods && 1999 - ctlr->cs_gpiods[spi->chip_select]) 2000 - spi->mode |= SPI_CS_HIGH; 2001 - 2002 1995 /* Device speed */ 2003 1996 if (!of_property_read_u32(nc, "spi-max-frequency", &value)) 2004 1997 spi->max_speed_hz = value; ··· 2442 2453 } 2443 2454 EXPORT_SYMBOL_GPL(__spi_alloc_controller); 2444 2455 2456 + static void devm_spi_release_controller(struct device *dev, void *ctlr) 2457 + { 2458 + spi_controller_put(*(struct spi_controller **)ctlr); 2459 + } 2460 + 2461 + /** 2462 + * __devm_spi_alloc_controller - resource-managed __spi_alloc_controller() 2463 + * @dev: physical device of SPI controller 2464 + * @size: how much zeroed driver-private data to allocate 2465 + * @slave: whether to allocate an SPI master (false) or SPI slave (true) 2466 + * Context: can sleep 2467 + * 2468 + * Allocate an SPI controller and automatically release a reference on it 2469 + * when @dev is unbound from its driver. Drivers are thus relieved from 2470 + * having to call spi_controller_put(). 2471 + * 2472 + * The arguments to this function are identical to __spi_alloc_controller(). 2473 + * 2474 + * Return: the SPI controller structure on success, else NULL. 2475 + */ 2476 + struct spi_controller *__devm_spi_alloc_controller(struct device *dev, 2477 + unsigned int size, 2478 + bool slave) 2479 + { 2480 + struct spi_controller **ptr, *ctlr; 2481 + 2482 + ptr = devres_alloc(devm_spi_release_controller, sizeof(*ptr), 2483 + GFP_KERNEL); 2484 + if (!ptr) 2485 + return NULL; 2486 + 2487 + ctlr = __spi_alloc_controller(dev, size, slave); 2488 + if (ctlr) { 2489 + *ptr = ctlr; 2490 + devres_add(dev, ptr); 2491 + } else { 2492 + devres_free(ptr); 2493 + } 2494 + 2495 + return ctlr; 2496 + } 2497 + EXPORT_SYMBOL_GPL(__devm_spi_alloc_controller); 2498 + 2445 2499 #ifdef CONFIG_OF 2446 2500 static int of_spi_get_gpio_numbers(struct spi_controller *ctlr) 2447 2501 { ··· 2821 2789 } 2822 2790 EXPORT_SYMBOL_GPL(devm_spi_register_controller); 2823 2791 2792 + static int devm_spi_match_controller(struct device *dev, void *res, void *ctlr) 2793 + { 2794 + return *(struct spi_controller **)res == ctlr; 2795 + } 2796 + 2824 2797 static int __unregister(struct device *dev, void *null) 2825 2798 { 2826 2799 spi_unregister_device(to_spi_device(dev)); ··· 2867 2830 list_del(&ctlr->list); 2868 2831 mutex_unlock(&board_lock); 2869 2832 2870 - device_unregister(&ctlr->dev); 2833 + device_del(&ctlr->dev); 2834 + 2835 + /* Release the last reference on the controller if its driver 2836 + * has not yet been converted to devm_spi_alloc_master/slave(). 2837 + */ 2838 + if (!devres_find(ctlr->dev.parent, devm_spi_release_controller, 2839 + devm_spi_match_controller, ctlr)) 2840 + put_device(&ctlr->dev); 2841 + 2871 2842 /* free bus id */ 2872 2843 mutex_lock(&board_lock); 2873 2844 if (found == ctlr)
+4 -4
drivers/tee/amdtee/amdtee_private.h
··· 64 64 /** 65 65 * struct amdtee_context_data - AMD-TEE driver context data 66 66 * @sess_list: Keeps track of sessions opened in current TEE context 67 + * @shm_list: Keeps track of buffers allocated and mapped in current TEE 68 + * context 67 69 */ 68 70 struct amdtee_context_data { 69 71 struct list_head sess_list; 72 + struct list_head shm_list; 73 + struct mutex shm_mutex; /* synchronizes access to @shm_list */ 70 74 }; 71 75 72 76 struct amdtee_driver_data { ··· 91 87 struct list_head shm_node; 92 88 void *kaddr; 93 89 u32 buf_id; 94 - }; 95 - 96 - struct amdtee_shm_context { 97 - struct list_head shmdata_list; 98 90 }; 99 91 100 92 #define LOWER_TWO_BYTE_MASK 0x0000FFFF
+19 -7
drivers/tee/amdtee/core.c
··· 20 20 21 21 static struct amdtee_driver_data *drv_data; 22 22 static DEFINE_MUTEX(session_list_mutex); 23 - static struct amdtee_shm_context shmctx; 24 23 25 24 static void amdtee_get_version(struct tee_device *teedev, 26 25 struct tee_ioctl_version_data *vers) ··· 41 42 return -ENOMEM; 42 43 43 44 INIT_LIST_HEAD(&ctxdata->sess_list); 44 - INIT_LIST_HEAD(&shmctx.shmdata_list); 45 + INIT_LIST_HEAD(&ctxdata->shm_list); 46 + mutex_init(&ctxdata->shm_mutex); 45 47 46 48 ctx->data = ctxdata; 47 49 return 0; ··· 86 86 list_del(&sess->list_node); 87 87 release_session(sess); 88 88 } 89 + mutex_destroy(&ctxdata->shm_mutex); 89 90 kfree(ctxdata); 90 91 91 92 ctx->data = NULL; ··· 153 152 154 153 u32 get_buffer_id(struct tee_shm *shm) 155 154 { 156 - u32 buf_id = 0; 155 + struct amdtee_context_data *ctxdata = shm->ctx->data; 157 156 struct amdtee_shm_data *shmdata; 157 + u32 buf_id = 0; 158 158 159 - list_for_each_entry(shmdata, &shmctx.shmdata_list, shm_node) 159 + mutex_lock(&ctxdata->shm_mutex); 160 + list_for_each_entry(shmdata, &ctxdata->shm_list, shm_node) 160 161 if (shmdata->kaddr == shm->kaddr) { 161 162 buf_id = shmdata->buf_id; 162 163 break; 163 164 } 165 + mutex_unlock(&ctxdata->shm_mutex); 164 166 165 167 return buf_id; 166 168 } ··· 337 333 338 334 int amdtee_map_shmem(struct tee_shm *shm) 339 335 { 340 - struct shmem_desc shmem; 336 + struct amdtee_context_data *ctxdata; 341 337 struct amdtee_shm_data *shmnode; 338 + struct shmem_desc shmem; 342 339 int rc, count; 343 340 u32 buf_id; 344 341 ··· 367 362 368 363 shmnode->kaddr = shm->kaddr; 369 364 shmnode->buf_id = buf_id; 370 - list_add(&shmnode->shm_node, &shmctx.shmdata_list); 365 + ctxdata = shm->ctx->data; 366 + mutex_lock(&ctxdata->shm_mutex); 367 + list_add(&shmnode->shm_node, &ctxdata->shm_list); 368 + mutex_unlock(&ctxdata->shm_mutex); 371 369 372 370 pr_debug("buf_id :[%x] kaddr[%p]\n", shmnode->buf_id, shmnode->kaddr); 373 371 ··· 379 371 380 372 void amdtee_unmap_shmem(struct tee_shm *shm) 381 373 { 374 + struct amdtee_context_data *ctxdata; 382 375 struct amdtee_shm_data *shmnode; 383 376 u32 buf_id; 384 377 ··· 390 381 /* Unmap the shared memory from TEE */ 391 382 handle_unmap_shmem(buf_id); 392 383 393 - list_for_each_entry(shmnode, &shmctx.shmdata_list, shm_node) 384 + ctxdata = shm->ctx->data; 385 + mutex_lock(&ctxdata->shm_mutex); 386 + list_for_each_entry(shmnode, &ctxdata->shm_list, shm_node) 394 387 if (buf_id == shmnode->buf_id) { 395 388 list_del(&shmnode->shm_node); 396 389 kfree(shmnode); 397 390 break; 398 391 } 392 + mutex_unlock(&ctxdata->shm_mutex); 399 393 } 400 394 401 395 int amdtee_invoke_func(struct tee_context *ctx,
+16 -2
drivers/thermal/ti-soc-thermal/ti-bandgap.c
··· 20 20 #include <linux/err.h> 21 21 #include <linux/types.h> 22 22 #include <linux/spinlock.h> 23 + #include <linux/sys_soc.h> 23 24 #include <linux/reboot.h> 24 25 #include <linux/of_device.h> 25 26 #include <linux/of_platform.h> ··· 865 864 return bgp; 866 865 } 867 866 867 + /* 868 + * List of SoCs on which the CPU PM notifier can cause erros on the DTEMP 869 + * readout. 870 + * Enabled notifier on these machines results in erroneous, random values which 871 + * could trigger unexpected thermal shutdown. 872 + */ 873 + static const struct soc_device_attribute soc_no_cpu_notifier[] = { 874 + { .machine = "OMAP4430" }, 875 + { /* sentinel */ }, 876 + }; 877 + 868 878 /*** Device driver call backs ***/ 869 879 870 880 static ··· 1032 1020 1033 1021 #ifdef CONFIG_PM_SLEEP 1034 1022 bgp->nb.notifier_call = bandgap_omap_cpu_notifier; 1035 - cpu_pm_register_notifier(&bgp->nb); 1023 + if (!soc_device_match(soc_no_cpu_notifier)) 1024 + cpu_pm_register_notifier(&bgp->nb); 1036 1025 #endif 1037 1026 1038 1027 return 0; ··· 1069 1056 struct ti_bandgap *bgp = platform_get_drvdata(pdev); 1070 1057 int i; 1071 1058 1072 - cpu_pm_unregister_notifier(&bgp->nb); 1059 + if (!soc_device_match(soc_no_cpu_notifier)) 1060 + cpu_pm_unregister_notifier(&bgp->nb); 1073 1061 1074 1062 /* Remove sensor interfaces */ 1075 1063 for (i = 0; i < bgp->conf->sensor_count; i++) {
+1
drivers/thunderbolt/debugfs.c
··· 9 9 10 10 #include <linux/debugfs.h> 11 11 #include <linux/pm_runtime.h> 12 + #include <linux/uaccess.h> 12 13 13 14 #include "tb.h" 14 15
+2
drivers/thunderbolt/icm.c
··· 2284 2284 2285 2285 case PCI_DEVICE_ID_INTEL_TGL_NHI0: 2286 2286 case PCI_DEVICE_ID_INTEL_TGL_NHI1: 2287 + case PCI_DEVICE_ID_INTEL_TGL_H_NHI0: 2288 + case PCI_DEVICE_ID_INTEL_TGL_H_NHI1: 2287 2289 icm->is_supported = icm_tgl_is_supported; 2288 2290 icm->driver_ready = icm_icl_driver_ready; 2289 2291 icm->set_uuid = icm_icl_set_uuid;
+19 -4
drivers/thunderbolt/nhi.c
··· 406 406 407 407 ring->vector = ret; 408 408 409 - ring->irq = pci_irq_vector(ring->nhi->pdev, ring->vector); 410 - if (ring->irq < 0) 411 - return ring->irq; 409 + ret = pci_irq_vector(ring->nhi->pdev, ring->vector); 410 + if (ret < 0) 411 + goto err_ida_remove; 412 + 413 + ring->irq = ret; 412 414 413 415 irqflags = no_suspend ? IRQF_NO_SUSPEND : 0; 414 - return request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring); 416 + ret = request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring); 417 + if (ret) 418 + goto err_ida_remove; 419 + 420 + return 0; 421 + 422 + err_ida_remove: 423 + ida_simple_remove(&nhi->msix_ida, ring->vector); 424 + 425 + return ret; 415 426 } 416 427 417 428 static void ring_release_msix(struct tb_ring *ring) ··· 1344 1333 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL_NHI0), 1345 1334 .driver_data = (kernel_ulong_t)&icl_nhi_ops }, 1346 1335 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL_NHI1), 1336 + .driver_data = (kernel_ulong_t)&icl_nhi_ops }, 1337 + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL_H_NHI0), 1338 + .driver_data = (kernel_ulong_t)&icl_nhi_ops }, 1339 + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL_H_NHI1), 1347 1340 .driver_data = (kernel_ulong_t)&icl_nhi_ops }, 1348 1341 1349 1342 /* Any USB4 compliant host */
+2
drivers/thunderbolt/nhi.h
··· 75 75 #define PCI_DEVICE_ID_INTEL_ICL_NHI0 0x8a17 76 76 #define PCI_DEVICE_ID_INTEL_TGL_NHI0 0x9a1b 77 77 #define PCI_DEVICE_ID_INTEL_TGL_NHI1 0x9a1d 78 + #define PCI_DEVICE_ID_INTEL_TGL_H_NHI0 0x9a1f 79 + #define PCI_DEVICE_ID_INTEL_TGL_H_NHI1 0x9a21 78 80 79 81 #define PCI_CLASS_SERIAL_USB_USB4 0x0c0340 80 82
+2
drivers/thunderbolt/tb.h
··· 784 784 switch (sw->config.device_id) { 785 785 case PCI_DEVICE_ID_INTEL_TGL_NHI0: 786 786 case PCI_DEVICE_ID_INTEL_TGL_NHI1: 787 + case PCI_DEVICE_ID_INTEL_TGL_H_NHI0: 788 + case PCI_DEVICE_ID_INTEL_TGL_H_NHI1: 787 789 return true; 788 790 } 789 791 }
+4
drivers/thunderbolt/usb4.c
··· 421 421 * upstream USB4 port. 422 422 */ 423 423 tb_switch_for_each_port(sw, port) { 424 + if (!tb_port_is_null(port)) 425 + continue; 424 426 if (!route && tb_is_upstream_port(port)) 427 + continue; 428 + if (!port->cap_usb4) 425 429 continue; 426 430 427 431 ret = tb_port_read(port, &val, TB_CFG_PORT,
+1
drivers/thunderbolt/xdomain.c
··· 881 881 882 882 id = ida_simple_get(&xd->service_ids, 0, 0, GFP_KERNEL); 883 883 if (id < 0) { 884 + kfree(svc->key); 884 885 kfree(svc); 885 886 break; 886 887 }
+6 -4
drivers/uio/uio.c
··· 413 413 return retval; 414 414 } 415 415 416 - static void uio_free_minor(struct uio_device *idev) 416 + static void uio_free_minor(unsigned long minor) 417 417 { 418 418 mutex_lock(&minor_lock); 419 - idr_remove(&uio_idr, idev->minor); 419 + idr_remove(&uio_idr, minor); 420 420 mutex_unlock(&minor_lock); 421 421 } 422 422 ··· 990 990 err_uio_dev_add_attributes: 991 991 device_del(&idev->dev); 992 992 err_device_create: 993 - uio_free_minor(idev); 993 + uio_free_minor(idev->minor); 994 994 put_device(&idev->dev); 995 995 return ret; 996 996 } ··· 1042 1042 void uio_unregister_device(struct uio_info *info) 1043 1043 { 1044 1044 struct uio_device *idev; 1045 + unsigned long minor; 1045 1046 1046 1047 if (!info || !info->uio_dev) 1047 1048 return; 1048 1049 1049 1050 idev = info->uio_dev; 1051 + minor = idev->minor; 1050 1052 1051 1053 mutex_lock(&idev->info_lock); 1052 1054 uio_dev_del_attributes(idev); ··· 1064 1062 1065 1063 device_unregister(&idev->dev); 1066 1064 1067 - uio_free_minor(idev); 1065 + uio_free_minor(minor); 1068 1066 1069 1067 return; 1070 1068 }
+9
drivers/usb/class/cdc-acm.c
··· 1693 1693 { USB_DEVICE(0x0870, 0x0001), /* Metricom GS Modem */ 1694 1694 .driver_info = NO_UNION_NORMAL, /* has no union descriptor */ 1695 1695 }, 1696 + { USB_DEVICE(0x045b, 0x023c), /* Renesas USB Download mode */ 1697 + .driver_info = DISABLE_ECHO, /* Don't echo banner */ 1698 + }, 1699 + { USB_DEVICE(0x045b, 0x0248), /* Renesas USB Download mode */ 1700 + .driver_info = DISABLE_ECHO, /* Don't echo banner */ 1701 + }, 1702 + { USB_DEVICE(0x045b, 0x024D), /* Renesas USB Download mode */ 1703 + .driver_info = DISABLE_ECHO, /* Don't echo banner */ 1704 + }, 1696 1705 { USB_DEVICE(0x0e8d, 0x0003), /* FIREFLY, MediaTek Inc; andrey.arapov@gmail.com */ 1697 1706 .driver_info = NO_UNION_NORMAL, /* has no union descriptor */ 1698 1707 },
+1 -1
drivers/usb/host/xhci-histb.c
··· 240 240 /* Initialize dma_mask and coherent_dma_mask to 32-bits */ 241 241 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); 242 242 if (ret) 243 - return ret; 243 + goto disable_pm; 244 244 245 245 hcd = usb_create_hcd(driver, dev, dev_name(dev)); 246 246 if (!hcd) {
+3 -1
drivers/usb/musb/musb_dsps.c
··· 429 429 struct platform_device *parent = to_platform_device(dev->parent); 430 430 const struct dsps_musb_wrapper *wrp = glue->wrp; 431 431 void __iomem *reg_base; 432 + struct resource *r; 432 433 u32 rev, val; 433 434 int ret; 434 435 435 - reg_base = devm_platform_ioremap_resource_byname(parent, "control"); 436 + r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 437 + reg_base = devm_ioremap_resource(dev, r); 436 438 if (IS_ERR(reg_base)) 437 439 return PTR_ERR(reg_base); 438 440 musb->ctrl_base = reg_base;
+9
drivers/usb/typec/ucsi/psy.c
··· 238 238 return; 239 239 240 240 power_supply_unregister(con->psy); 241 + con->psy = NULL; 242 + } 243 + 244 + void ucsi_port_psy_changed(struct ucsi_connector *con) 245 + { 246 + if (IS_ERR_OR_NULL(con->psy)) 247 + return; 248 + 249 + power_supply_changed(con->psy); 241 250 }
+6 -1
drivers/usb/typec/ucsi/ucsi.c
··· 643 643 role = !!(con->status.flags & UCSI_CONSTAT_PWR_DIR); 644 644 645 645 if (con->status.change & UCSI_CONSTAT_POWER_OPMODE_CHANGE || 646 - con->status.change & UCSI_CONSTAT_POWER_LEVEL_CHANGE) 646 + con->status.change & UCSI_CONSTAT_POWER_LEVEL_CHANGE) { 647 647 ucsi_pwr_opmode_change(con); 648 + ucsi_port_psy_changed(con); 649 + } 648 650 649 651 if (con->status.change & UCSI_CONSTAT_POWER_DIR_CHANGE) { 650 652 typec_set_pwr_role(con->port, role); ··· 676 674 ucsi_register_partner(con); 677 675 else 678 676 ucsi_unregister_partner(con); 677 + 678 + ucsi_port_psy_changed(con); 679 679 } 680 680 681 681 if (con->status.change & UCSI_CONSTAT_CAM_CHANGE) { ··· 998 994 !!(con->status.flags & UCSI_CONSTAT_PWR_DIR)); 999 995 ucsi_pwr_opmode_change(con); 1000 996 ucsi_register_partner(con); 997 + ucsi_port_psy_changed(con); 1001 998 } 1002 999 1003 1000 if (con->partner) {
+2
drivers/usb/typec/ucsi/ucsi.h
··· 340 340 #if IS_ENABLED(CONFIG_POWER_SUPPLY) 341 341 int ucsi_register_port_psy(struct ucsi_connector *con); 342 342 void ucsi_unregister_port_psy(struct ucsi_connector *con); 343 + void ucsi_port_psy_changed(struct ucsi_connector *con); 343 344 #else 344 345 static inline int ucsi_register_port_psy(struct ucsi_connector *con) { return 0; } 345 346 static inline void ucsi_unregister_port_psy(struct ucsi_connector *con) { } 347 + static inline void ucsi_port_psy_changed(struct ucsi_connector *con) { } 346 348 #endif /* CONFIG_POWER_SUPPLY */ 347 349 348 350 #if IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE)
+1
drivers/vdpa/Kconfig
··· 13 13 depends on RUNTIME_TESTING_MENU && HAS_DMA 14 14 select DMA_OPS 15 15 select VHOST_RING 16 + select GENERIC_NET_UTILS 16 17 default n 17 18 help 18 19 vDPA networking device simulator which loop TX traffic back
+280 -117
drivers/vhost/scsi.c
··· 52 52 #define VHOST_SCSI_VERSION "v0.1" 53 53 #define VHOST_SCSI_NAMELEN 256 54 54 #define VHOST_SCSI_MAX_CDB_SIZE 32 55 - #define VHOST_SCSI_DEFAULT_TAGS 256 56 55 #define VHOST_SCSI_PREALLOC_SGLS 2048 57 56 #define VHOST_SCSI_PREALLOC_UPAGES 2048 58 57 #define VHOST_SCSI_PREALLOC_PROT_SGLS 2048 ··· 139 140 struct se_portal_group se_tpg; 140 141 /* Pointer back to vhost_scsi, protected by tv_tpg_mutex */ 141 142 struct vhost_scsi *vhost_scsi; 143 + struct list_head tmf_queue; 142 144 }; 143 145 144 146 struct vhost_scsi_tport { ··· 189 189 * Writers must also take dev mutex and flush under it. 190 190 */ 191 191 int inflight_idx; 192 + struct vhost_scsi_cmd *scsi_cmds; 193 + struct sbitmap scsi_tags; 194 + int max_cmds; 192 195 }; 193 196 194 197 struct vhost_scsi { ··· 210 207 211 208 bool vs_events_missed; /* any missed events, protected by vq->mutex */ 212 209 int vs_events_nr; /* num of pending events, protected by vq->mutex */ 210 + }; 211 + 212 + struct vhost_scsi_tmf { 213 + struct vhost_work vwork; 214 + struct vhost_scsi_tpg *tpg; 215 + struct vhost_scsi *vhost; 216 + struct vhost_scsi_virtqueue *svq; 217 + struct list_head queue_entry; 218 + 219 + struct se_cmd se_cmd; 220 + struct vhost_scsi_inflight *inflight; 221 + struct iovec resp_iov; 222 + int in_iovs; 223 + int vq_desc; 213 224 }; 214 225 215 226 /* ··· 337 320 return 1; 338 321 } 339 322 340 - static void vhost_scsi_release_cmd(struct se_cmd *se_cmd) 323 + static void vhost_scsi_release_cmd_res(struct se_cmd *se_cmd) 341 324 { 342 325 struct vhost_scsi_cmd *tv_cmd = container_of(se_cmd, 343 326 struct vhost_scsi_cmd, tvc_se_cmd); 344 - struct se_session *se_sess = tv_cmd->tvc_nexus->tvn_se_sess; 327 + struct vhost_scsi_virtqueue *svq = container_of(tv_cmd->tvc_vq, 328 + struct vhost_scsi_virtqueue, vq); 329 + struct vhost_scsi_inflight *inflight = tv_cmd->inflight; 345 330 int i; 346 331 347 332 if (tv_cmd->tvc_sgl_count) { ··· 355 336 put_page(sg_page(&tv_cmd->tvc_prot_sgl[i])); 356 337 } 357 338 358 - vhost_scsi_put_inflight(tv_cmd->inflight); 359 - target_free_tag(se_sess, se_cmd); 339 + sbitmap_clear_bit(&svq->scsi_tags, se_cmd->map_tag); 340 + vhost_scsi_put_inflight(inflight); 341 + } 342 + 343 + static void vhost_scsi_release_tmf_res(struct vhost_scsi_tmf *tmf) 344 + { 345 + struct vhost_scsi_tpg *tpg = tmf->tpg; 346 + struct vhost_scsi_inflight *inflight = tmf->inflight; 347 + 348 + mutex_lock(&tpg->tv_tpg_mutex); 349 + list_add_tail(&tpg->tmf_queue, &tmf->queue_entry); 350 + mutex_unlock(&tpg->tv_tpg_mutex); 351 + vhost_scsi_put_inflight(inflight); 352 + } 353 + 354 + static void vhost_scsi_release_cmd(struct se_cmd *se_cmd) 355 + { 356 + if (se_cmd->se_cmd_flags & SCF_SCSI_TMR_CDB) { 357 + struct vhost_scsi_tmf *tmf = container_of(se_cmd, 358 + struct vhost_scsi_tmf, se_cmd); 359 + 360 + vhost_work_queue(&tmf->vhost->dev, &tmf->vwork); 361 + } else { 362 + struct vhost_scsi_cmd *cmd = container_of(se_cmd, 363 + struct vhost_scsi_cmd, tvc_se_cmd); 364 + struct vhost_scsi *vs = cmd->tvc_vhost; 365 + 366 + llist_add(&cmd->tvc_completion_list, &vs->vs_completion_list); 367 + vhost_work_queue(&vs->dev, &vs->vs_completion_work); 368 + } 360 369 } 361 370 362 371 static u32 vhost_scsi_sess_get_index(struct se_session *se_sess) ··· 409 362 return 0; 410 363 } 411 364 412 - static void vhost_scsi_complete_cmd(struct vhost_scsi_cmd *cmd) 413 - { 414 - struct vhost_scsi *vs = cmd->tvc_vhost; 415 - 416 - llist_add(&cmd->tvc_completion_list, &vs->vs_completion_list); 417 - 418 - vhost_work_queue(&vs->dev, &vs->vs_completion_work); 419 - } 420 - 421 365 static int vhost_scsi_queue_data_in(struct se_cmd *se_cmd) 422 366 { 423 - struct vhost_scsi_cmd *cmd = container_of(se_cmd, 424 - struct vhost_scsi_cmd, tvc_se_cmd); 425 - vhost_scsi_complete_cmd(cmd); 367 + transport_generic_free_cmd(se_cmd, 0); 426 368 return 0; 427 369 } 428 370 429 371 static int vhost_scsi_queue_status(struct se_cmd *se_cmd) 430 372 { 431 - struct vhost_scsi_cmd *cmd = container_of(se_cmd, 432 - struct vhost_scsi_cmd, tvc_se_cmd); 433 - vhost_scsi_complete_cmd(cmd); 373 + transport_generic_free_cmd(se_cmd, 0); 434 374 return 0; 435 375 } 436 376 437 377 static void vhost_scsi_queue_tm_rsp(struct se_cmd *se_cmd) 438 378 { 439 - return; 379 + struct vhost_scsi_tmf *tmf = container_of(se_cmd, struct vhost_scsi_tmf, 380 + se_cmd); 381 + 382 + transport_generic_free_cmd(&tmf->se_cmd, 0); 440 383 } 441 384 442 385 static void vhost_scsi_aborted_task(struct se_cmd *se_cmd) ··· 464 427 vs->vs_events_nr++; 465 428 466 429 return evt; 467 - } 468 - 469 - static void vhost_scsi_free_cmd(struct vhost_scsi_cmd *cmd) 470 - { 471 - struct se_cmd *se_cmd = &cmd->tvc_se_cmd; 472 - 473 - /* TODO locking against target/backend threads? */ 474 - transport_generic_free_cmd(se_cmd, 0); 475 - 476 430 } 477 431 478 432 static int vhost_scsi_check_stop_free(struct se_cmd *se_cmd) ··· 584 556 } else 585 557 pr_err("Faulted on virtio_scsi_cmd_resp\n"); 586 558 587 - vhost_scsi_free_cmd(cmd); 559 + vhost_scsi_release_cmd_res(se_cmd); 588 560 } 589 561 590 562 vq = -1; ··· 594 566 } 595 567 596 568 static struct vhost_scsi_cmd * 597 - vhost_scsi_get_tag(struct vhost_virtqueue *vq, struct vhost_scsi_tpg *tpg, 569 + vhost_scsi_get_cmd(struct vhost_virtqueue *vq, struct vhost_scsi_tpg *tpg, 598 570 unsigned char *cdb, u64 scsi_tag, u16 lun, u8 task_attr, 599 571 u32 exp_data_len, int data_direction) 600 572 { 573 + struct vhost_scsi_virtqueue *svq = container_of(vq, 574 + struct vhost_scsi_virtqueue, vq); 601 575 struct vhost_scsi_cmd *cmd; 602 576 struct vhost_scsi_nexus *tv_nexus; 603 - struct se_session *se_sess; 604 577 struct scatterlist *sg, *prot_sg; 605 578 struct page **pages; 606 - int tag, cpu; 579 + int tag; 607 580 608 581 tv_nexus = tpg->tpg_nexus; 609 582 if (!tv_nexus) { 610 583 pr_err("Unable to locate active struct vhost_scsi_nexus\n"); 611 584 return ERR_PTR(-EIO); 612 585 } 613 - se_sess = tv_nexus->tvn_se_sess; 614 586 615 - tag = sbitmap_queue_get(&se_sess->sess_tag_pool, &cpu); 587 + tag = sbitmap_get(&svq->scsi_tags, 0, false); 616 588 if (tag < 0) { 617 589 pr_err("Unable to obtain tag for vhost_scsi_cmd\n"); 618 590 return ERR_PTR(-ENOMEM); 619 591 } 620 592 621 - cmd = &((struct vhost_scsi_cmd *)se_sess->sess_cmd_map)[tag]; 593 + cmd = &svq->scsi_cmds[tag]; 622 594 sg = cmd->tvc_sgl; 623 595 prot_sg = cmd->tvc_prot_sgl; 624 596 pages = cmd->tvc_upages; ··· 627 599 cmd->tvc_prot_sgl = prot_sg; 628 600 cmd->tvc_upages = pages; 629 601 cmd->tvc_se_cmd.map_tag = tag; 630 - cmd->tvc_se_cmd.map_cpu = cpu; 631 602 cmd->tvc_tag = scsi_tag; 632 603 cmd->tvc_lun = lun; 633 604 cmd->tvc_task_attr = task_attr; ··· 934 907 return ret; 935 908 } 936 909 910 + static u16 vhost_buf_to_lun(u8 *lun_buf) 911 + { 912 + return ((lun_buf[2] << 8) | lun_buf[3]) & 0x3FFF; 913 + } 914 + 937 915 static void 938 916 vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq) 939 917 { ··· 1077 1045 tag = vhost64_to_cpu(vq, v_req_pi.tag); 1078 1046 task_attr = v_req_pi.task_attr; 1079 1047 cdb = &v_req_pi.cdb[0]; 1080 - lun = ((v_req_pi.lun[2] << 8) | v_req_pi.lun[3]) & 0x3FFF; 1048 + lun = vhost_buf_to_lun(v_req_pi.lun); 1081 1049 } else { 1082 1050 tag = vhost64_to_cpu(vq, v_req.tag); 1083 1051 task_attr = v_req.task_attr; 1084 1052 cdb = &v_req.cdb[0]; 1085 - lun = ((v_req.lun[2] << 8) | v_req.lun[3]) & 0x3FFF; 1053 + lun = vhost_buf_to_lun(v_req.lun); 1086 1054 } 1087 1055 /* 1088 1056 * Check that the received CDB size does not exceeded our ··· 1097 1065 scsi_command_size(cdb), VHOST_SCSI_MAX_CDB_SIZE); 1098 1066 goto err; 1099 1067 } 1100 - cmd = vhost_scsi_get_tag(vq, tpg, cdb, tag, lun, task_attr, 1068 + cmd = vhost_scsi_get_cmd(vq, tpg, cdb, tag, lun, task_attr, 1101 1069 exp_data_len + prot_bytes, 1102 1070 data_direction); 1103 1071 if (IS_ERR(cmd)) { 1104 - vq_err(vq, "vhost_scsi_get_tag failed %ld\n", 1072 + vq_err(vq, "vhost_scsi_get_cmd failed %ld\n", 1105 1073 PTR_ERR(cmd)); 1106 1074 goto err; 1107 1075 } ··· 1120 1088 &prot_iter, exp_data_len, 1121 1089 &data_iter))) { 1122 1090 vq_err(vq, "Failed to map iov to sgl\n"); 1123 - vhost_scsi_release_cmd(&cmd->tvc_se_cmd); 1091 + vhost_scsi_release_cmd_res(&cmd->tvc_se_cmd); 1124 1092 goto err; 1125 1093 } 1126 1094 } ··· 1156 1124 } 1157 1125 1158 1126 static void 1159 - vhost_scsi_send_tmf_reject(struct vhost_scsi *vs, 1160 - struct vhost_virtqueue *vq, 1161 - struct vhost_scsi_ctx *vc) 1127 + vhost_scsi_send_tmf_resp(struct vhost_scsi *vs, struct vhost_virtqueue *vq, 1128 + int in_iovs, int vq_desc, struct iovec *resp_iov, 1129 + int tmf_resp_code) 1162 1130 { 1163 1131 struct virtio_scsi_ctrl_tmf_resp rsp; 1164 1132 struct iov_iter iov_iter; ··· 1166 1134 1167 1135 pr_debug("%s\n", __func__); 1168 1136 memset(&rsp, 0, sizeof(rsp)); 1169 - rsp.response = VIRTIO_SCSI_S_FUNCTION_REJECTED; 1137 + rsp.response = tmf_resp_code; 1170 1138 1171 - iov_iter_init(&iov_iter, READ, &vq->iov[vc->out], vc->in, sizeof(rsp)); 1139 + iov_iter_init(&iov_iter, READ, resp_iov, in_iovs, sizeof(rsp)); 1172 1140 1173 1141 ret = copy_to_iter(&rsp, sizeof(rsp), &iov_iter); 1174 1142 if (likely(ret == sizeof(rsp))) 1175 - vhost_add_used_and_signal(&vs->dev, vq, vc->head, 0); 1143 + vhost_add_used_and_signal(&vs->dev, vq, vq_desc, 0); 1176 1144 else 1177 1145 pr_err("Faulted on virtio_scsi_ctrl_tmf_resp\n"); 1146 + } 1147 + 1148 + static void vhost_scsi_tmf_resp_work(struct vhost_work *work) 1149 + { 1150 + struct vhost_scsi_tmf *tmf = container_of(work, struct vhost_scsi_tmf, 1151 + vwork); 1152 + int resp_code; 1153 + 1154 + if (tmf->se_cmd.se_tmr_req->response == TMR_FUNCTION_COMPLETE) 1155 + resp_code = VIRTIO_SCSI_S_FUNCTION_SUCCEEDED; 1156 + else 1157 + resp_code = VIRTIO_SCSI_S_FUNCTION_REJECTED; 1158 + 1159 + vhost_scsi_send_tmf_resp(tmf->vhost, &tmf->svq->vq, tmf->in_iovs, 1160 + tmf->vq_desc, &tmf->resp_iov, resp_code); 1161 + vhost_scsi_release_tmf_res(tmf); 1162 + } 1163 + 1164 + static void 1165 + vhost_scsi_handle_tmf(struct vhost_scsi *vs, struct vhost_scsi_tpg *tpg, 1166 + struct vhost_virtqueue *vq, 1167 + struct virtio_scsi_ctrl_tmf_req *vtmf, 1168 + struct vhost_scsi_ctx *vc) 1169 + { 1170 + struct vhost_scsi_virtqueue *svq = container_of(vq, 1171 + struct vhost_scsi_virtqueue, vq); 1172 + struct vhost_scsi_tmf *tmf; 1173 + 1174 + if (vhost32_to_cpu(vq, vtmf->subtype) != 1175 + VIRTIO_SCSI_T_TMF_LOGICAL_UNIT_RESET) 1176 + goto send_reject; 1177 + 1178 + if (!tpg->tpg_nexus || !tpg->tpg_nexus->tvn_se_sess) { 1179 + pr_err("Unable to locate active struct vhost_scsi_nexus for LUN RESET.\n"); 1180 + goto send_reject; 1181 + } 1182 + 1183 + mutex_lock(&tpg->tv_tpg_mutex); 1184 + if (list_empty(&tpg->tmf_queue)) { 1185 + pr_err("Missing reserve TMF. Could not handle LUN RESET.\n"); 1186 + mutex_unlock(&tpg->tv_tpg_mutex); 1187 + goto send_reject; 1188 + } 1189 + 1190 + tmf = list_first_entry(&tpg->tmf_queue, struct vhost_scsi_tmf, 1191 + queue_entry); 1192 + list_del_init(&tmf->queue_entry); 1193 + mutex_unlock(&tpg->tv_tpg_mutex); 1194 + 1195 + tmf->tpg = tpg; 1196 + tmf->vhost = vs; 1197 + tmf->svq = svq; 1198 + tmf->resp_iov = vq->iov[vc->out]; 1199 + tmf->vq_desc = vc->head; 1200 + tmf->in_iovs = vc->in; 1201 + tmf->inflight = vhost_scsi_get_inflight(vq); 1202 + 1203 + if (target_submit_tmr(&tmf->se_cmd, tpg->tpg_nexus->tvn_se_sess, NULL, 1204 + vhost_buf_to_lun(vtmf->lun), NULL, 1205 + TMR_LUN_RESET, GFP_KERNEL, 0, 1206 + TARGET_SCF_ACK_KREF) < 0) { 1207 + vhost_scsi_release_tmf_res(tmf); 1208 + goto send_reject; 1209 + } 1210 + 1211 + return; 1212 + 1213 + send_reject: 1214 + vhost_scsi_send_tmf_resp(vs, vq, vc->in, vc->head, &vq->iov[vc->out], 1215 + VIRTIO_SCSI_S_FUNCTION_REJECTED); 1178 1216 } 1179 1217 1180 1218 static void ··· 1272 1170 static void 1273 1171 vhost_scsi_ctl_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq) 1274 1172 { 1173 + struct vhost_scsi_tpg *tpg; 1275 1174 union { 1276 1175 __virtio32 type; 1277 1176 struct virtio_scsi_ctrl_an_req an; ··· 1354 1251 vc.req += typ_size; 1355 1252 vc.req_size -= typ_size; 1356 1253 1357 - ret = vhost_scsi_get_req(vq, &vc, NULL); 1254 + ret = vhost_scsi_get_req(vq, &vc, &tpg); 1358 1255 if (ret) 1359 1256 goto err; 1360 1257 1361 1258 if (v_req.type == VIRTIO_SCSI_T_TMF) 1362 - vhost_scsi_send_tmf_reject(vs, vq, &vc); 1259 + vhost_scsi_handle_tmf(vs, tpg, vq, &v_req.tmf, &vc); 1363 1260 else 1364 1261 vhost_scsi_send_an_resp(vs, vq, &vc); 1365 1262 err: ··· 1476 1373 wait_for_completion(&old_inflight[i]->comp); 1477 1374 } 1478 1375 1376 + static void vhost_scsi_destroy_vq_cmds(struct vhost_virtqueue *vq) 1377 + { 1378 + struct vhost_scsi_virtqueue *svq = container_of(vq, 1379 + struct vhost_scsi_virtqueue, vq); 1380 + struct vhost_scsi_cmd *tv_cmd; 1381 + unsigned int i; 1382 + 1383 + if (!svq->scsi_cmds) 1384 + return; 1385 + 1386 + for (i = 0; i < svq->max_cmds; i++) { 1387 + tv_cmd = &svq->scsi_cmds[i]; 1388 + 1389 + kfree(tv_cmd->tvc_sgl); 1390 + kfree(tv_cmd->tvc_prot_sgl); 1391 + kfree(tv_cmd->tvc_upages); 1392 + } 1393 + 1394 + sbitmap_free(&svq->scsi_tags); 1395 + kfree(svq->scsi_cmds); 1396 + svq->scsi_cmds = NULL; 1397 + } 1398 + 1399 + static int vhost_scsi_setup_vq_cmds(struct vhost_virtqueue *vq, int max_cmds) 1400 + { 1401 + struct vhost_scsi_virtqueue *svq = container_of(vq, 1402 + struct vhost_scsi_virtqueue, vq); 1403 + struct vhost_scsi_cmd *tv_cmd; 1404 + unsigned int i; 1405 + 1406 + if (svq->scsi_cmds) 1407 + return 0; 1408 + 1409 + if (sbitmap_init_node(&svq->scsi_tags, max_cmds, -1, GFP_KERNEL, 1410 + NUMA_NO_NODE)) 1411 + return -ENOMEM; 1412 + svq->max_cmds = max_cmds; 1413 + 1414 + svq->scsi_cmds = kcalloc(max_cmds, sizeof(*tv_cmd), GFP_KERNEL); 1415 + if (!svq->scsi_cmds) { 1416 + sbitmap_free(&svq->scsi_tags); 1417 + return -ENOMEM; 1418 + } 1419 + 1420 + for (i = 0; i < max_cmds; i++) { 1421 + tv_cmd = &svq->scsi_cmds[i]; 1422 + 1423 + tv_cmd->tvc_sgl = kcalloc(VHOST_SCSI_PREALLOC_SGLS, 1424 + sizeof(struct scatterlist), 1425 + GFP_KERNEL); 1426 + if (!tv_cmd->tvc_sgl) { 1427 + pr_err("Unable to allocate tv_cmd->tvc_sgl\n"); 1428 + goto out; 1429 + } 1430 + 1431 + tv_cmd->tvc_upages = kcalloc(VHOST_SCSI_PREALLOC_UPAGES, 1432 + sizeof(struct page *), 1433 + GFP_KERNEL); 1434 + if (!tv_cmd->tvc_upages) { 1435 + pr_err("Unable to allocate tv_cmd->tvc_upages\n"); 1436 + goto out; 1437 + } 1438 + 1439 + tv_cmd->tvc_prot_sgl = kcalloc(VHOST_SCSI_PREALLOC_PROT_SGLS, 1440 + sizeof(struct scatterlist), 1441 + GFP_KERNEL); 1442 + if (!tv_cmd->tvc_prot_sgl) { 1443 + pr_err("Unable to allocate tv_cmd->tvc_prot_sgl\n"); 1444 + goto out; 1445 + } 1446 + } 1447 + return 0; 1448 + out: 1449 + vhost_scsi_destroy_vq_cmds(vq); 1450 + return -ENOMEM; 1451 + } 1452 + 1479 1453 /* 1480 1454 * Called from vhost_scsi_ioctl() context to walk the list of available 1481 1455 * vhost_scsi_tpg with an active struct vhost_scsi_nexus ··· 1607 1427 1608 1428 if (!strcmp(tv_tport->tport_name, t->vhost_wwpn)) { 1609 1429 if (vs->vs_tpg && vs->vs_tpg[tpg->tport_tpgt]) { 1610 - kfree(vs_tpg); 1611 1430 mutex_unlock(&tpg->tv_tpg_mutex); 1612 1431 ret = -EEXIST; 1613 - goto out; 1432 + goto undepend; 1614 1433 } 1615 1434 /* 1616 1435 * In order to ensure individual vhost-scsi configfs ··· 1621 1442 ret = target_depend_item(&se_tpg->tpg_group.cg_item); 1622 1443 if (ret) { 1623 1444 pr_warn("target_depend_item() failed: %d\n", ret); 1624 - kfree(vs_tpg); 1625 1445 mutex_unlock(&tpg->tv_tpg_mutex); 1626 - goto out; 1446 + goto undepend; 1627 1447 } 1628 1448 tpg->tv_tpg_vhost_count++; 1629 1449 tpg->vhost_scsi = vs; ··· 1635 1457 if (match) { 1636 1458 memcpy(vs->vs_vhost_wwpn, t->vhost_wwpn, 1637 1459 sizeof(vs->vs_vhost_wwpn)); 1460 + 1461 + for (i = VHOST_SCSI_VQ_IO; i < VHOST_SCSI_MAX_VQ; i++) { 1462 + vq = &vs->vqs[i].vq; 1463 + if (!vhost_vq_is_setup(vq)) 1464 + continue; 1465 + 1466 + if (vhost_scsi_setup_vq_cmds(vq, vq->num)) 1467 + goto destroy_vq_cmds; 1468 + } 1469 + 1638 1470 for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) { 1639 1471 vq = &vs->vqs[i].vq; 1640 1472 mutex_lock(&vq->mutex); ··· 1664 1476 vhost_scsi_flush(vs); 1665 1477 kfree(vs->vs_tpg); 1666 1478 vs->vs_tpg = vs_tpg; 1479 + goto out; 1667 1480 1481 + destroy_vq_cmds: 1482 + for (i--; i >= VHOST_SCSI_VQ_IO; i--) { 1483 + if (!vhost_vq_get_backend(&vs->vqs[i].vq)) 1484 + vhost_scsi_destroy_vq_cmds(&vs->vqs[i].vq); 1485 + } 1486 + undepend: 1487 + for (i = 0; i < VHOST_SCSI_MAX_TARGET; i++) { 1488 + tpg = vs_tpg[i]; 1489 + if (tpg) { 1490 + tpg->tv_tpg_vhost_count--; 1491 + target_undepend_item(&tpg->se_tpg.tpg_group.cg_item); 1492 + } 1493 + } 1494 + kfree(vs_tpg); 1668 1495 out: 1669 1496 mutex_unlock(&vs->dev.mutex); 1670 1497 mutex_unlock(&vhost_scsi_mutex); ··· 1752 1549 mutex_lock(&vq->mutex); 1753 1550 vhost_vq_set_backend(vq, NULL); 1754 1551 mutex_unlock(&vq->mutex); 1552 + /* 1553 + * Make sure cmds are not running before tearing them 1554 + * down. 1555 + */ 1556 + vhost_scsi_flush(vs); 1557 + vhost_scsi_destroy_vq_cmds(vq); 1755 1558 } 1756 1559 } 1757 1560 /* ··· 2020 1811 { 2021 1812 struct vhost_scsi_tpg *tpg = container_of(se_tpg, 2022 1813 struct vhost_scsi_tpg, se_tpg); 1814 + struct vhost_scsi_tmf *tmf; 1815 + 1816 + tmf = kzalloc(sizeof(*tmf), GFP_KERNEL); 1817 + if (!tmf) 1818 + return -ENOMEM; 1819 + INIT_LIST_HEAD(&tmf->queue_entry); 1820 + vhost_work_init(&tmf->vwork, vhost_scsi_tmf_resp_work); 2023 1821 2024 1822 mutex_lock(&vhost_scsi_mutex); 2025 1823 2026 1824 mutex_lock(&tpg->tv_tpg_mutex); 2027 1825 tpg->tv_tpg_port_count++; 1826 + list_add_tail(&tmf->queue_entry, &tpg->tmf_queue); 2028 1827 mutex_unlock(&tpg->tv_tpg_mutex); 2029 1828 2030 1829 vhost_scsi_hotplug(tpg, lun); ··· 2047 1830 { 2048 1831 struct vhost_scsi_tpg *tpg = container_of(se_tpg, 2049 1832 struct vhost_scsi_tpg, se_tpg); 1833 + struct vhost_scsi_tmf *tmf; 2050 1834 2051 1835 mutex_lock(&vhost_scsi_mutex); 2052 1836 2053 1837 mutex_lock(&tpg->tv_tpg_mutex); 2054 1838 tpg->tv_tpg_port_count--; 1839 + tmf = list_first_entry(&tpg->tmf_queue, struct vhost_scsi_tmf, 1840 + queue_entry); 1841 + list_del(&tmf->queue_entry); 1842 + kfree(tmf); 2055 1843 mutex_unlock(&tpg->tv_tpg_mutex); 2056 1844 2057 1845 vhost_scsi_hotunplug(tpg, lun); 2058 1846 2059 1847 mutex_unlock(&vhost_scsi_mutex); 2060 - } 2061 - 2062 - static void vhost_scsi_free_cmd_map_res(struct se_session *se_sess) 2063 - { 2064 - struct vhost_scsi_cmd *tv_cmd; 2065 - unsigned int i; 2066 - 2067 - if (!se_sess->sess_cmd_map) 2068 - return; 2069 - 2070 - for (i = 0; i < VHOST_SCSI_DEFAULT_TAGS; i++) { 2071 - tv_cmd = &((struct vhost_scsi_cmd *)se_sess->sess_cmd_map)[i]; 2072 - 2073 - kfree(tv_cmd->tvc_sgl); 2074 - kfree(tv_cmd->tvc_prot_sgl); 2075 - kfree(tv_cmd->tvc_upages); 2076 - } 2077 1848 } 2078 1849 2079 1850 static ssize_t vhost_scsi_tpg_attrib_fabric_prot_type_store( ··· 2103 1898 NULL, 2104 1899 }; 2105 1900 2106 - static int vhost_scsi_nexus_cb(struct se_portal_group *se_tpg, 2107 - struct se_session *se_sess, void *p) 2108 - { 2109 - struct vhost_scsi_cmd *tv_cmd; 2110 - unsigned int i; 2111 - 2112 - for (i = 0; i < VHOST_SCSI_DEFAULT_TAGS; i++) { 2113 - tv_cmd = &((struct vhost_scsi_cmd *)se_sess->sess_cmd_map)[i]; 2114 - 2115 - tv_cmd->tvc_sgl = kcalloc(VHOST_SCSI_PREALLOC_SGLS, 2116 - sizeof(struct scatterlist), 2117 - GFP_KERNEL); 2118 - if (!tv_cmd->tvc_sgl) { 2119 - pr_err("Unable to allocate tv_cmd->tvc_sgl\n"); 2120 - goto out; 2121 - } 2122 - 2123 - tv_cmd->tvc_upages = kcalloc(VHOST_SCSI_PREALLOC_UPAGES, 2124 - sizeof(struct page *), 2125 - GFP_KERNEL); 2126 - if (!tv_cmd->tvc_upages) { 2127 - pr_err("Unable to allocate tv_cmd->tvc_upages\n"); 2128 - goto out; 2129 - } 2130 - 2131 - tv_cmd->tvc_prot_sgl = kcalloc(VHOST_SCSI_PREALLOC_PROT_SGLS, 2132 - sizeof(struct scatterlist), 2133 - GFP_KERNEL); 2134 - if (!tv_cmd->tvc_prot_sgl) { 2135 - pr_err("Unable to allocate tv_cmd->tvc_prot_sgl\n"); 2136 - goto out; 2137 - } 2138 - } 2139 - return 0; 2140 - out: 2141 - vhost_scsi_free_cmd_map_res(se_sess); 2142 - return -ENOMEM; 2143 - } 2144 - 2145 1901 static int vhost_scsi_make_nexus(struct vhost_scsi_tpg *tpg, 2146 1902 const char *name) 2147 1903 { ··· 2126 1960 * struct se_node_acl for the vhost_scsi struct se_portal_group with 2127 1961 * the SCSI Initiator port name of the passed configfs group 'name'. 2128 1962 */ 2129 - tv_nexus->tvn_se_sess = target_setup_session(&tpg->se_tpg, 2130 - VHOST_SCSI_DEFAULT_TAGS, 2131 - sizeof(struct vhost_scsi_cmd), 1963 + tv_nexus->tvn_se_sess = target_setup_session(&tpg->se_tpg, 0, 0, 2132 1964 TARGET_PROT_DIN_PASS | TARGET_PROT_DOUT_PASS, 2133 - (unsigned char *)name, tv_nexus, 2134 - vhost_scsi_nexus_cb); 1965 + (unsigned char *)name, tv_nexus, NULL); 2135 1966 if (IS_ERR(tv_nexus->tvn_se_sess)) { 2136 1967 mutex_unlock(&tpg->tv_tpg_mutex); 2137 1968 kfree(tv_nexus); ··· 2178 2015 " %s Initiator Port: %s\n", vhost_scsi_dump_proto_id(tpg->tport), 2179 2016 tv_nexus->tvn_se_sess->se_node_acl->initiatorname); 2180 2017 2181 - vhost_scsi_free_cmd_map_res(se_sess); 2182 2018 /* 2183 2019 * Release the SCSI I_T Nexus to the emulated vhost Target Port 2184 2020 */ ··· 2317 2155 } 2318 2156 mutex_init(&tpg->tv_tpg_mutex); 2319 2157 INIT_LIST_HEAD(&tpg->tv_tpg_list); 2158 + INIT_LIST_HEAD(&tpg->tmf_queue); 2320 2159 tpg->tport = tport; 2321 2160 tpg->tport_tpgt = tpgt; 2322 2161
+6
drivers/vhost/vhost.c
··· 304 304 memset(&call_ctx->producer, 0x0, sizeof(struct irq_bypass_producer)); 305 305 } 306 306 307 + bool vhost_vq_is_setup(struct vhost_virtqueue *vq) 308 + { 309 + return vq->avail && vq->desc && vq->used && vhost_vq_access_ok(vq); 310 + } 311 + EXPORT_SYMBOL_GPL(vhost_vq_is_setup); 312 + 307 313 static void vhost_vq_reset(struct vhost_dev *dev, 308 314 struct vhost_virtqueue *vq) 309 315 {
+1
drivers/vhost/vhost.h
··· 190 190 struct vhost_log *log, unsigned int *log_num); 191 191 void vhost_discard_vq_desc(struct vhost_virtqueue *, int n); 192 192 193 + bool vhost_vq_is_setup(struct vhost_virtqueue *vq); 193 194 int vhost_vq_init_access(struct vhost_virtqueue *); 194 195 int vhost_add_used(struct vhost_virtqueue *, unsigned int head, int len); 195 196 int vhost_add_used_n(struct vhost_virtqueue *, struct vring_used_elem *heads,
+1
drivers/video/fbdev/hyperv_fb.c
··· 47 47 48 48 #include <linux/module.h> 49 49 #include <linux/kernel.h> 50 + #include <linux/vmalloc.h> 50 51 #include <linux/init.h> 51 52 #include <linux/completion.h> 52 53 #include <linux/fb.h>
+2 -4
drivers/virt/nitro_enclaves/ne_misc_dev.c
··· 1505 1505 1506 1506 poll_wait(file, &ne_enclave->eventq, wait); 1507 1507 1508 - if (!ne_enclave->has_event) 1509 - return mask; 1510 - 1511 - mask = POLLHUP; 1508 + if (ne_enclave->has_event) 1509 + mask |= EPOLLHUP; 1512 1510 1513 1511 return mask; 1514 1512 }
+4 -1
fs/afs/write.c
··· 169 169 unsigned int f, from = pos & (PAGE_SIZE - 1); 170 170 unsigned int t, to = from + copied; 171 171 loff_t i_size, maybe_i_size; 172 - int ret; 172 + int ret = 0; 173 173 174 174 _enter("{%llx:%llu},{%lx}", 175 175 vnode->fid.vid, vnode->fid.vnode, page->index); 176 + 177 + if (copied == 0) 178 + goto out; 176 179 177 180 maybe_i_size = pos + copied; 178 181
+1 -1
fs/aio.c
··· 1572 1572 * we return to userspace. 1573 1573 */ 1574 1574 if (S_ISREG(file_inode(file)->i_mode)) { 1575 - __sb_start_write(file_inode(file)->i_sb, SB_FREEZE_WRITE, true); 1575 + sb_start_write(file_inode(file)->i_sb); 1576 1576 __sb_writers_release(file_inode(file)->i_sb, SB_FREEZE_WRITE); 1577 1577 } 1578 1578 req->ki_flags |= IOCB_WRITE;
+1 -1
fs/crypto/inline_crypt.c
··· 74 74 int i; 75 75 76 76 /* The file must need contents encryption, not filenames encryption */ 77 - if (!fscrypt_needs_contents_encryption(inode)) 77 + if (!S_ISREG(inode->i_mode)) 78 78 return 0; 79 79 80 80 /* The crypto mode must have a blk-crypto counterpart */
+3 -3
fs/ext4/ext4.h
··· 1231 1231 blocks */ 1232 1232 #define EXT4_MOUNT2_HURD_COMPAT 0x00000004 /* Support HURD-castrated 1233 1233 file systems */ 1234 - #define EXT4_MOUNT2_DAX_NEVER 0x00000008 /* Do not allow Direct Access */ 1235 - #define EXT4_MOUNT2_DAX_INODE 0x00000010 /* For printing options only */ 1236 - 1237 1234 #define EXT4_MOUNT2_EXPLICIT_JOURNAL_CHECKSUM 0x00000008 /* User explicitly 1238 1235 specified journal checksum */ 1239 1236 1240 1237 #define EXT4_MOUNT2_JOURNAL_FAST_COMMIT 0x00000010 /* Journal fast commit */ 1238 + #define EXT4_MOUNT2_DAX_NEVER 0x00000020 /* Do not allow Direct Access */ 1239 + #define EXT4_MOUNT2_DAX_INODE 0x00000040 /* For printing options only */ 1240 + 1241 1241 1242 1242 #define clear_opt(sb, opt) EXT4_SB(sb)->s_mount_opt &= \ 1243 1243 ~EXT4_MOUNT_##opt
-11
fs/ext4/super.c
··· 289 289 if (!ext4_has_metadata_csum(sb)) 290 290 return; 291 291 292 - /* 293 - * Locking the superblock prevents the scenario 294 - * where: 295 - * 1) a first thread pauses during checksum calculation. 296 - * 2) a second thread updates the superblock, recalculates 297 - * the checksum, and updates s_checksum 298 - * 3) the first thread resumes and finishes its checksum calculation 299 - * and updates s_checksum with a potentially stale or torn value. 300 - */ 301 - lock_buffer(EXT4_SB(sb)->s_sbh); 302 292 es->s_checksum = ext4_superblock_csum(sb, es); 303 - unlock_buffer(EXT4_SB(sb)->s_sbh); 304 293 } 305 294 306 295 ext4_fsblk_t ext4_block_bitmap(struct super_block *sb,
+1 -1
fs/gfs2/aops.c
··· 77 77 if (error) 78 78 return error; 79 79 if (!buffer_mapped(bh_result)) 80 - return -EIO; 80 + return -ENODATA; 81 81 return 0; 82 82 } 83 83
+2 -6
fs/gfs2/bmap.c
··· 1301 1301 trace_gfs2_bmap(ip, bh_map, lblock, create, 1); 1302 1302 1303 1303 ret = gfs2_iomap_get(inode, pos, length, flags, &iomap, &mp); 1304 - if (!ret && iomap.type == IOMAP_HOLE) { 1305 - if (create) 1306 - ret = gfs2_iomap_alloc(inode, &iomap, &mp); 1307 - else 1308 - ret = -ENODATA; 1309 - } 1304 + if (create && !ret && iomap.type == IOMAP_HOLE) 1305 + ret = gfs2_iomap_alloc(inode, &iomap, &mp); 1310 1306 release_metapath(&mp); 1311 1307 if (ret) 1312 1308 goto out;
+12 -1
fs/gfs2/glops.c
··· 571 571 int error = 0; 572 572 struct gfs2_sbd *sdp = gl->gl_name.ln_sbd; 573 573 574 - if (gl->gl_req == LM_ST_EXCLUSIVE && !gfs2_withdrawn(sdp)) { 574 + /* 575 + * We need to check gl_state == LM_ST_SHARED here and not gl_req == 576 + * LM_ST_EXCLUSIVE. That's because when any node does a freeze, 577 + * all the nodes should have the freeze glock in SH mode and they all 578 + * call do_xmote: One for EX and the others for UN. They ALL must 579 + * freeze locally, and they ALL must queue freeze work. The freeze_work 580 + * calls freeze_func, which tries to reacquire the freeze glock in SH, 581 + * effectively waiting for the thaw on the node who holds it in EX. 582 + * Once thawed, the work func acquires the freeze glock in 583 + * SH and everybody goes back to thawed. 584 + */ 585 + if (gl->gl_state == LM_ST_SHARED && !gfs2_withdrawn(sdp)) { 575 586 atomic_set(&sdp->sd_freeze_state, SFS_STARTING_FREEZE); 576 587 error = freeze_super(sdp->sd_vfs); 577 588 if (error) {
+2
fs/gfs2/log.c
··· 132 132 spin_unlock(&sdp->sd_ail_lock); 133 133 ret = generic_writepages(mapping, wbc); 134 134 spin_lock(&sdp->sd_ail_lock); 135 + if (ret == -ENODATA) /* if a jdata write into a new hole */ 136 + ret = 0; /* ignore it */ 135 137 if (ret || wbc->nr_to_write <= 0) 136 138 break; 137 139 return -EBUSY;
+5 -5
fs/gfs2/rgrp.c
··· 2529 2529 2530 2530 rbm.rgd = rgd; 2531 2531 error = gfs2_rbm_from_block(&rbm, no_addr); 2532 - if (WARN_ON_ONCE(error)) 2533 - goto fail; 2534 - 2535 - if (gfs2_testbit(&rbm, false) != type) 2536 - error = -ESTALE; 2532 + if (!WARN_ON_ONCE(error)) { 2533 + if (gfs2_testbit(&rbm, false) != type) 2534 + error = -ESTALE; 2535 + } 2537 2536 2538 2537 gfs2_glock_dq_uninit(&rgd_gh); 2538 + 2539 2539 fail: 2540 2540 return error; 2541 2541 }
+2 -3
fs/io_uring.c
··· 3547 3547 * we return to userspace. 3548 3548 */ 3549 3549 if (req->flags & REQ_F_ISREG) { 3550 - __sb_start_write(file_inode(req->file)->i_sb, 3551 - SB_FREEZE_WRITE, true); 3550 + sb_start_write(file_inode(req->file)->i_sb); 3552 3551 __sb_writers_release(file_inode(req->file)->i_sb, 3553 3552 SB_FREEZE_WRITE); 3554 3553 } ··· 9225 9226 * to a power-of-two, if it isn't already. We do NOT impose 9226 9227 * any cq vs sq ring sizing. 9227 9228 */ 9229 + p->cq_entries = roundup_pow_of_two(p->cq_entries); 9228 9230 if (p->cq_entries < p->sq_entries) 9229 9231 return -EINVAL; 9230 9232 if (p->cq_entries > IORING_MAX_CQ_ENTRIES) { ··· 9233 9233 return -EINVAL; 9234 9234 p->cq_entries = IORING_MAX_CQ_ENTRIES; 9235 9235 } 9236 - p->cq_entries = roundup_pow_of_two(p->cq_entries); 9237 9236 } else { 9238 9237 p->cq_entries = 2 * p->sq_entries; 9239 9238 }
+1
fs/ocfs2/super.c
··· 1713 1713 1714 1714 oi->ip_blkno = 0ULL; 1715 1715 oi->ip_clusters = 0; 1716 + oi->ip_next_orphan = NULL; 1716 1717 1717 1718 ocfs2_resv_init_once(&oi->ip_la_data_resv); 1718 1719
-49
fs/super.c
··· 1631 1631 } 1632 1632 EXPORT_SYMBOL(super_setup_bdi); 1633 1633 1634 - /* 1635 - * This is an internal function, please use sb_end_{write,pagefault,intwrite} 1636 - * instead. 1637 - */ 1638 - void __sb_end_write(struct super_block *sb, int level) 1639 - { 1640 - percpu_up_read(sb->s_writers.rw_sem + level-1); 1641 - } 1642 - EXPORT_SYMBOL(__sb_end_write); 1643 - 1644 - /* 1645 - * This is an internal function, please use sb_start_{write,pagefault,intwrite} 1646 - * instead. 1647 - */ 1648 - int __sb_start_write(struct super_block *sb, int level, bool wait) 1649 - { 1650 - bool force_trylock = false; 1651 - int ret = 1; 1652 - 1653 - #ifdef CONFIG_LOCKDEP 1654 - /* 1655 - * We want lockdep to tell us about possible deadlocks with freezing 1656 - * but it's it bit tricky to properly instrument it. Getting a freeze 1657 - * protection works as getting a read lock but there are subtle 1658 - * problems. XFS for example gets freeze protection on internal level 1659 - * twice in some cases, which is OK only because we already hold a 1660 - * freeze protection also on higher level. Due to these cases we have 1661 - * to use wait == F (trylock mode) which must not fail. 1662 - */ 1663 - if (wait) { 1664 - int i; 1665 - 1666 - for (i = 0; i < level - 1; i++) 1667 - if (percpu_rwsem_is_held(sb->s_writers.rw_sem + i)) { 1668 - force_trylock = true; 1669 - break; 1670 - } 1671 - } 1672 - #endif 1673 - if (wait && !force_trylock) 1674 - percpu_down_read(sb->s_writers.rw_sem + level-1); 1675 - else 1676 - ret = percpu_down_read_trylock(sb->s_writers.rw_sem + level-1); 1677 - 1678 - WARN_ON(force_trylock && !ret); 1679 - return ret; 1680 - } 1681 - EXPORT_SYMBOL(__sb_start_write); 1682 - 1683 1634 /** 1684 1635 * sb_wait_write - wait until all writers to given file system finish 1685 1636 * @sb: the super for which we wait
+1 -1
fs/xfs/libxfs/xfs_rmap.c
··· 1514 1514 * record for our insertion point. This will also give us the record for 1515 1515 * start block contiguity tests. 1516 1516 */ 1517 - error = xfs_rmap_lookup_le_range(cur, bno, owner, offset, flags, 1517 + error = xfs_rmap_lookup_le_range(cur, bno, owner, offset, oldext, 1518 1518 &PREV, &i); 1519 1519 if (error) 1520 1520 goto done;
+8 -8
fs/xfs/libxfs/xfs_rmap_btree.c
··· 243 243 else if (y > x) 244 244 return -1; 245 245 246 - x = XFS_RMAP_OFF(be64_to_cpu(kp->rm_offset)); 247 - y = rec->rm_offset; 246 + x = be64_to_cpu(kp->rm_offset); 247 + y = xfs_rmap_irec_offset_pack(rec); 248 248 if (x > y) 249 249 return 1; 250 250 else if (y > x) ··· 275 275 else if (y > x) 276 276 return -1; 277 277 278 - x = XFS_RMAP_OFF(be64_to_cpu(kp1->rm_offset)); 279 - y = XFS_RMAP_OFF(be64_to_cpu(kp2->rm_offset)); 278 + x = be64_to_cpu(kp1->rm_offset); 279 + y = be64_to_cpu(kp2->rm_offset); 280 280 if (x > y) 281 281 return 1; 282 282 else if (y > x) ··· 390 390 return 1; 391 391 else if (a > b) 392 392 return 0; 393 - a = XFS_RMAP_OFF(be64_to_cpu(k1->rmap.rm_offset)); 394 - b = XFS_RMAP_OFF(be64_to_cpu(k2->rmap.rm_offset)); 393 + a = be64_to_cpu(k1->rmap.rm_offset); 394 + b = be64_to_cpu(k2->rmap.rm_offset); 395 395 if (a <= b) 396 396 return 1; 397 397 return 0; ··· 420 420 return 1; 421 421 else if (a > b) 422 422 return 0; 423 - a = XFS_RMAP_OFF(be64_to_cpu(r1->rmap.rm_offset)); 424 - b = XFS_RMAP_OFF(be64_to_cpu(r2->rmap.rm_offset)); 423 + a = be64_to_cpu(r1->rmap.rm_offset); 424 + b = be64_to_cpu(r2->rmap.rm_offset); 425 425 if (a <= b) 426 426 return 1; 427 427 return 0;
+2
fs/xfs/scrub/bmap.c
··· 113 113 114 114 if (info->whichfork == XFS_ATTR_FORK) 115 115 rflags |= XFS_RMAP_ATTR_FORK; 116 + if (irec->br_state == XFS_EXT_UNWRITTEN) 117 + rflags |= XFS_RMAP_UNWRITTEN; 116 118 117 119 /* 118 120 * CoW staging extents are owned (on disk) by the refcountbt, so
+3 -5
fs/xfs/scrub/refcount.c
··· 170 170 */ 171 171 INIT_LIST_HEAD(&worklist); 172 172 rbno = NULLAGBLOCK; 173 - nr = 1; 174 173 175 174 /* Make sure the fragments actually /are/ in agbno order. */ 176 175 bno = 0; ··· 183 184 * Find all the rmaps that start at or before the refc extent, 184 185 * and put them on the worklist. 185 186 */ 187 + nr = 0; 186 188 list_for_each_entry_safe(frag, n, &refchk->fragments, list) { 187 - if (frag->rm.rm_startblock > refchk->bno) 188 - goto done; 189 + if (frag->rm.rm_startblock > refchk->bno || nr > target_nr) 190 + break; 189 191 bno = frag->rm.rm_startblock + frag->rm.rm_blockcount; 190 192 if (bno < rbno) 191 193 rbno = bno; 192 194 list_move_tail(&frag->list, &worklist); 193 - if (nr == target_nr) 194 - break; 195 195 nr++; 196 196 } 197 197
+1 -1
fs/xfs/xfs_pnfs.c
··· 134 134 goto out_unlock; 135 135 error = invalidate_inode_pages2(inode->i_mapping); 136 136 if (WARN_ON_ONCE(error)) 137 - return error; 137 + goto out_unlock; 138 138 139 139 end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + length); 140 140 offset_fsb = XFS_B_TO_FSBT(mp, offset);
+1
include/asm-generic/barrier.h
··· 13 13 14 14 #ifndef __ASSEMBLY__ 15 15 16 + #include <linux/compiler.h> 16 17 #include <asm/rwonce.h> 17 18 18 19 #ifndef nop
+9 -9
include/asm-generic/percpu.h
··· 114 114 115 115 #define __this_cpu_generic_read_nopreempt(pcp) \ 116 116 ({ \ 117 - typeof(pcp) __ret; \ 117 + typeof(pcp) ___ret; \ 118 118 preempt_disable_notrace(); \ 119 - __ret = READ_ONCE(*raw_cpu_ptr(&(pcp))); \ 119 + ___ret = READ_ONCE(*raw_cpu_ptr(&(pcp))); \ 120 120 preempt_enable_notrace(); \ 121 - __ret; \ 121 + ___ret; \ 122 122 }) 123 123 124 124 #define __this_cpu_generic_read_noirq(pcp) \ 125 125 ({ \ 126 - typeof(pcp) __ret; \ 127 - unsigned long __flags; \ 128 - raw_local_irq_save(__flags); \ 129 - __ret = raw_cpu_generic_read(pcp); \ 130 - raw_local_irq_restore(__flags); \ 131 - __ret; \ 126 + typeof(pcp) ___ret; \ 127 + unsigned long ___flags; \ 128 + raw_local_irq_save(___flags); \ 129 + ___ret = raw_cpu_generic_read(pcp); \ 130 + raw_local_irq_restore(___flags); \ 131 + ___ret; \ 132 132 }) 133 133 134 134 #define this_cpu_generic_read(pcp) \
+1 -1
include/kunit/test.h
··· 1105 1105 KUNIT_ASSERTION(test, \ 1106 1106 strcmp(__left, __right) op 0, \ 1107 1107 kunit_binary_str_assert, \ 1108 - KUNIT_INIT_BINARY_ASSERT_STRUCT(test, \ 1108 + KUNIT_INIT_BINARY_STR_ASSERT_STRUCT(test, \ 1109 1109 assert_type, \ 1110 1110 #op, \ 1111 1111 #left, \
-6
include/linux/compiler-clang.h
··· 60 60 #define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1 61 61 #endif 62 62 63 - /* The following are for compatibility with GCC, from compiler-gcc.h, 64 - * and may be redefined here because they should not be shared with other 65 - * compilers, like ICC. 66 - */ 67 - #define barrier() __asm__ __volatile__("" : : : "memory") 68 - 69 63 #if __has_feature(shadow_call_stack) 70 64 # define __noscs __attribute__((__no_sanitize__("shadow-call-stack"))) 71 65 #endif
-19
include/linux/compiler-gcc.h
··· 15 15 # error Sorry, your version of GCC is too old - please use 4.9 or newer. 16 16 #endif 17 17 18 - /* Optimization barrier */ 19 - 20 - /* The "volatile" is due to gcc bugs */ 21 - #define barrier() __asm__ __volatile__("": : :"memory") 22 - /* 23 - * This version is i.e. to prevent dead stores elimination on @ptr 24 - * where gcc and llvm may behave differently when otherwise using 25 - * normal barrier(): while gcc behavior gets along with a normal 26 - * barrier(), llvm needs an explicit input variable to be assumed 27 - * clobbered. The issue is as follows: while the inline asm might 28 - * access any memory it wants, the compiler could have fit all of 29 - * @ptr into memory registers instead, and since @ptr never escaped 30 - * from that, it proved that the inline asm wasn't touching any of 31 - * it. This version works well with both compilers, i.e. we're telling 32 - * the compiler that the inline asm absolutely may see the contents 33 - * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 34 - */ 35 - #define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") 36 - 37 18 /* 38 19 * This macro obfuscates arithmetic on a variable address so that gcc 39 20 * shouldn't recognize the original var, and make assumptions about it.
+16 -2
include/linux/compiler.h
··· 80 80 81 81 /* Optimization barrier */ 82 82 #ifndef barrier 83 - # define barrier() __memory_barrier() 83 + /* The "volatile" is due to gcc bugs */ 84 + # define barrier() __asm__ __volatile__("": : :"memory") 84 85 #endif 85 86 86 87 #ifndef barrier_data 87 - # define barrier_data(ptr) barrier() 88 + /* 89 + * This version is i.e. to prevent dead stores elimination on @ptr 90 + * where gcc and llvm may behave differently when otherwise using 91 + * normal barrier(): while gcc behavior gets along with a normal 92 + * barrier(), llvm needs an explicit input variable to be assumed 93 + * clobbered. The issue is as follows: while the inline asm might 94 + * access any memory it wants, the compiler could have fit all of 95 + * @ptr into memory registers instead, and since @ptr never escaped 96 + * from that, it proved that the inline asm wasn't touching any of 97 + * it. This version works well with both compilers, i.e. we're telling 98 + * the compiler that the inline asm absolutely may see the contents 99 + * of @ptr. See also: https://llvm.org/bugs/show_bug.cgi?id=15495 100 + */ 101 + # define barrier_data(ptr) __asm__ __volatile__("": :"r"(ptr) :"memory") 88 102 #endif 89 103 90 104 /* workaround for GCC PR82365 if needed */
+27 -11
include/linux/fs.h
··· 1580 1580 * Snapshotting support. 1581 1581 */ 1582 1582 1583 - void __sb_end_write(struct super_block *sb, int level); 1584 - int __sb_start_write(struct super_block *sb, int level, bool wait); 1583 + /* 1584 + * These are internal functions, please use sb_start_{write,pagefault,intwrite} 1585 + * instead. 1586 + */ 1587 + static inline void __sb_end_write(struct super_block *sb, int level) 1588 + { 1589 + percpu_up_read(sb->s_writers.rw_sem + level-1); 1590 + } 1591 + 1592 + static inline void __sb_start_write(struct super_block *sb, int level) 1593 + { 1594 + percpu_down_read(sb->s_writers.rw_sem + level - 1); 1595 + } 1596 + 1597 + static inline bool __sb_start_write_trylock(struct super_block *sb, int level) 1598 + { 1599 + return percpu_down_read_trylock(sb->s_writers.rw_sem + level - 1); 1600 + } 1585 1601 1586 1602 #define __sb_writers_acquired(sb, lev) \ 1587 1603 percpu_rwsem_acquire(&(sb)->s_writers.rw_sem[(lev)-1], 1, _THIS_IP_) ··· 1661 1645 */ 1662 1646 static inline void sb_start_write(struct super_block *sb) 1663 1647 { 1664 - __sb_start_write(sb, SB_FREEZE_WRITE, true); 1648 + __sb_start_write(sb, SB_FREEZE_WRITE); 1665 1649 } 1666 1650 1667 - static inline int sb_start_write_trylock(struct super_block *sb) 1651 + static inline bool sb_start_write_trylock(struct super_block *sb) 1668 1652 { 1669 - return __sb_start_write(sb, SB_FREEZE_WRITE, false); 1653 + return __sb_start_write_trylock(sb, SB_FREEZE_WRITE); 1670 1654 } 1671 1655 1672 1656 /** ··· 1690 1674 */ 1691 1675 static inline void sb_start_pagefault(struct super_block *sb) 1692 1676 { 1693 - __sb_start_write(sb, SB_FREEZE_PAGEFAULT, true); 1677 + __sb_start_write(sb, SB_FREEZE_PAGEFAULT); 1694 1678 } 1695 1679 1696 1680 /* ··· 1708 1692 */ 1709 1693 static inline void sb_start_intwrite(struct super_block *sb) 1710 1694 { 1711 - __sb_start_write(sb, SB_FREEZE_FS, true); 1695 + __sb_start_write(sb, SB_FREEZE_FS); 1712 1696 } 1713 1697 1714 - static inline int sb_start_intwrite_trylock(struct super_block *sb) 1698 + static inline bool sb_start_intwrite_trylock(struct super_block *sb) 1715 1699 { 1716 - return __sb_start_write(sb, SB_FREEZE_FS, false); 1700 + return __sb_start_write_trylock(sb, SB_FREEZE_FS); 1717 1701 } 1718 1702 1719 1703 ··· 2772 2756 { 2773 2757 if (!S_ISREG(file_inode(file)->i_mode)) 2774 2758 return; 2775 - __sb_start_write(file_inode(file)->i_sb, SB_FREEZE_WRITE, true); 2759 + sb_start_write(file_inode(file)->i_sb); 2776 2760 } 2777 2761 2778 2762 static inline bool file_start_write_trylock(struct file *file) 2779 2763 { 2780 2764 if (!S_ISREG(file_inode(file)->i_mode)) 2781 2765 return true; 2782 - return __sb_start_write(file_inode(file)->i_sb, SB_FREEZE_WRITE, false); 2766 + return sb_start_write_trylock(file_inode(file)->i_sb); 2783 2767 } 2784 2768 2785 2769 static inline void file_end_write(struct file *file)
+1 -1
include/linux/genhd.h
··· 315 315 extern void disk_block_events(struct gendisk *disk); 316 316 extern void disk_unblock_events(struct gendisk *disk); 317 317 extern void disk_flush_events(struct gendisk *disk, unsigned int mask); 318 - void set_capacity_revalidate_and_notify(struct gendisk *disk, sector_t size, 318 + bool set_capacity_revalidate_and_notify(struct gendisk *disk, sector_t size, 319 319 bool update_bdev); 320 320 321 321 /* drivers/char/random.c */
+9 -2
include/linux/memcontrol.h
··· 900 900 static inline void memcg_memory_event(struct mem_cgroup *memcg, 901 901 enum memcg_memory_event event) 902 902 { 903 + bool swap_event = event == MEMCG_SWAP_HIGH || event == MEMCG_SWAP_MAX || 904 + event == MEMCG_SWAP_FAIL; 905 + 903 906 atomic_long_inc(&memcg->memory_events_local[event]); 904 - cgroup_file_notify(&memcg->events_local_file); 907 + if (!swap_event) 908 + cgroup_file_notify(&memcg->events_local_file); 905 909 906 910 do { 907 911 atomic_long_inc(&memcg->memory_events[event]); 908 - cgroup_file_notify(&memcg->events_file); 912 + if (swap_event) 913 + cgroup_file_notify(&memcg->swap_events_file); 914 + else 915 + cgroup_file_notify(&memcg->events_file); 909 916 910 917 if (!cgroup_subsys_on_dfl(memory_cgrp_subsys)) 911 918 break;
+5 -8
include/linux/perf_event.h
··· 1022 1022 struct perf_callchain_entry *callchain; 1023 1023 u64 aux_size; 1024 1024 1025 - /* 1026 - * regs_user may point to task_pt_regs or to regs_user_copy, depending 1027 - * on arch details. 1028 - */ 1029 1025 struct perf_regs regs_user; 1030 - struct pt_regs regs_user_copy; 1031 - 1032 1026 struct perf_regs regs_intr; 1033 1027 u64 stack_user_size; 1034 1028 ··· 1394 1400 extern void perf_event_addr_filters_sync(struct perf_event *event); 1395 1401 1396 1402 extern int perf_output_begin(struct perf_output_handle *handle, 1403 + struct perf_sample_data *data, 1397 1404 struct perf_event *event, unsigned int size); 1398 1405 extern int perf_output_begin_forward(struct perf_output_handle *handle, 1399 - struct perf_event *event, 1400 - unsigned int size); 1406 + struct perf_sample_data *data, 1407 + struct perf_event *event, 1408 + unsigned int size); 1401 1409 extern int perf_output_begin_backward(struct perf_output_handle *handle, 1410 + struct perf_sample_data *data, 1402 1411 struct perf_event *event, 1403 1412 unsigned int size); 1404 1413
+2 -4
include/linux/perf_regs.h
··· 20 20 int perf_reg_validate(u64 mask); 21 21 u64 perf_reg_abi(struct task_struct *task); 22 22 void perf_get_regs_user(struct perf_regs *regs_user, 23 - struct pt_regs *regs, 24 - struct pt_regs *regs_user_copy); 23 + struct pt_regs *regs); 25 24 #else 26 25 27 26 #define PERF_REG_EXTENDED_MASK 0 ··· 41 42 } 42 43 43 44 static inline void perf_get_regs_user(struct perf_regs *regs_user, 44 - struct pt_regs *regs, 45 - struct pt_regs *regs_user_copy) 45 + struct pt_regs *regs) 46 46 { 47 47 regs_user->regs = task_pt_regs(current); 48 48 regs_user->abi = perf_reg_abi(current);
+21
include/linux/pm_runtime.h
··· 387 387 } 388 388 389 389 /** 390 + * pm_runtime_resume_and_get - Bump up usage counter of a device and resume it. 391 + * @dev: Target device. 392 + * 393 + * Resume @dev synchronously and if that is successful, increment its runtime 394 + * PM usage counter. Return 0 if the runtime PM usage counter of @dev has been 395 + * incremented or a negative error code otherwise. 396 + */ 397 + static inline int pm_runtime_resume_and_get(struct device *dev) 398 + { 399 + int ret; 400 + 401 + ret = __pm_runtime_resume(dev, RPM_GET_PUT); 402 + if (ret < 0) { 403 + pm_runtime_put_noidle(dev); 404 + return ret; 405 + } 406 + 407 + return 0; 408 + } 409 + 410 + /** 390 411 * pm_runtime_put - Drop device usage counter and queue up "idle check" if 0. 391 412 * @dev: Target device. 392 413 *
+19
include/linux/spi/spi.h
··· 734 734 return __spi_alloc_controller(host, size, true); 735 735 } 736 736 737 + struct spi_controller *__devm_spi_alloc_controller(struct device *dev, 738 + unsigned int size, 739 + bool slave); 740 + 741 + static inline struct spi_controller *devm_spi_alloc_master(struct device *dev, 742 + unsigned int size) 743 + { 744 + return __devm_spi_alloc_controller(dev, size, false); 745 + } 746 + 747 + static inline struct spi_controller *devm_spi_alloc_slave(struct device *dev, 748 + unsigned int size) 749 + { 750 + if (!IS_ENABLED(CONFIG_SPI_SLAVE)) 751 + return NULL; 752 + 753 + return __devm_spi_alloc_controller(dev, size, true); 754 + } 755 + 737 756 extern int spi_register_controller(struct spi_controller *ctlr); 738 757 extern int devm_spi_register_controller(struct device *dev, 739 758 struct spi_controller *ctlr);
+1
include/linux/swiotlb.h
··· 5 5 #include <linux/dma-direction.h> 6 6 #include <linux/init.h> 7 7 #include <linux/types.h> 8 + #include <linux/limits.h> 8 9 9 10 struct device; 10 11 struct page;
+4 -3
include/net/ip_tunnels.h
··· 476 476 const void *from, int len, 477 477 __be16 flags) 478 478 { 479 - memcpy(ip_tunnel_info_opts(info), from, len); 480 479 info->options_len = len; 481 - info->key.tun_flags |= flags; 480 + if (len > 0) { 481 + memcpy(ip_tunnel_info_opts(info), from, len); 482 + info->key.tun_flags |= flags; 483 + } 482 484 } 483 485 484 486 static inline struct ip_tunnel_info *lwt_tun_info(struct lwtunnel_state *lwtstate) ··· 526 524 __be16 flags) 527 525 { 528 526 info->options_len = 0; 529 - info->key.tun_flags |= flags; 530 527 } 531 528 532 529 #endif /* CONFIG_INET */
+30
include/net/ipv6_frag.h
··· 108 108 rcu_read_unlock(); 109 109 inet_frag_put(&fq->q); 110 110 } 111 + 112 + /* Check if the upper layer header is truncated in the first fragment. */ 113 + static inline bool 114 + ipv6frag_thdr_truncated(struct sk_buff *skb, int start, u8 *nexthdrp) 115 + { 116 + u8 nexthdr = *nexthdrp; 117 + __be16 frag_off; 118 + int offset; 119 + 120 + offset = ipv6_skip_exthdr(skb, start, &nexthdr, &frag_off); 121 + if (offset < 0 || (frag_off & htons(IP6_OFFSET))) 122 + return false; 123 + switch (nexthdr) { 124 + case NEXTHDR_TCP: 125 + offset += sizeof(struct tcphdr); 126 + break; 127 + case NEXTHDR_UDP: 128 + offset += sizeof(struct udphdr); 129 + break; 130 + case NEXTHDR_ICMP: 131 + offset += sizeof(struct icmp6hdr); 132 + break; 133 + default: 134 + offset += 1; 135 + } 136 + if (offset > skb->len) 137 + return true; 138 + return false; 139 + } 140 + 111 141 #endif 112 142 #endif
+1
include/net/neighbour.h
··· 204 204 int (*pconstructor)(struct pneigh_entry *); 205 205 void (*pdestructor)(struct pneigh_entry *); 206 206 void (*proxy_redo)(struct sk_buff *skb); 207 + int (*is_multicast)(const void *pkey); 207 208 bool (*allow_add)(const struct net_device *dev, 208 209 struct netlink_ext_ack *extack); 209 210 char *id;
+15 -1
include/net/tls.h
··· 300 300 #define TLS_DEVICE_RESYNC_ASYNC_LOGMAX 13 301 301 struct tls_offload_resync_async { 302 302 atomic64_t req; 303 - u32 loglen; 303 + u16 loglen; 304 + u16 rcd_delta; 304 305 u32 log[TLS_DEVICE_RESYNC_ASYNC_LOGMAX]; 305 306 }; 306 307 ··· 472 471 return (i == -1); 473 472 } 474 473 474 + static inline void tls_bigint_subtract(unsigned char *seq, int n) 475 + { 476 + u64 rcd_sn; 477 + __be64 *p; 478 + 479 + BUILD_BUG_ON(TLS_MAX_REC_SEQ_SIZE != 8); 480 + 481 + p = (__be64 *)seq; 482 + rcd_sn = be64_to_cpu(*p); 483 + *p = cpu_to_be64(rcd_sn - n); 484 + } 485 + 475 486 static inline struct tls_context *tls_get_ctx(const struct sock *sk) 476 487 { 477 488 struct inet_connection_sock *icsk = inet_csk(sk); ··· 652 639 atomic64_set(&rx_ctx->resync_async->req, ((u64)ntohl(seq) << 32) | 653 640 ((u64)len << 16) | RESYNC_REQ | RESYNC_REQ_ASYNC); 654 641 rx_ctx->resync_async->loglen = 0; 642 + rx_ctx->resync_async->rcd_delta = 0; 655 643 } 656 644 657 645 static inline void
+2 -1
include/trace/events/sunrpc.h
··· 68 68 69 69 TP_fast_assign( 70 70 __entry->task_id = task->tk_pid; 71 - __entry->client_id = task->tk_client->cl_clid; 71 + __entry->client_id = task->tk_client ? 72 + task->tk_client->cl_clid : -1; 72 73 __entry->head_base = xdr->head[0].iov_base; 73 74 __entry->head_len = xdr->head[0].iov_len; 74 75 __entry->tail_base = xdr->tail[0].iov_base;
+54 -52
include/uapi/linux/gpio.h
··· 26 26 * struct gpiochip_info - Information about a certain GPIO chip 27 27 * @name: the Linux kernel name of this GPIO chip 28 28 * @label: a functional name for this GPIO chip, such as a product 29 - * number, may be empty 29 + * number, may be empty (i.e. label[0] == '\0') 30 30 * @lines: number of GPIO lines on this chip 31 31 */ 32 32 struct gpiochip_info { ··· 98 98 * identifying which field of the attribute union is in use. 99 99 * @GPIO_V2_LINE_ATTR_ID_FLAGS: flags field is in use 100 100 * @GPIO_V2_LINE_ATTR_ID_OUTPUT_VALUES: values field is in use 101 - * @GPIO_V2_LINE_ATTR_ID_DEBOUNCE: debounce_period_us is in use 101 + * @GPIO_V2_LINE_ATTR_ID_DEBOUNCE: debounce_period_us field is in use 102 102 */ 103 103 enum gpio_v2_line_attr_id { 104 104 GPIO_V2_LINE_ATTR_ID_FLAGS = 1, ··· 110 110 * struct gpio_v2_line_attribute - a configurable attribute of a line 111 111 * @id: attribute identifier with value from &enum gpio_v2_line_attr_id 112 112 * @padding: reserved for future use and must be zero filled 113 - * @flags: if id is GPIO_V2_LINE_ATTR_ID_FLAGS, the flags for the GPIO 114 - * line, with values from enum gpio_v2_line_flag, such as 115 - * GPIO_V2_LINE_FLAG_ACTIVE_LOW, GPIO_V2_LINE_FLAG_OUTPUT etc, OR:ed 113 + * @flags: if id is %GPIO_V2_LINE_ATTR_ID_FLAGS, the flags for the GPIO 114 + * line, with values from &enum gpio_v2_line_flag, such as 115 + * %GPIO_V2_LINE_FLAG_ACTIVE_LOW, %GPIO_V2_LINE_FLAG_OUTPUT etc, added 116 116 * together. This overrides the default flags contained in the &struct 117 117 * gpio_v2_line_config for the associated line. 118 - * @values: if id is GPIO_V2_LINE_ATTR_ID_OUTPUT_VALUES, a bitmap 118 + * @values: if id is %GPIO_V2_LINE_ATTR_ID_OUTPUT_VALUES, a bitmap 119 119 * containing the values to which the lines will be set, with each bit 120 120 * number corresponding to the index into &struct 121 121 * gpio_v2_line_request.offsets. 122 - * @debounce_period_us: if id is GPIO_V2_LINE_ATTR_ID_DEBOUNCE, the desired 123 - * debounce period, in microseconds 122 + * @debounce_period_us: if id is %GPIO_V2_LINE_ATTR_ID_DEBOUNCE, the 123 + * desired debounce period, in microseconds 124 124 */ 125 125 struct gpio_v2_line_attribute { 126 126 __u32 id; ··· 147 147 148 148 /** 149 149 * struct gpio_v2_line_config - Configuration for GPIO lines 150 - * @flags: flags for the GPIO lines, with values from enum 151 - * gpio_v2_line_flag, such as GPIO_V2_LINE_FLAG_ACTIVE_LOW, 152 - * GPIO_V2_LINE_FLAG_OUTPUT etc, OR:ed together. This is the default for 150 + * @flags: flags for the GPIO lines, with values from &enum 151 + * gpio_v2_line_flag, such as %GPIO_V2_LINE_FLAG_ACTIVE_LOW, 152 + * %GPIO_V2_LINE_FLAG_OUTPUT etc, added together. This is the default for 153 153 * all requested lines but may be overridden for particular lines using 154 - * attrs. 155 - * @num_attrs: the number of attributes in attrs 154 + * @attrs. 155 + * @num_attrs: the number of attributes in @attrs 156 156 * @padding: reserved for future use and must be zero filled 157 157 * @attrs: the configuration attributes associated with the requested 158 158 * lines. Any attribute should only be associated with a particular line ··· 175 175 * "my-bitbanged-relay" 176 176 * @config: requested configuration for the lines. 177 177 * @num_lines: number of lines requested in this request, i.e. the number 178 - * of valid fields in the GPIO_V2_LINES_MAX sized arrays, set to 1 to 178 + * of valid fields in the %GPIO_V2_LINES_MAX sized arrays, set to 1 to 179 179 * request a single line 180 180 * @event_buffer_size: a suggested minimum number of line events that the 181 181 * kernel should buffer. This is only relevant if edge detection is 182 182 * enabled in the configuration. Note that this is only a suggested value 183 183 * and the kernel may allocate a larger buffer or cap the size of the 184 184 * buffer. If this field is zero then the buffer size defaults to a minimum 185 - * of num_lines*16. 185 + * of @num_lines * 16. 186 186 * @padding: reserved for future use and must be zero filled 187 187 * @fd: if successful this field will contain a valid anonymous file handle 188 - * after a GPIO_GET_LINE_IOCTL operation, zero or negative value means 188 + * after a %GPIO_GET_LINE_IOCTL operation, zero or negative value means 189 189 * error 190 190 */ 191 191 struct gpio_v2_line_request { ··· 203 203 * struct gpio_v2_line_info - Information about a certain GPIO line 204 204 * @name: the name of this GPIO line, such as the output pin of the line on 205 205 * the chip, a rail or a pin header name on a board, as specified by the 206 - * GPIO chip, may be empty 206 + * GPIO chip, may be empty (i.e. name[0] == '\0') 207 207 * @consumer: a functional name for the consumer of this GPIO line as set 208 208 * by whatever is using it, will be empty if there is no current user but 209 209 * may also be empty if the consumer doesn't set this up 210 - * @flags: flags for the GPIO line, such as GPIO_V2_LINE_FLAG_ACTIVE_LOW, 211 - * GPIO_V2_LINE_FLAG_OUTPUT etc, OR:ed together 212 210 * @offset: the local offset on this GPIO chip, fill this in when 213 211 * requesting the line information from the kernel 214 - * @num_attrs: the number of attributes in attrs 212 + * @num_attrs: the number of attributes in @attrs 213 + * @flags: flags for the GPIO lines, with values from &enum 214 + * gpio_v2_line_flag, such as %GPIO_V2_LINE_FLAG_ACTIVE_LOW, 215 + * %GPIO_V2_LINE_FLAG_OUTPUT etc, added together. 215 216 * @attrs: the configuration attributes associated with the line 216 217 * @padding: reserved for future use 217 218 */ ··· 245 244 * of a GPIO line 246 245 * @info: updated line information 247 246 * @timestamp_ns: estimate of time of status change occurrence, in nanoseconds 248 - * @event_type: the type of change with a value from enum 247 + * @event_type: the type of change with a value from &enum 249 248 * gpio_v2_line_changed_type 250 249 * @padding: reserved for future use 251 250 */ ··· 270 269 /** 271 270 * struct gpio_v2_line_event - The actual event being pushed to userspace 272 271 * @timestamp_ns: best estimate of time of event occurrence, in nanoseconds. 273 - * The timestamp_ns is read from CLOCK_MONOTONIC and is intended to allow the 274 - * accurate measurement of the time between events. It does not provide 272 + * The @timestamp_ns is read from %CLOCK_MONOTONIC and is intended to allow 273 + * the accurate measurement of the time between events. It does not provide 275 274 * the wall-clock time. 276 - * @id: event identifier with value from enum gpio_v2_line_event_id 275 + * @id: event identifier with value from &enum gpio_v2_line_event_id 277 276 * @offset: the offset of the line that triggered the event 278 277 * @seqno: the sequence number for this event in the sequence of events for 279 278 * all the lines in this line request ··· 292 291 }; 293 292 294 293 /* 295 - * ABI v1 294 + * ABI v1 296 295 * 297 296 * This version of the ABI is deprecated. 298 297 * Use the latest version of the ABI, defined above, instead. ··· 315 314 * @flags: various flags for this line 316 315 * @name: the name of this GPIO line, such as the output pin of the line on the 317 316 * chip, a rail or a pin header name on a board, as specified by the gpio 318 - * chip, may be empty 317 + * chip, may be empty (i.e. name[0] == '\0') 319 318 * @consumer: a functional name for the consumer of this GPIO line as set by 320 319 * whatever is using it, will be empty if there is no current user but may 321 320 * also be empty if the consumer doesn't set this up 322 321 * 323 - * This struct is part of ABI v1 and is deprecated. 324 - * Use struct gpio_v2_line_info instead. 322 + * Note: This struct is part of ABI v1 and is deprecated. 323 + * Use &struct gpio_v2_line_info instead. 325 324 */ 326 325 struct gpioline_info { 327 326 __u32 line_offset; ··· 345 344 * of a GPIO line 346 345 * @info: updated line information 347 346 * @timestamp: estimate of time of status change occurrence, in nanoseconds 348 - * @event_type: one of GPIOLINE_CHANGED_REQUESTED, GPIOLINE_CHANGED_RELEASED 349 - * and GPIOLINE_CHANGED_CONFIG 347 + * @event_type: one of %GPIOLINE_CHANGED_REQUESTED, 348 + * %GPIOLINE_CHANGED_RELEASED and %GPIOLINE_CHANGED_CONFIG 349 + * @padding: reserved for future use 350 350 * 351 - * Note: struct gpioline_info embedded here has 32-bit alignment on its own, 351 + * The &struct gpioline_info embedded here has 32-bit alignment on its own, 352 352 * but it works fine with 64-bit alignment too. With its 72 byte size, we can 353 353 * guarantee there are no implicit holes between it and subsequent members. 354 354 * The 20-byte padding at the end makes sure we don't add any implicit padding 355 355 * at the end of the structure on 64-bit architectures. 356 356 * 357 - * This struct is part of ABI v1 and is deprecated. 358 - * Use struct gpio_v2_line_info_changed instead. 357 + * Note: This struct is part of ABI v1 and is deprecated. 358 + * Use &struct gpio_v2_line_info_changed instead. 359 359 */ 360 360 struct gpioline_info_changed { 361 361 struct gpioline_info info; ··· 380 378 * @lineoffsets: an array of desired lines, specified by offset index for the 381 379 * associated GPIO device 382 380 * @flags: desired flags for the desired GPIO lines, such as 383 - * GPIOHANDLE_REQUEST_OUTPUT, GPIOHANDLE_REQUEST_ACTIVE_LOW etc, OR:ed 381 + * %GPIOHANDLE_REQUEST_OUTPUT, %GPIOHANDLE_REQUEST_ACTIVE_LOW etc, added 384 382 * together. Note that even if multiple lines are requested, the same flags 385 383 * must be applicable to all of them, if you want lines with individual 386 384 * flags set, request them one by one. It is possible to select 387 385 * a batch of input or output lines, but they must all have the same 388 386 * characteristics, i.e. all inputs or all outputs, all active low etc 389 - * @default_values: if the GPIOHANDLE_REQUEST_OUTPUT is set for a requested 387 + * @default_values: if the %GPIOHANDLE_REQUEST_OUTPUT is set for a requested 390 388 * line, this specifies the default output value, should be 0 (low) or 391 389 * 1 (high), anything else than 0 or 1 will be interpreted as 1 (high) 392 390 * @consumer_label: a desired consumer label for the selected GPIO line(s) ··· 394 392 * @lines: number of lines requested in this request, i.e. the number of 395 393 * valid fields in the above arrays, set to 1 to request a single line 396 394 * @fd: if successful this field will contain a valid anonymous file handle 397 - * after a GPIO_GET_LINEHANDLE_IOCTL operation, zero or negative value 395 + * after a %GPIO_GET_LINEHANDLE_IOCTL operation, zero or negative value 398 396 * means error 399 397 * 400 - * This struct is part of ABI v1 and is deprecated. 401 - * Use struct gpio_v2_line_request instead. 398 + * Note: This struct is part of ABI v1 and is deprecated. 399 + * Use &struct gpio_v2_line_request instead. 402 400 */ 403 401 struct gpiohandle_request { 404 402 __u32 lineoffsets[GPIOHANDLES_MAX]; ··· 412 410 /** 413 411 * struct gpiohandle_config - Configuration for a GPIO handle request 414 412 * @flags: updated flags for the requested GPIO lines, such as 415 - * GPIOHANDLE_REQUEST_OUTPUT, GPIOHANDLE_REQUEST_ACTIVE_LOW etc, OR:ed 413 + * %GPIOHANDLE_REQUEST_OUTPUT, %GPIOHANDLE_REQUEST_ACTIVE_LOW etc, added 416 414 * together 417 - * @default_values: if the GPIOHANDLE_REQUEST_OUTPUT is set in flags, 415 + * @default_values: if the %GPIOHANDLE_REQUEST_OUTPUT is set in flags, 418 416 * this specifies the default output value, should be 0 (low) or 419 417 * 1 (high), anything else than 0 or 1 will be interpreted as 1 (high) 420 418 * @padding: reserved for future use and should be zero filled 421 419 * 422 - * This struct is part of ABI v1 and is deprecated. 423 - * Use struct gpio_v2_line_config instead. 420 + * Note: This struct is part of ABI v1 and is deprecated. 421 + * Use &struct gpio_v2_line_config instead. 424 422 */ 425 423 struct gpiohandle_config { 426 424 __u32 flags; ··· 434 432 * state of a line, when setting the state of lines these should contain 435 433 * the desired target state 436 434 * 437 - * This struct is part of ABI v1 and is deprecated. 438 - * Use struct gpio_v2_line_values instead. 435 + * Note: This struct is part of ABI v1 and is deprecated. 436 + * Use &struct gpio_v2_line_values instead. 439 437 */ 440 438 struct gpiohandle_data { 441 439 __u8 values[GPIOHANDLES_MAX]; ··· 451 449 * @lineoffset: the desired line to subscribe to events from, specified by 452 450 * offset index for the associated GPIO device 453 451 * @handleflags: desired handle flags for the desired GPIO line, such as 454 - * GPIOHANDLE_REQUEST_ACTIVE_LOW or GPIOHANDLE_REQUEST_OPEN_DRAIN 452 + * %GPIOHANDLE_REQUEST_ACTIVE_LOW or %GPIOHANDLE_REQUEST_OPEN_DRAIN 455 453 * @eventflags: desired flags for the desired GPIO event line, such as 456 - * GPIOEVENT_REQUEST_RISING_EDGE or GPIOEVENT_REQUEST_FALLING_EDGE 454 + * %GPIOEVENT_REQUEST_RISING_EDGE or %GPIOEVENT_REQUEST_FALLING_EDGE 457 455 * @consumer_label: a desired consumer label for the selected GPIO line(s) 458 456 * such as "my-listener" 459 457 * @fd: if successful this field will contain a valid anonymous file handle 460 - * after a GPIO_GET_LINEEVENT_IOCTL operation, zero or negative value 458 + * after a %GPIO_GET_LINEEVENT_IOCTL operation, zero or negative value 461 459 * means error 462 460 * 463 - * This struct is part of ABI v1 and is deprecated. 464 - * Use struct gpio_v2_line_request instead. 461 + * Note: This struct is part of ABI v1 and is deprecated. 462 + * Use &struct gpio_v2_line_request instead. 465 463 */ 466 464 struct gpioevent_request { 467 465 __u32 lineoffset; ··· 471 469 int fd; 472 470 }; 473 471 474 - /** 472 + /* 475 473 * GPIO event types 476 474 */ 477 475 #define GPIOEVENT_EVENT_RISING_EDGE 0x01 ··· 482 480 * @timestamp: best estimate of time of event occurrence, in nanoseconds 483 481 * @id: event identifier 484 482 * 485 - * This struct is part of ABI v1 and is deprecated. 486 - * Use struct gpio_v2_line_event instead. 483 + * Note: This struct is part of ABI v1 and is deprecated. 484 + * Use &struct gpio_v2_line_event instead. 487 485 */ 488 486 struct gpioevent_data { 489 487 __u64 timestamp;
+12 -2
init/main.c
··· 269 269 u32 size, csum; 270 270 char *data; 271 271 u32 *hdr; 272 + int i; 272 273 273 274 if (!initrd_end) 274 275 return NULL; 275 276 276 277 data = (char *)initrd_end - BOOTCONFIG_MAGIC_LEN; 277 - if (memcmp(data, BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_LEN)) 278 - return NULL; 278 + /* 279 + * Since Grub may align the size of initrd to 4, we must 280 + * check the preceding 3 bytes as well. 281 + */ 282 + for (i = 0; i < 4; i++) { 283 + if (!memcmp(data, BOOTCONFIG_MAGIC, BOOTCONFIG_MAGIC_LEN)) 284 + goto found; 285 + data--; 286 + } 287 + return NULL; 279 288 289 + found: 280 290 hdr = (u32 *)(data - 8); 281 291 size = hdr[0]; 282 292 csum = hdr[1];
+15 -3
kernel/bpf/verifier.c
··· 7884 7884 struct tnum range = tnum_range(0, 1); 7885 7885 enum bpf_prog_type prog_type = resolve_prog_type(env->prog); 7886 7886 int err; 7887 + const bool is_subprog = env->cur_state->frame[0]->subprogno; 7887 7888 7888 7889 /* LSM and struct_ops func-ptr's return type could be "void" */ 7889 - if ((prog_type == BPF_PROG_TYPE_STRUCT_OPS || 7890 + if (!is_subprog && 7891 + (prog_type == BPF_PROG_TYPE_STRUCT_OPS || 7890 7892 prog_type == BPF_PROG_TYPE_LSM) && 7891 7893 !prog->aux->attach_func_proto->type) 7892 7894 return 0; ··· 7906 7904 if (is_pointer_value(env, BPF_REG_0)) { 7907 7905 verbose(env, "R0 leaks addr as return value\n"); 7908 7906 return -EACCES; 7907 + } 7908 + 7909 + reg = cur_regs(env) + BPF_REG_0; 7910 + if (is_subprog) { 7911 + if (reg->type != SCALAR_VALUE) { 7912 + verbose(env, "At subprogram exit the register R0 is not a scalar value (%s)\n", 7913 + reg_type_str[reg->type]); 7914 + return -EINVAL; 7915 + } 7916 + return 0; 7909 7917 } 7910 7918 7911 7919 switch (prog_type) { ··· 7971 7959 return 0; 7972 7960 } 7973 7961 7974 - reg = cur_regs(env) + BPF_REG_0; 7975 7962 if (reg->type != SCALAR_VALUE) { 7976 7963 verbose(env, "At program exit the register R0 is not a known value (%s)\n", 7977 7964 reg_type_str[reg->type]); ··· 9681 9670 struct bpf_insn *insn, 9682 9671 struct bpf_insn_aux_data *aux) 9683 9672 { 9684 - u32 datasec_id, type, id = insn->imm; 9685 9673 const struct btf_var_secinfo *vsi; 9686 9674 const struct btf_type *datasec; 9687 9675 const struct btf_type *t; 9688 9676 const char *sym_name; 9689 9677 bool percpu = false; 9678 + u32 type, id = insn->imm; 9679 + s32 datasec_id; 9690 9680 u64 addr; 9691 9681 int i; 9692 9682
+25 -32
kernel/events/core.c
··· 2312 2312 event_sched_out(event, cpuctx, ctx); 2313 2313 2314 2314 perf_pmu_enable(ctx->pmu); 2315 - 2316 - if (group_event->attr.exclusive) 2317 - cpuctx->exclusive = 0; 2318 2315 } 2319 2316 2320 2317 #define DETACH_GROUP 0x01UL ··· 2580 2583 2581 2584 pmu->start_txn(pmu, PERF_PMU_TXN_ADD); 2582 2585 2583 - if (event_sched_in(group_event, cpuctx, ctx)) { 2584 - pmu->cancel_txn(pmu); 2585 - perf_mux_hrtimer_restart(cpuctx); 2586 - return -EAGAIN; 2587 - } 2586 + if (event_sched_in(group_event, cpuctx, ctx)) 2587 + goto error; 2588 2588 2589 2589 /* 2590 2590 * Schedule in siblings as one group (if any): ··· 2610 2616 } 2611 2617 event_sched_out(group_event, cpuctx, ctx); 2612 2618 2619 + error: 2613 2620 pmu->cancel_txn(pmu); 2614 - 2615 - perf_mux_hrtimer_restart(cpuctx); 2616 - 2617 2621 return -EAGAIN; 2618 2622 } 2619 2623 ··· 2637 2645 * If this group is exclusive and there are already 2638 2646 * events on the CPU, it can't go on. 2639 2647 */ 2640 - if (event->attr.exclusive && cpuctx->active_oncpu) 2648 + if (event->attr.exclusive && !list_empty(get_event_list(event))) 2641 2649 return 0; 2642 2650 /* 2643 2651 * Otherwise, try to add it if all previous groups were able ··· 3671 3679 3672 3680 *can_add_hw = 0; 3673 3681 ctx->rotate_necessary = 1; 3682 + perf_mux_hrtimer_restart(cpuctx); 3674 3683 } 3675 3684 3676 3685 return 0; ··· 6367 6374 } 6368 6375 6369 6376 static void perf_sample_regs_user(struct perf_regs *regs_user, 6370 - struct pt_regs *regs, 6371 - struct pt_regs *regs_user_copy) 6377 + struct pt_regs *regs) 6372 6378 { 6373 6379 if (user_mode(regs)) { 6374 6380 regs_user->abi = perf_reg_abi(current); 6375 6381 regs_user->regs = regs; 6376 6382 } else if (!(current->flags & PF_KTHREAD)) { 6377 - perf_get_regs_user(regs_user, regs, regs_user_copy); 6383 + perf_get_regs_user(regs_user, regs); 6378 6384 } else { 6379 6385 regs_user->abi = PERF_SAMPLE_REGS_ABI_NONE; 6380 6386 regs_user->regs = NULL; ··· 7075 7083 } 7076 7084 7077 7085 if (sample_type & (PERF_SAMPLE_REGS_USER | PERF_SAMPLE_STACK_USER)) 7078 - perf_sample_regs_user(&data->regs_user, regs, 7079 - &data->regs_user_copy); 7086 + perf_sample_regs_user(&data->regs_user, regs); 7080 7087 7081 7088 if (sample_type & PERF_SAMPLE_REGS_USER) { 7082 7089 /* regs dump ABI info */ ··· 7177 7186 struct perf_sample_data *data, 7178 7187 struct pt_regs *regs, 7179 7188 int (*output_begin)(struct perf_output_handle *, 7189 + struct perf_sample_data *, 7180 7190 struct perf_event *, 7181 7191 unsigned int)) 7182 7192 { ··· 7190 7198 7191 7199 perf_prepare_sample(&header, data, event, regs); 7192 7200 7193 - err = output_begin(&handle, event, header.size); 7201 + err = output_begin(&handle, data, event, header.size); 7194 7202 if (err) 7195 7203 goto exit; 7196 7204 ··· 7256 7264 int ret; 7257 7265 7258 7266 perf_event_header__init_id(&read_event.header, &sample, event); 7259 - ret = perf_output_begin(&handle, event, read_event.header.size); 7267 + ret = perf_output_begin(&handle, &sample, event, read_event.header.size); 7260 7268 if (ret) 7261 7269 return; 7262 7270 ··· 7525 7533 7526 7534 perf_event_header__init_id(&task_event->event_id.header, &sample, event); 7527 7535 7528 - ret = perf_output_begin(&handle, event, 7536 + ret = perf_output_begin(&handle, &sample, event, 7529 7537 task_event->event_id.header.size); 7530 7538 if (ret) 7531 7539 goto out; ··· 7628 7636 return; 7629 7637 7630 7638 perf_event_header__init_id(&comm_event->event_id.header, &sample, event); 7631 - ret = perf_output_begin(&handle, event, 7639 + ret = perf_output_begin(&handle, &sample, event, 7632 7640 comm_event->event_id.header.size); 7633 7641 7634 7642 if (ret) ··· 7728 7736 7729 7737 perf_event_header__init_id(&namespaces_event->event_id.header, 7730 7738 &sample, event); 7731 - ret = perf_output_begin(&handle, event, 7739 + ret = perf_output_begin(&handle, &sample, event, 7732 7740 namespaces_event->event_id.header.size); 7733 7741 if (ret) 7734 7742 goto out; ··· 7855 7863 7856 7864 perf_event_header__init_id(&cgroup_event->event_id.header, 7857 7865 &sample, event); 7858 - ret = perf_output_begin(&handle, event, 7866 + ret = perf_output_begin(&handle, &sample, event, 7859 7867 cgroup_event->event_id.header.size); 7860 7868 if (ret) 7861 7869 goto out; ··· 7981 7989 } 7982 7990 7983 7991 perf_event_header__init_id(&mmap_event->event_id.header, &sample, event); 7984 - ret = perf_output_begin(&handle, event, 7992 + ret = perf_output_begin(&handle, &sample, event, 7985 7993 mmap_event->event_id.header.size); 7986 7994 if (ret) 7987 7995 goto out; ··· 8291 8299 int ret; 8292 8300 8293 8301 perf_event_header__init_id(&rec.header, &sample, event); 8294 - ret = perf_output_begin(&handle, event, rec.header.size); 8302 + ret = perf_output_begin(&handle, &sample, event, rec.header.size); 8295 8303 8296 8304 if (ret) 8297 8305 return; ··· 8325 8333 8326 8334 perf_event_header__init_id(&lost_samples_event.header, &sample, event); 8327 8335 8328 - ret = perf_output_begin(&handle, event, 8336 + ret = perf_output_begin(&handle, &sample, event, 8329 8337 lost_samples_event.header.size); 8330 8338 if (ret) 8331 8339 return; ··· 8380 8388 8381 8389 perf_event_header__init_id(&se->event_id.header, &sample, event); 8382 8390 8383 - ret = perf_output_begin(&handle, event, se->event_id.header.size); 8391 + ret = perf_output_begin(&handle, &sample, event, se->event_id.header.size); 8384 8392 if (ret) 8385 8393 return; 8386 8394 ··· 8455 8463 8456 8464 perf_event_header__init_id(&throttle_event.header, &sample, event); 8457 8465 8458 - ret = perf_output_begin(&handle, event, 8466 + ret = perf_output_begin(&handle, &sample, event, 8459 8467 throttle_event.header.size); 8460 8468 if (ret) 8461 8469 return; ··· 8498 8506 8499 8507 perf_event_header__init_id(&ksymbol_event->event_id.header, 8500 8508 &sample, event); 8501 - ret = perf_output_begin(&handle, event, 8509 + ret = perf_output_begin(&handle, &sample, event, 8502 8510 ksymbol_event->event_id.header.size); 8503 8511 if (ret) 8504 8512 return; ··· 8588 8596 8589 8597 perf_event_header__init_id(&bpf_event->event_id.header, 8590 8598 &sample, event); 8591 - ret = perf_output_begin(&handle, event, 8599 + ret = perf_output_begin(&handle, data, event, 8592 8600 bpf_event->event_id.header.size); 8593 8601 if (ret) 8594 8602 return; ··· 8697 8705 8698 8706 perf_event_header__init_id(&text_poke_event->event_id.header, &sample, event); 8699 8707 8700 - ret = perf_output_begin(&handle, event, text_poke_event->event_id.header.size); 8708 + ret = perf_output_begin(&handle, &sample, event, 8709 + text_poke_event->event_id.header.size); 8701 8710 if (ret) 8702 8711 return; 8703 8712 ··· 8779 8786 rec.tid = perf_event_tid(event, current); 8780 8787 8781 8788 perf_event_header__init_id(&rec.header, &sample, event); 8782 - ret = perf_output_begin(&handle, event, rec.header.size); 8789 + ret = perf_output_begin(&handle, &sample, event, rec.header.size); 8783 8790 8784 8791 if (ret) 8785 8792 return;
+5 -9
kernel/events/internal.h
··· 205 205 206 206 static inline int get_recursion_context(int *recursion) 207 207 { 208 - int rctx; 208 + unsigned int pc = preempt_count(); 209 + unsigned char rctx = 0; 209 210 210 - if (unlikely(in_nmi())) 211 - rctx = 3; 212 - else if (in_irq()) 213 - rctx = 2; 214 - else if (in_softirq()) 215 - rctx = 1; 216 - else 217 - rctx = 0; 211 + rctx += !!(pc & (NMI_MASK)); 212 + rctx += !!(pc & (NMI_MASK | HARDIRQ_MASK)); 213 + rctx += !!(pc & (NMI_MASK | HARDIRQ_MASK | SOFTIRQ_OFFSET)); 218 214 219 215 if (recursion[rctx]) 220 216 return -1;
+11 -9
kernel/events/ring_buffer.c
··· 147 147 148 148 static __always_inline int 149 149 __perf_output_begin(struct perf_output_handle *handle, 150 + struct perf_sample_data *data, 150 151 struct perf_event *event, unsigned int size, 151 152 bool backward) 152 153 { ··· 238 237 handle->size = (1UL << page_shift) - offset; 239 238 240 239 if (unlikely(have_lost)) { 241 - struct perf_sample_data sample_data; 242 - 243 240 lost_event.header.size = sizeof(lost_event); 244 241 lost_event.header.type = PERF_RECORD_LOST; 245 242 lost_event.header.misc = 0; 246 243 lost_event.id = event->id; 247 244 lost_event.lost = local_xchg(&rb->lost, 0); 248 245 249 - perf_event_header__init_id(&lost_event.header, 250 - &sample_data, event); 246 + /* XXX mostly redundant; @data is already fully initializes */ 247 + perf_event_header__init_id(&lost_event.header, data, event); 251 248 perf_output_put(handle, lost_event); 252 - perf_event__output_id_sample(event, handle, &sample_data); 249 + perf_event__output_id_sample(event, handle, data); 253 250 } 254 251 255 252 return 0; ··· 262 263 } 263 264 264 265 int perf_output_begin_forward(struct perf_output_handle *handle, 265 - struct perf_event *event, unsigned int size) 266 + struct perf_sample_data *data, 267 + struct perf_event *event, unsigned int size) 266 268 { 267 - return __perf_output_begin(handle, event, size, false); 269 + return __perf_output_begin(handle, data, event, size, false); 268 270 } 269 271 270 272 int perf_output_begin_backward(struct perf_output_handle *handle, 273 + struct perf_sample_data *data, 271 274 struct perf_event *event, unsigned int size) 272 275 { 273 - return __perf_output_begin(handle, event, size, true); 276 + return __perf_output_begin(handle, data, event, size, true); 274 277 } 275 278 276 279 int perf_output_begin(struct perf_output_handle *handle, 280 + struct perf_sample_data *data, 277 281 struct perf_event *event, unsigned int size) 278 282 { 279 283 280 - return __perf_output_begin(handle, event, size, 284 + return __perf_output_begin(handle, data, event, size, 281 285 unlikely(is_write_backward(event))); 282 286 } 283 287
+3 -2
kernel/fail_function.c
··· 253 253 254 254 if (copy_from_user(buf, buffer, count)) { 255 255 ret = -EFAULT; 256 - goto out; 256 + goto out_free; 257 257 } 258 258 buf[count] = '\0'; 259 259 sym = strstrip(buf); ··· 307 307 ret = count; 308 308 } 309 309 out: 310 - kfree(buf); 311 310 mutex_unlock(&fei_lock); 311 + out_free: 312 + kfree(buf); 312 313 return ret; 313 314 } 314 315
+3 -2
kernel/futex.c
··· 788 788 */ 789 789 if (pi_state->owner) { 790 790 struct task_struct *owner; 791 + unsigned long flags; 791 792 792 - raw_spin_lock_irq(&pi_state->pi_mutex.wait_lock); 793 + raw_spin_lock_irqsave(&pi_state->pi_mutex.wait_lock, flags); 793 794 owner = pi_state->owner; 794 795 if (owner) { 795 796 raw_spin_lock(&owner->pi_lock); ··· 798 797 raw_spin_unlock(&owner->pi_lock); 799 798 } 800 799 rt_mutex_proxy_unlock(&pi_state->pi_mutex, owner); 801 - raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock); 800 + raw_spin_unlock_irqrestore(&pi_state->pi_mutex.wait_lock, flags); 802 801 } 803 802 804 803 if (current->pi_state_cache) {
+9 -10
kernel/locking/lockdep.c
··· 2765 2765 * (Note that this has to be done separately, because the graph cannot 2766 2766 * detect such classes of deadlocks.) 2767 2767 * 2768 - * Returns: 0 on deadlock detected, 1 on OK, 2 on recursive read 2768 + * Returns: 0 on deadlock detected, 1 on OK, 2 if another lock with the same 2769 + * lock class is held but nest_lock is also held, i.e. we rely on the 2770 + * nest_lock to avoid the deadlock. 2769 2771 */ 2770 2772 static int 2771 2773 check_deadlock(struct task_struct *curr, struct held_lock *next) ··· 2790 2788 * lock class (i.e. read_lock(lock)+read_lock(lock)): 2791 2789 */ 2792 2790 if ((next->read == 2) && prev->read) 2793 - return 2; 2791 + continue; 2794 2792 2795 2793 /* 2796 2794 * We're holding the nest_lock, which serializes this lock's ··· 3595 3593 if (!ret) 3596 3594 return 0; 3597 3595 /* 3598 - * Mark recursive read, as we jump over it when 3599 - * building dependencies (just like we jump over 3600 - * trylock entries): 3601 - */ 3602 - if (ret == 2) 3603 - hlock->read = 2; 3604 - /* 3605 3596 * Add dependency only if this lock is not the head 3606 - * of the chain, and if it's not a secondary read-lock: 3597 + * of the chain, and if the new lock introduces no more 3598 + * lock dependency (because we already hold a lock with the 3599 + * same lock class) nor deadlock (because the nest_lock 3600 + * serializes nesting locks), see the comments for 3601 + * check_deadlock(). 3607 3602 */ 3608 3603 if (!chain_head && ret != 2) { 3609 3604 if (!check_prevs_add(curr, hlock))
+2 -1
kernel/panic.c
··· 605 605 panic("panic_on_warn set ...\n"); 606 606 } 607 607 608 - dump_stack(); 608 + if (!regs) 609 + dump_stack(); 609 610 610 611 print_irqtrace_events(current); 611 612
+1 -1
kernel/rcu/tree.c
··· 4077 4077 smp_mb(); /* Ensure RCU read-side usage follows above initialization. */ 4078 4078 } 4079 4079 4080 - #ifdef CONFIG_HOTPLUG_CPU 4081 4080 /* 4082 4081 * The outgoing function has no further need of RCU, so remove it from 4083 4082 * the rcu_node tree's ->qsmaskinitnext bit masks. ··· 4116 4117 rdp->cpu_started = false; 4117 4118 } 4118 4119 4120 + #ifdef CONFIG_HOTPLUG_CPU 4119 4121 /* 4120 4122 * The outgoing CPU has just passed through the dying-idle state, and we 4121 4123 * are being invoked from the CPU that was IPIed to continue the offline
+17 -5
kernel/rcu/tree_stall.h
··· 249 249 250 250 /* 251 251 * Scan the current list of tasks blocked within RCU read-side critical 252 - * sections, printing out the tid of each. 252 + * sections, printing out the tid of each of the first few of them. 253 253 */ 254 - static int rcu_print_task_stall(struct rcu_node *rnp) 254 + static int rcu_print_task_stall(struct rcu_node *rnp, unsigned long flags) 255 + __releases(rnp->lock) 255 256 { 257 + int i = 0; 256 258 int ndetected = 0; 257 259 struct rcu_stall_chk_rdr rscr; 258 260 struct task_struct *t; 261 + struct task_struct *ts[8]; 259 262 260 263 if (!rcu_preempt_blocked_readers_cgp(rnp)) 261 264 return 0; ··· 267 264 t = list_entry(rnp->gp_tasks->prev, 268 265 struct task_struct, rcu_node_entry); 269 266 list_for_each_entry_continue(t, &rnp->blkd_tasks, rcu_node_entry) { 267 + get_task_struct(t); 268 + ts[i++] = t; 269 + if (i >= ARRAY_SIZE(ts)) 270 + break; 271 + } 272 + raw_spin_unlock_irqrestore_rcu_node(rnp, flags); 273 + for (i--; i; i--) { 274 + t = ts[i]; 270 275 if (!try_invoke_on_locked_down_task(t, check_slow_task, &rscr)) 271 276 pr_cont(" P%d", t->pid); 272 277 else ··· 284 273 ".q"[rscr.rs.b.need_qs], 285 274 ".e"[rscr.rs.b.exp_hint], 286 275 ".l"[rscr.on_blkd_list]); 276 + put_task_struct(t); 287 277 ndetected++; 288 278 } 289 279 pr_cont("\n"); ··· 305 293 * Because preemptible RCU does not exist, we never have to check for 306 294 * tasks blocked within RCU read-side critical sections. 307 295 */ 308 - static int rcu_print_task_stall(struct rcu_node *rnp) 296 + static int rcu_print_task_stall(struct rcu_node *rnp, unsigned long flags) 309 297 { 298 + raw_spin_unlock_irqrestore_rcu_node(rnp, flags); 310 299 return 0; 311 300 } 312 301 #endif /* #else #ifdef CONFIG_PREEMPT_RCU */ ··· 485 472 pr_err("INFO: %s detected stalls on CPUs/tasks:\n", rcu_state.name); 486 473 rcu_for_each_leaf_node(rnp) { 487 474 raw_spin_lock_irqsave_rcu_node(rnp, flags); 488 - ndetected += rcu_print_task_stall(rnp); 489 475 if (rnp->qsmask != 0) { 490 476 for_each_leaf_node_possible_cpu(rnp, cpu) 491 477 if (rnp->qsmask & leaf_node_cpu_bit(rnp, cpu)) { ··· 492 480 ndetected++; 493 481 } 494 482 } 495 - raw_spin_unlock_irqrestore_rcu_node(rnp, flags); 483 + ndetected += rcu_print_task_stall(rnp, flags); // Releases rnp->lock. 496 484 } 497 485 498 486 for_each_possible_cpu(cpu)
+14 -14
kernel/reboot.c
··· 551 551 break; 552 552 553 553 case 's': 554 - { 555 - int rc; 556 - 557 - if (isdigit(*(str+1))) { 558 - rc = kstrtoint(str+1, 0, &reboot_cpu); 559 - if (rc) 560 - return rc; 561 - } else if (str[1] == 'm' && str[2] == 'p' && 562 - isdigit(*(str+3))) { 563 - rc = kstrtoint(str+3, 0, &reboot_cpu); 564 - if (rc) 565 - return rc; 566 - } else 554 + if (isdigit(*(str+1))) 555 + reboot_cpu = simple_strtoul(str+1, NULL, 0); 556 + else if (str[1] == 'm' && str[2] == 'p' && 557 + isdigit(*(str+3))) 558 + reboot_cpu = simple_strtoul(str+3, NULL, 0); 559 + else 567 560 *mode = REBOOT_SOFT; 561 + if (reboot_cpu >= num_possible_cpus()) { 562 + pr_err("Ignoring the CPU number in reboot= option. " 563 + "CPU %d exceeds possible cpu number %d\n", 564 + reboot_cpu, num_possible_cpus()); 565 + reboot_cpu = 0; 566 + break; 567 + } 568 568 break; 569 - } 569 + 570 570 case 'g': 571 571 *mode = REBOOT_GPIO; 572 572 break;
+6 -6
kernel/sched/debug.c
··· 251 251 unsigned long flags = *(unsigned long *)table->data; 252 252 size_t data_size = 0; 253 253 size_t len = 0; 254 - char *tmp; 254 + char *tmp, *buf; 255 255 int idx; 256 256 257 257 if (write) ··· 269 269 return 0; 270 270 } 271 271 272 - tmp = kcalloc(data_size + 1, sizeof(*tmp), GFP_KERNEL); 273 - if (!tmp) 272 + buf = kcalloc(data_size + 1, sizeof(*buf), GFP_KERNEL); 273 + if (!buf) 274 274 return -ENOMEM; 275 275 276 276 for_each_set_bit(idx, &flags, __SD_FLAG_CNT) { 277 277 char *name = sd_flag_debug[idx].name; 278 278 279 - len += snprintf(tmp + len, strlen(name) + 2, "%s ", name); 279 + len += snprintf(buf + len, strlen(name) + 2, "%s ", name); 280 280 } 281 281 282 - tmp += *ppos; 282 + tmp = buf + *ppos; 283 283 len -= *ppos; 284 284 285 285 if (len > *lenp) ··· 294 294 *lenp = len; 295 295 *ppos += len; 296 296 297 - kfree(tmp); 297 + kfree(buf); 298 298 299 299 return 0; 300 300 }
+45 -25
kernel/sched/fair.c
··· 6172 6172 static int 6173 6173 select_idle_capacity(struct task_struct *p, struct sched_domain *sd, int target) 6174 6174 { 6175 - unsigned long best_cap = 0; 6175 + unsigned long task_util, best_cap = 0; 6176 6176 int cpu, best_cpu = -1; 6177 6177 struct cpumask *cpus; 6178 6178 6179 - sync_entity_load_avg(&p->se); 6180 - 6181 6179 cpus = this_cpu_cpumask_var_ptr(select_idle_mask); 6182 6180 cpumask_and(cpus, sched_domain_span(sd), p->cpus_ptr); 6181 + 6182 + task_util = uclamp_task_util(p); 6183 6183 6184 6184 for_each_cpu_wrap(cpu, cpus, target) { 6185 6185 unsigned long cpu_cap = capacity_of(cpu); 6186 6186 6187 6187 if (!available_idle_cpu(cpu) && !sched_idle_cpu(cpu)) 6188 6188 continue; 6189 - if (task_fits_capacity(p, cpu_cap)) 6189 + if (fits_capacity(task_util, cpu_cap)) 6190 6190 return cpu; 6191 6191 6192 6192 if (cpu_cap > best_cap) { ··· 6198 6198 return best_cpu; 6199 6199 } 6200 6200 6201 + static inline bool asym_fits_capacity(int task_util, int cpu) 6202 + { 6203 + if (static_branch_unlikely(&sched_asym_cpucapacity)) 6204 + return fits_capacity(task_util, capacity_of(cpu)); 6205 + 6206 + return true; 6207 + } 6208 + 6201 6209 /* 6202 6210 * Try and locate an idle core/thread in the LLC cache domain. 6203 6211 */ 6204 6212 static int select_idle_sibling(struct task_struct *p, int prev, int target) 6205 6213 { 6206 6214 struct sched_domain *sd; 6215 + unsigned long task_util; 6207 6216 int i, recent_used_cpu; 6208 6217 6209 6218 /* 6210 - * For asymmetric CPU capacity systems, our domain of interest is 6211 - * sd_asym_cpucapacity rather than sd_llc. 6219 + * On asymmetric system, update task utilization because we will check 6220 + * that the task fits with cpu's capacity. 6212 6221 */ 6213 6222 if (static_branch_unlikely(&sched_asym_cpucapacity)) { 6214 - sd = rcu_dereference(per_cpu(sd_asym_cpucapacity, target)); 6215 - /* 6216 - * On an asymmetric CPU capacity system where an exclusive 6217 - * cpuset defines a symmetric island (i.e. one unique 6218 - * capacity_orig value through the cpuset), the key will be set 6219 - * but the CPUs within that cpuset will not have a domain with 6220 - * SD_ASYM_CPUCAPACITY. These should follow the usual symmetric 6221 - * capacity path. 6222 - */ 6223 - if (!sd) 6224 - goto symmetric; 6225 - 6226 - i = select_idle_capacity(p, sd, target); 6227 - return ((unsigned)i < nr_cpumask_bits) ? i : target; 6223 + sync_entity_load_avg(&p->se); 6224 + task_util = uclamp_task_util(p); 6228 6225 } 6229 6226 6230 - symmetric: 6231 - if (available_idle_cpu(target) || sched_idle_cpu(target)) 6227 + if ((available_idle_cpu(target) || sched_idle_cpu(target)) && 6228 + asym_fits_capacity(task_util, target)) 6232 6229 return target; 6233 6230 6234 6231 /* 6235 6232 * If the previous CPU is cache affine and idle, don't be stupid: 6236 6233 */ 6237 6234 if (prev != target && cpus_share_cache(prev, target) && 6238 - (available_idle_cpu(prev) || sched_idle_cpu(prev))) 6235 + (available_idle_cpu(prev) || sched_idle_cpu(prev)) && 6236 + asym_fits_capacity(task_util, prev)) 6239 6237 return prev; 6240 6238 6241 6239 /* ··· 6256 6258 recent_used_cpu != target && 6257 6259 cpus_share_cache(recent_used_cpu, target) && 6258 6260 (available_idle_cpu(recent_used_cpu) || sched_idle_cpu(recent_used_cpu)) && 6259 - cpumask_test_cpu(p->recent_used_cpu, p->cpus_ptr)) { 6261 + cpumask_test_cpu(p->recent_used_cpu, p->cpus_ptr) && 6262 + asym_fits_capacity(task_util, recent_used_cpu)) { 6260 6263 /* 6261 6264 * Replace recent_used_cpu with prev as it is a potential 6262 6265 * candidate for the next wake: 6263 6266 */ 6264 6267 p->recent_used_cpu = prev; 6265 6268 return recent_used_cpu; 6269 + } 6270 + 6271 + /* 6272 + * For asymmetric CPU capacity systems, our domain of interest is 6273 + * sd_asym_cpucapacity rather than sd_llc. 6274 + */ 6275 + if (static_branch_unlikely(&sched_asym_cpucapacity)) { 6276 + sd = rcu_dereference(per_cpu(sd_asym_cpucapacity, target)); 6277 + /* 6278 + * On an asymmetric CPU capacity system where an exclusive 6279 + * cpuset defines a symmetric island (i.e. one unique 6280 + * capacity_orig value through the cpuset), the key will be set 6281 + * but the CPUs within that cpuset will not have a domain with 6282 + * SD_ASYM_CPUCAPACITY. These should follow the usual symmetric 6283 + * capacity path. 6284 + */ 6285 + if (sd) { 6286 + i = select_idle_capacity(p, sd, target); 6287 + return ((unsigned)i < nr_cpumask_bits) ? i : target; 6288 + } 6266 6289 } 6267 6290 6268 6291 sd = rcu_dereference(per_cpu(sd_llc, target)); ··· 9050 9031 * emptying busiest. 9051 9032 */ 9052 9033 if (local->group_type == group_has_spare) { 9053 - if (busiest->group_type > group_fully_busy) { 9034 + if ((busiest->group_type > group_fully_busy) && 9035 + !(env->sd->flags & SD_SHARE_PKG_RESOURCES)) { 9054 9036 /* 9055 9037 * If busiest is overloaded, try to fill spare 9056 9038 * capacity. This might end up creating spare capacity
+11 -1
kernel/trace/bpf_trace.c
··· 184 184 { 185 185 int ret; 186 186 187 + /* 188 + * NB: We rely on strncpy_from_user() not copying junk past the NUL 189 + * terminator into `dst`. 190 + * 191 + * strncpy_from_user() does long-sized strides in the fast path. If the 192 + * strncpy does not mask out the bytes after the NUL in `unsafe_ptr`, 193 + * then there could be junk after the NUL in `dst`. If user takes `dst` 194 + * and keys a hash map with it, then semantically identical strings can 195 + * occupy multiple entries in the map. 196 + */ 187 197 ret = strncpy_from_user_nofault(dst, unsafe_ptr, size); 188 198 if (unlikely(ret < 0)) 189 199 memset(dst, 0, size); ··· 1229 1219 *btf = bpf_get_btf_vmlinux(); 1230 1220 1231 1221 if (IS_ERR_OR_NULL(*btf)) 1232 - return PTR_ERR(*btf); 1222 + return IS_ERR(*btf) ? PTR_ERR(*btf) : -EINVAL; 1233 1223 1234 1224 if (ptr->type_id > 0) 1235 1225 *btf_id = ptr->type_id;
+2 -2
kernel/watchdog.c
··· 44 44 int __read_mostly watchdog_thresh = 10; 45 45 static int __read_mostly nmi_watchdog_available; 46 46 47 - static struct cpumask watchdog_allowed_mask __read_mostly; 48 - 49 47 struct cpumask watchdog_cpumask __read_mostly; 50 48 unsigned long *watchdog_cpumask_bits = cpumask_bits(&watchdog_cpumask); 51 49 ··· 159 161 #ifdef CONFIG_SMP 160 162 int __read_mostly sysctl_softlockup_all_cpu_backtrace; 161 163 #endif 164 + 165 + static struct cpumask watchdog_allowed_mask __read_mostly; 162 166 163 167 /* Global variables, exported for sysctl */ 164 168 unsigned int __read_mostly softlockup_panic =
+17 -2
lib/strncpy_from_user.c
··· 35 35 goto byte_at_a_time; 36 36 37 37 while (max >= sizeof(unsigned long)) { 38 - unsigned long c, data; 38 + unsigned long c, data, mask; 39 39 40 40 /* Fall back to byte-at-a-time if we get a page fault */ 41 41 unsafe_get_user(c, (unsigned long __user *)(src+res), byte_at_a_time); 42 42 43 - *(unsigned long *)(dst+res) = c; 43 + /* 44 + * Note that we mask out the bytes following the NUL. This is 45 + * important to do because string oblivious code may read past 46 + * the NUL. For those routines, we don't want to give them 47 + * potentially random bytes after the NUL in `src`. 48 + * 49 + * One example of such code is BPF map keys. BPF treats map keys 50 + * as an opaque set of bytes. Without the post-NUL mask, any BPF 51 + * maps keyed by strings returned from strncpy_from_user() may 52 + * have multiple entries for semantically identical strings. 53 + */ 44 54 if (has_zero(c, &data, &constants)) { 45 55 data = prep_zero_mask(c, data, &constants); 46 56 data = create_zero_mask(data); 57 + mask = zero_bytemask(data); 58 + *(unsigned long *)(dst+res) = c & mask; 47 59 return res + find_zero(data); 48 60 } 61 + 62 + *(unsigned long *)(dst+res) = c; 63 + 49 64 res += sizeof(unsigned long); 50 65 max -= sizeof(unsigned long); 51 66 }
+8 -4
mm/compaction.c
··· 817 817 * delay for some time until fewer pages are isolated 818 818 */ 819 819 while (unlikely(too_many_isolated(pgdat))) { 820 + /* stop isolation if there are still pages not migrated */ 821 + if (cc->nr_migratepages) 822 + return 0; 823 + 820 824 /* async migration should just abort */ 821 825 if (cc->mode == MIGRATE_ASYNC) 822 826 return 0; ··· 1016 1012 1017 1013 isolate_success: 1018 1014 list_add(&page->lru, &cc->migratepages); 1019 - cc->nr_migratepages++; 1020 - nr_isolated++; 1015 + cc->nr_migratepages += compound_nr(page); 1016 + nr_isolated += compound_nr(page); 1021 1017 1022 1018 /* 1023 1019 * Avoid isolating too much unless this block is being ··· 1025 1021 * or a lock is contended. For contention, isolate quickly to 1026 1022 * potentially remove one source of contention. 1027 1023 */ 1028 - if (cc->nr_migratepages == COMPACT_CLUSTER_MAX && 1024 + if (cc->nr_migratepages >= COMPACT_CLUSTER_MAX && 1029 1025 !cc->rescan && !cc->contended) { 1030 1026 ++low_pfn; 1031 1027 break; ··· 1136 1132 if (!pfn) 1137 1133 break; 1138 1134 1139 - if (cc->nr_migratepages == COMPACT_CLUSTER_MAX) 1135 + if (cc->nr_migratepages >= COMPACT_CLUSTER_MAX) 1140 1136 break; 1141 1137 } 1142 1138
+10 -4
mm/gup.c
··· 1647 1647 /* 1648 1648 * drop the above get_user_pages reference. 1649 1649 */ 1650 - for (i = 0; i < nr_pages; i++) 1651 - put_page(pages[i]); 1650 + if (gup_flags & FOLL_PIN) 1651 + unpin_user_pages(pages, nr_pages); 1652 + else 1653 + for (i = 0; i < nr_pages; i++) 1654 + put_page(pages[i]); 1652 1655 1653 1656 if (migrate_pages(&cma_page_list, alloc_migration_target, NULL, 1654 1657 (unsigned long)&mtc, MIGRATE_SYNC, MR_CONTIG_RANGE)) { ··· 1731 1728 goto out; 1732 1729 1733 1730 if (check_dax_vmas(vmas_tmp, rc)) { 1734 - for (i = 0; i < rc; i++) 1735 - put_page(pages[i]); 1731 + if (gup_flags & FOLL_PIN) 1732 + unpin_user_pages(pages, rc); 1733 + else 1734 + for (i = 0; i < rc; i++) 1735 + put_page(pages[i]); 1736 1736 rc = -EOPNOTSUPP; 1737 1737 goto out; 1738 1738 }
+5 -85
mm/hugetlb.c
··· 1568 1568 } 1569 1569 1570 1570 /* 1571 - * Find address_space associated with hugetlbfs page. 1572 - * Upon entry page is locked and page 'was' mapped although mapped state 1573 - * could change. If necessary, use anon_vma to find vma and associated 1574 - * address space. The returned mapping may be stale, but it can not be 1575 - * invalid as page lock (which is held) is required to destroy mapping. 1576 - */ 1577 - static struct address_space *_get_hugetlb_page_mapping(struct page *hpage) 1578 - { 1579 - struct anon_vma *anon_vma; 1580 - pgoff_t pgoff_start, pgoff_end; 1581 - struct anon_vma_chain *avc; 1582 - struct address_space *mapping = page_mapping(hpage); 1583 - 1584 - /* Simple file based mapping */ 1585 - if (mapping) 1586 - return mapping; 1587 - 1588 - /* 1589 - * Even anonymous hugetlbfs mappings are associated with an 1590 - * underlying hugetlbfs file (see hugetlb_file_setup in mmap 1591 - * code). Find a vma associated with the anonymous vma, and 1592 - * use the file pointer to get address_space. 1593 - */ 1594 - anon_vma = page_lock_anon_vma_read(hpage); 1595 - if (!anon_vma) 1596 - return mapping; /* NULL */ 1597 - 1598 - /* Use first found vma */ 1599 - pgoff_start = page_to_pgoff(hpage); 1600 - pgoff_end = pgoff_start + pages_per_huge_page(page_hstate(hpage)) - 1; 1601 - anon_vma_interval_tree_foreach(avc, &anon_vma->rb_root, 1602 - pgoff_start, pgoff_end) { 1603 - struct vm_area_struct *vma = avc->vma; 1604 - 1605 - mapping = vma->vm_file->f_mapping; 1606 - break; 1607 - } 1608 - 1609 - anon_vma_unlock_read(anon_vma); 1610 - return mapping; 1611 - } 1612 - 1613 - /* 1614 1571 * Find and lock address space (mapping) in write mode. 1615 1572 * 1616 - * Upon entry, the page is locked which allows us to find the mapping 1617 - * even in the case of an anon page. However, locking order dictates 1618 - * the i_mmap_rwsem be acquired BEFORE the page lock. This is hugetlbfs 1619 - * specific. So, we first try to lock the sema while still holding the 1620 - * page lock. If this works, great! If not, then we need to drop the 1621 - * page lock and then acquire i_mmap_rwsem and reacquire page lock. Of 1622 - * course, need to revalidate state along the way. 1573 + * Upon entry, the page is locked which means that page_mapping() is 1574 + * stable. Due to locking order, we can only trylock_write. If we can 1575 + * not get the lock, simply return NULL to caller. 1623 1576 */ 1624 1577 struct address_space *hugetlb_page_mapping_lock_write(struct page *hpage) 1625 1578 { 1626 - struct address_space *mapping, *mapping2; 1579 + struct address_space *mapping = page_mapping(hpage); 1627 1580 1628 - mapping = _get_hugetlb_page_mapping(hpage); 1629 - retry: 1630 1581 if (!mapping) 1631 1582 return mapping; 1632 1583 1633 - /* 1634 - * If no contention, take lock and return 1635 - */ 1636 1584 if (i_mmap_trylock_write(mapping)) 1637 1585 return mapping; 1638 1586 1639 - /* 1640 - * Must drop page lock and wait on mapping sema. 1641 - * Note: Once page lock is dropped, mapping could become invalid. 1642 - * As a hack, increase map count until we lock page again. 1643 - */ 1644 - atomic_inc(&hpage->_mapcount); 1645 - unlock_page(hpage); 1646 - i_mmap_lock_write(mapping); 1647 - lock_page(hpage); 1648 - atomic_add_negative(-1, &hpage->_mapcount); 1649 - 1650 - /* verify page is still mapped */ 1651 - if (!page_mapped(hpage)) { 1652 - i_mmap_unlock_write(mapping); 1653 - return NULL; 1654 - } 1655 - 1656 - /* 1657 - * Get address space again and verify it is the same one 1658 - * we locked. If not, drop lock and retry. 1659 - */ 1660 - mapping2 = _get_hugetlb_page_mapping(hpage); 1661 - if (mapping2 != mapping) { 1662 - i_mmap_unlock_write(mapping); 1663 - mapping = mapping2; 1664 - goto retry; 1665 - } 1666 - 1667 - return mapping; 1587 + return NULL; 1668 1588 } 1669 1589 1670 1590 pgoff_t __basepage_index(struct page *page)
+17 -19
mm/memory-failure.c
··· 1057 1057 if (!PageHuge(hpage)) { 1058 1058 unmap_success = try_to_unmap(hpage, ttu); 1059 1059 } else { 1060 - /* 1061 - * For hugetlb pages, try_to_unmap could potentially call 1062 - * huge_pmd_unshare. Because of this, take semaphore in 1063 - * write mode here and set TTU_RMAP_LOCKED to indicate we 1064 - * have taken the lock at this higer level. 1065 - * 1066 - * Note that the call to hugetlb_page_mapping_lock_write 1067 - * is necessary even if mapping is already set. It handles 1068 - * ugliness of potentially having to drop page lock to obtain 1069 - * i_mmap_rwsem. 1070 - */ 1071 - mapping = hugetlb_page_mapping_lock_write(hpage); 1072 - 1073 - if (mapping) { 1074 - unmap_success = try_to_unmap(hpage, 1060 + if (!PageAnon(hpage)) { 1061 + /* 1062 + * For hugetlb pages in shared mappings, try_to_unmap 1063 + * could potentially call huge_pmd_unshare. Because of 1064 + * this, take semaphore in write mode here and set 1065 + * TTU_RMAP_LOCKED to indicate we have taken the lock 1066 + * at this higer level. 1067 + */ 1068 + mapping = hugetlb_page_mapping_lock_write(hpage); 1069 + if (mapping) { 1070 + unmap_success = try_to_unmap(hpage, 1075 1071 ttu|TTU_RMAP_LOCKED); 1076 - i_mmap_unlock_write(mapping); 1072 + i_mmap_unlock_write(mapping); 1073 + } else { 1074 + pr_info("Memory failure: %#lx: could not lock mapping for mapped huge page\n", pfn); 1075 + unmap_success = false; 1076 + } 1077 1077 } else { 1078 - pr_info("Memory failure: %#lx: could not find mapping for mapped huge page\n", 1079 - pfn); 1080 - unmap_success = false; 1078 + unmap_success = try_to_unmap(hpage, ttu); 1081 1079 } 1082 1080 } 1083 1081 if (!unmap_success)
+24 -20
mm/migrate.c
··· 1328 1328 goto put_anon; 1329 1329 1330 1330 if (page_mapped(hpage)) { 1331 - /* 1332 - * try_to_unmap could potentially call huge_pmd_unshare. 1333 - * Because of this, take semaphore in write mode here and 1334 - * set TTU_RMAP_LOCKED to let lower levels know we have 1335 - * taken the lock. 1336 - */ 1337 - mapping = hugetlb_page_mapping_lock_write(hpage); 1338 - if (unlikely(!mapping)) 1339 - goto unlock_put_anon; 1331 + bool mapping_locked = false; 1332 + enum ttu_flags ttu = TTU_MIGRATION|TTU_IGNORE_MLOCK| 1333 + TTU_IGNORE_ACCESS; 1340 1334 1341 - try_to_unmap(hpage, 1342 - TTU_MIGRATION|TTU_IGNORE_MLOCK|TTU_IGNORE_ACCESS| 1343 - TTU_RMAP_LOCKED); 1335 + if (!PageAnon(hpage)) { 1336 + /* 1337 + * In shared mappings, try_to_unmap could potentially 1338 + * call huge_pmd_unshare. Because of this, take 1339 + * semaphore in write mode here and set TTU_RMAP_LOCKED 1340 + * to let lower levels know we have taken the lock. 1341 + */ 1342 + mapping = hugetlb_page_mapping_lock_write(hpage); 1343 + if (unlikely(!mapping)) 1344 + goto unlock_put_anon; 1345 + 1346 + mapping_locked = true; 1347 + ttu |= TTU_RMAP_LOCKED; 1348 + } 1349 + 1350 + try_to_unmap(hpage, ttu); 1344 1351 page_was_mapped = 1; 1345 - /* 1346 - * Leave mapping locked until after subsequent call to 1347 - * remove_migration_ptes() 1348 - */ 1352 + 1353 + if (mapping_locked) 1354 + i_mmap_unlock_write(mapping); 1349 1355 } 1350 1356 1351 1357 if (!page_mapped(hpage)) 1352 1358 rc = move_to_new_page(new_hpage, hpage, mode); 1353 1359 1354 - if (page_was_mapped) { 1360 + if (page_was_mapped) 1355 1361 remove_migration_ptes(hpage, 1356 - rc == MIGRATEPAGE_SUCCESS ? new_hpage : hpage, true); 1357 - i_mmap_unlock_write(mapping); 1358 - } 1362 + rc == MIGRATEPAGE_SUCCESS ? new_hpage : hpage, false); 1359 1363 1360 1364 unlock_put_anon: 1361 1365 unlock_page(new_hpage);
+5
mm/page_alloc.c
··· 5103 5103 if (!page_ref_sub_and_test(page, nc->pagecnt_bias)) 5104 5104 goto refill; 5105 5105 5106 + if (unlikely(nc->pfmemalloc)) { 5107 + free_the_page(page, compound_order(page)); 5108 + goto refill; 5109 + } 5110 + 5106 5111 #if (PAGE_SIZE < PAGE_FRAG_CACHE_MAX_SIZE) 5107 5112 /* if size can vary use size else just use PAGE_SIZE */ 5108 5113 size = nc->size;
+4 -4
mm/percpu.c
··· 1315 1315 region_size = ALIGN(start_offset + map_size, lcm_align); 1316 1316 1317 1317 /* allocate chunk */ 1318 - alloc_size = sizeof(struct pcpu_chunk) + 1319 - BITS_TO_LONGS(region_size >> PAGE_SHIFT) * sizeof(unsigned long); 1318 + alloc_size = struct_size(chunk, populated, 1319 + BITS_TO_LONGS(region_size >> PAGE_SHIFT)); 1320 1320 chunk = memblock_alloc(alloc_size, SMP_CACHE_BYTES); 1321 1321 if (!chunk) 1322 1322 panic("%s: Failed to allocate %zu bytes\n", __func__, ··· 2521 2521 pcpu_unit_pages = ai->unit_size >> PAGE_SHIFT; 2522 2522 pcpu_unit_size = pcpu_unit_pages << PAGE_SHIFT; 2523 2523 pcpu_atom_size = ai->atom_size; 2524 - pcpu_chunk_struct_size = sizeof(struct pcpu_chunk) + 2525 - BITS_TO_LONGS(pcpu_unit_pages) * sizeof(unsigned long); 2524 + pcpu_chunk_struct_size = struct_size(chunk, populated, 2525 + BITS_TO_LONGS(pcpu_unit_pages)); 2526 2526 2527 2527 pcpu_stats_save_ai(ai); 2528 2528
+1 -4
mm/rmap.c
··· 1413 1413 /* 1414 1414 * If sharing is possible, start and end will be adjusted 1415 1415 * accordingly. 1416 - * 1417 - * If called for a huge page, caller must hold i_mmap_rwsem 1418 - * in write mode as it is possible to call huge_pmd_unshare. 1419 1416 */ 1420 1417 adjust_range_if_pmd_sharing_possible(vma, &range.start, 1421 1418 &range.end); ··· 1459 1462 subpage = page - page_to_pfn(page) + pte_pfn(*pvmw.pte); 1460 1463 address = pvmw.address; 1461 1464 1462 - if (PageHuge(page)) { 1465 + if (PageHuge(page) && !PageAnon(page)) { 1463 1466 /* 1464 1467 * To call huge_pmd_unshare, i_mmap_rwsem must be 1465 1468 * held in write mode. Caller needs to explicitly
+1 -1
mm/slub.c
··· 2852 2852 2853 2853 object = c->freelist; 2854 2854 page = c->page; 2855 - if (unlikely(!object || !node_match(page, node))) { 2855 + if (unlikely(!object || !page || !node_match(page, node))) { 2856 2856 object = __slab_alloc(s, gfpflags, node, addr, c); 2857 2857 } else { 2858 2858 void *next_object = get_freepointer_safe(s, object);
+3 -2
mm/vmscan.c
··· 1516 1516 nr_reclaimed = shrink_page_list(&clean_pages, zone->zone_pgdat, &sc, 1517 1517 TTU_IGNORE_ACCESS, &stat, true); 1518 1518 list_splice(&clean_pages, page_list); 1519 - mod_node_page_state(zone->zone_pgdat, NR_ISOLATED_FILE, -nr_reclaimed); 1519 + mod_node_page_state(zone->zone_pgdat, NR_ISOLATED_FILE, 1520 + -(long)nr_reclaimed); 1520 1521 /* 1521 1522 * Since lazyfree pages are isolated from file LRU from the beginning, 1522 1523 * they will rotate back to anonymous LRU in the end if it failed to ··· 1527 1526 mod_node_page_state(zone->zone_pgdat, NR_ISOLATED_ANON, 1528 1527 stat.nr_lazyfree_fail); 1529 1528 mod_node_page_state(zone->zone_pgdat, NR_ISOLATED_FILE, 1530 - -stat.nr_lazyfree_fail); 1529 + -(long)stat.nr_lazyfree_fail); 1531 1530 return nr_reclaimed; 1532 1531 } 1533 1532
+1
net/bridge/br_device.c
··· 207 207 { 208 208 struct net_bridge *br = netdev_priv(dev); 209 209 210 + netdev_stats_to_stats64(stats, &dev->stats); 210 211 dev_fetch_sw_netstats(stats, br->stats); 211 212 } 212 213
+28 -10
net/can/af_can.c
··· 677 677 { 678 678 struct canfd_frame *cfd = (struct canfd_frame *)skb->data; 679 679 680 - if (unlikely(dev->type != ARPHRD_CAN || skb->len != CAN_MTU || 681 - cfd->len > CAN_MAX_DLEN)) { 682 - pr_warn_once("PF_CAN: dropped non conform CAN skbuf: dev type %d, len %d, datalen %d\n", 680 + if (unlikely(dev->type != ARPHRD_CAN || skb->len != CAN_MTU)) { 681 + pr_warn_once("PF_CAN: dropped non conform CAN skbuff: dev type %d, len %d\n", 682 + dev->type, skb->len); 683 + goto free_skb; 684 + } 685 + 686 + /* This check is made separately since cfd->len would be uninitialized if skb->len = 0. */ 687 + if (unlikely(cfd->len > CAN_MAX_DLEN)) { 688 + pr_warn_once("PF_CAN: dropped non conform CAN skbuff: dev type %d, len %d, datalen %d\n", 683 689 dev->type, skb->len, cfd->len); 684 - kfree_skb(skb); 685 - return NET_RX_DROP; 690 + goto free_skb; 686 691 } 687 692 688 693 can_receive(skb, dev); 689 694 return NET_RX_SUCCESS; 695 + 696 + free_skb: 697 + kfree_skb(skb); 698 + return NET_RX_DROP; 690 699 } 691 700 692 701 static int canfd_rcv(struct sk_buff *skb, struct net_device *dev, ··· 703 694 { 704 695 struct canfd_frame *cfd = (struct canfd_frame *)skb->data; 705 696 706 - if (unlikely(dev->type != ARPHRD_CAN || skb->len != CANFD_MTU || 707 - cfd->len > CANFD_MAX_DLEN)) { 708 - pr_warn_once("PF_CAN: dropped non conform CAN FD skbuf: dev type %d, len %d, datalen %d\n", 697 + if (unlikely(dev->type != ARPHRD_CAN || skb->len != CANFD_MTU)) { 698 + pr_warn_once("PF_CAN: dropped non conform CAN FD skbuff: dev type %d, len %d\n", 699 + dev->type, skb->len); 700 + goto free_skb; 701 + } 702 + 703 + /* This check is made separately since cfd->len would be uninitialized if skb->len = 0. */ 704 + if (unlikely(cfd->len > CANFD_MAX_DLEN)) { 705 + pr_warn_once("PF_CAN: dropped non conform CAN FD skbuff: dev type %d, len %d, datalen %d\n", 709 706 dev->type, skb->len, cfd->len); 710 - kfree_skb(skb); 711 - return NET_RX_DROP; 707 + goto free_skb; 712 708 } 713 709 714 710 can_receive(skb, dev); 715 711 return NET_RX_SUCCESS; 712 + 713 + free_skb: 714 + kfree_skb(skb); 715 + return NET_RX_DROP; 716 716 } 717 717 718 718 /* af_can protocol functions */
+4 -2
net/core/devlink.c
··· 1448 1448 err = ops->sb_occ_port_pool_get(devlink_port, devlink_sb->index, 1449 1449 pool_index, &cur, &max); 1450 1450 if (err && err != -EOPNOTSUPP) 1451 - return err; 1451 + goto sb_occ_get_failure; 1452 1452 if (!err) { 1453 1453 if (nla_put_u32(msg, DEVLINK_ATTR_SB_OCC_CUR, cur)) 1454 1454 goto nla_put_failure; ··· 1461 1461 return 0; 1462 1462 1463 1463 nla_put_failure: 1464 + err = -EMSGSIZE; 1465 + sb_occ_get_failure: 1464 1466 genlmsg_cancel(msg, hdr); 1465 - return -EMSGSIZE; 1467 + return err; 1466 1468 } 1467 1469 1468 1470 static int devlink_nl_cmd_sb_port_pool_get_doit(struct sk_buff *skb,
+2
net/core/neighbour.c
··· 235 235 236 236 write_lock(&n->lock); 237 237 if ((n->nud_state == NUD_FAILED) || 238 + (tbl->is_multicast && 239 + tbl->is_multicast(n->primary_key)) || 238 240 time_after(tref, n->updated)) 239 241 remove = true; 240 242 write_unlock(&n->lock);
+18 -4
net/core/netpoll.c
··· 29 29 #include <linux/slab.h> 30 30 #include <linux/export.h> 31 31 #include <linux/if_vlan.h> 32 + #include <net/dsa.h> 32 33 #include <net/tcp.h> 33 34 #include <net/udp.h> 34 35 #include <net/addrconf.h> ··· 658 657 659 658 int netpoll_setup(struct netpoll *np) 660 659 { 661 - struct net_device *ndev = NULL; 660 + struct net_device *ndev = NULL, *dev = NULL; 661 + struct net *net = current->nsproxy->net_ns; 662 662 struct in_device *in_dev; 663 663 int err; 664 664 665 665 rtnl_lock(); 666 - if (np->dev_name[0]) { 667 - struct net *net = current->nsproxy->net_ns; 666 + if (np->dev_name[0]) 668 667 ndev = __dev_get_by_name(net, np->dev_name); 669 - } 668 + 670 669 if (!ndev) { 671 670 np_err(np, "%s doesn't exist, aborting\n", np->dev_name); 672 671 err = -ENODEV; 673 672 goto unlock; 674 673 } 675 674 dev_hold(ndev); 675 + 676 + /* bring up DSA management network devices up first */ 677 + for_each_netdev(net, dev) { 678 + if (!netdev_uses_dsa(dev)) 679 + continue; 680 + 681 + err = dev_change_flags(dev, dev->flags | IFF_UP, NULL); 682 + if (err < 0) { 683 + np_err(np, "%s failed to open %s\n", 684 + np->dev_name, dev->name); 685 + goto put; 686 + } 687 + } 676 688 677 689 if (netdev_master_upper_dev_get(ndev)) { 678 690 np_err(np, "%s is a slave device, aborting\n", np->dev_name);
+74 -13
net/core/skmsg.c
··· 170 170 struct scatterlist *sge = sk_msg_elem(msg, i); 171 171 u32 len = sge->length; 172 172 173 - if (charge) 174 - sk_mem_uncharge(sk, len); 175 - if (!msg->skb) 173 + /* When the skb owns the memory we free it from consume_skb path. */ 174 + if (!msg->skb) { 175 + if (charge) 176 + sk_mem_uncharge(sk, len); 176 177 put_page(sg_page(sge)); 178 + } 177 179 memset(sge, 0, sizeof(*sge)); 178 180 return len; 179 181 } ··· 399 397 } 400 398 EXPORT_SYMBOL_GPL(sk_msg_memcopy_from_iter); 401 399 402 - static int sk_psock_skb_ingress(struct sk_psock *psock, struct sk_buff *skb) 400 + static struct sk_msg *sk_psock_create_ingress_msg(struct sock *sk, 401 + struct sk_buff *skb) 403 402 { 404 - struct sock *sk = psock->sk; 405 - int copied = 0, num_sge; 406 403 struct sk_msg *msg; 404 + 405 + if (atomic_read(&sk->sk_rmem_alloc) > sk->sk_rcvbuf) 406 + return NULL; 407 + 408 + if (!sk_rmem_schedule(sk, skb, skb->truesize)) 409 + return NULL; 407 410 408 411 msg = kzalloc(sizeof(*msg), __GFP_NOWARN | GFP_ATOMIC); 409 412 if (unlikely(!msg)) 410 - return -EAGAIN; 411 - if (!sk_rmem_schedule(sk, skb, skb->len)) { 412 - kfree(msg); 413 - return -EAGAIN; 414 - } 413 + return NULL; 415 414 416 415 sk_msg_init(msg); 416 + return msg; 417 + } 418 + 419 + static int sk_psock_skb_ingress_enqueue(struct sk_buff *skb, 420 + struct sk_psock *psock, 421 + struct sock *sk, 422 + struct sk_msg *msg) 423 + { 424 + int num_sge, copied; 425 + 426 + /* skb linearize may fail with ENOMEM, but lets simply try again 427 + * later if this happens. Under memory pressure we don't want to 428 + * drop the skb. We need to linearize the skb so that the mapping 429 + * in skb_to_sgvec can not error. 430 + */ 431 + if (skb_linearize(skb)) 432 + return -EAGAIN; 417 433 num_sge = skb_to_sgvec(skb, msg->sg.data, 0, skb->len); 418 434 if (unlikely(num_sge < 0)) { 419 435 kfree(msg); 420 436 return num_sge; 421 437 } 422 438 423 - sk_mem_charge(sk, skb->len); 424 439 copied = skb->len; 425 440 msg->sg.start = 0; 426 441 msg->sg.size = copied; ··· 447 428 sk_psock_queue_msg(psock, msg); 448 429 sk_psock_data_ready(sk, psock); 449 430 return copied; 431 + } 432 + 433 + static int sk_psock_skb_ingress_self(struct sk_psock *psock, struct sk_buff *skb); 434 + 435 + static int sk_psock_skb_ingress(struct sk_psock *psock, struct sk_buff *skb) 436 + { 437 + struct sock *sk = psock->sk; 438 + struct sk_msg *msg; 439 + 440 + /* If we are receiving on the same sock skb->sk is already assigned, 441 + * skip memory accounting and owner transition seeing it already set 442 + * correctly. 443 + */ 444 + if (unlikely(skb->sk == sk)) 445 + return sk_psock_skb_ingress_self(psock, skb); 446 + msg = sk_psock_create_ingress_msg(sk, skb); 447 + if (!msg) 448 + return -EAGAIN; 449 + 450 + /* This will transition ownership of the data from the socket where 451 + * the BPF program was run initiating the redirect to the socket 452 + * we will eventually receive this data on. The data will be released 453 + * from skb_consume found in __tcp_bpf_recvmsg() after its been copied 454 + * into user buffers. 455 + */ 456 + skb_set_owner_r(skb, sk); 457 + return sk_psock_skb_ingress_enqueue(skb, psock, sk, msg); 458 + } 459 + 460 + /* Puts an skb on the ingress queue of the socket already assigned to the 461 + * skb. In this case we do not need to check memory limits or skb_set_owner_r 462 + * because the skb is already accounted for here. 463 + */ 464 + static int sk_psock_skb_ingress_self(struct sk_psock *psock, struct sk_buff *skb) 465 + { 466 + struct sk_msg *msg = kzalloc(sizeof(*msg), __GFP_NOWARN | GFP_ATOMIC); 467 + struct sock *sk = psock->sk; 468 + 469 + if (unlikely(!msg)) 470 + return -EAGAIN; 471 + sk_msg_init(msg); 472 + return sk_psock_skb_ingress_enqueue(skb, psock, sk, msg); 450 473 } 451 474 452 475 static int sk_psock_handle_skb(struct sk_psock *psock, struct sk_buff *skb, ··· 850 789 * retrying later from workqueue. 851 790 */ 852 791 if (skb_queue_empty(&psock->ingress_skb)) { 853 - err = sk_psock_skb_ingress(psock, skb); 792 + err = sk_psock_skb_ingress_self(psock, skb); 854 793 } 855 794 if (err < 0) { 856 795 skb_queue_tail(&psock->ingress_skb, skb);
+6
net/ipv4/arp.c
··· 125 125 static void arp_solicit(struct neighbour *neigh, struct sk_buff *skb); 126 126 static void arp_error_report(struct neighbour *neigh, struct sk_buff *skb); 127 127 static void parp_redo(struct sk_buff *skb); 128 + static int arp_is_multicast(const void *pkey); 128 129 129 130 static const struct neigh_ops arp_generic_ops = { 130 131 .family = AF_INET, ··· 157 156 .key_eq = arp_key_eq, 158 157 .constructor = arp_constructor, 159 158 .proxy_redo = parp_redo, 159 + .is_multicast = arp_is_multicast, 160 160 .id = "arp_cache", 161 161 .parms = { 162 162 .tbl = &arp_tbl, ··· 930 928 arp_process(dev_net(skb->dev), NULL, skb); 931 929 } 932 930 931 + static int arp_is_multicast(const void *pkey) 932 + { 933 + return ipv4_is_multicast(*((__be32 *)pkey)); 934 + } 933 935 934 936 /* 935 937 * Receive an arp request from the device layer.
+1 -1
net/ipv4/fib_frontend.c
··· 696 696 cfg->fc_gw4 = *((__be32 *)via->rtvia_addr); 697 697 break; 698 698 case AF_INET6: 699 - #ifdef CONFIG_IPV6 699 + #if IS_ENABLED(CONFIG_IPV6) 700 700 if (alen != sizeof(struct in6_addr)) { 701 701 NL_SET_ERR_MSG(extack, "Invalid IPv6 address in RTA_VIA"); 702 702 return -EINVAL;
+3 -1
net/ipv4/inet_diag.c
··· 479 479 r->idiag_inode = 0; 480 480 481 481 if (net_admin && nla_put_u32(skb, INET_DIAG_MARK, 482 - inet_rsk(reqsk)->ir_mark)) 482 + inet_rsk(reqsk)->ir_mark)) { 483 + nlmsg_cancel(skb, nlh); 483 484 return -EMSGSIZE; 485 + } 484 486 485 487 nlmsg_end(skb, nlh); 486 488 return 0;
+1 -1
net/ipv4/tcp_bbr.c
··· 945 945 filter_expired = after(tcp_jiffies32, 946 946 bbr->min_rtt_stamp + bbr_min_rtt_win_sec * HZ); 947 947 if (rs->rtt_us >= 0 && 948 - (rs->rtt_us <= bbr->min_rtt_us || 948 + (rs->rtt_us < bbr->min_rtt_us || 949 949 (filter_expired && !rs->is_ack_delayed))) { 950 950 bbr->min_rtt_us = rs->rtt_us; 951 951 bbr->min_rtt_stamp = tcp_jiffies32;
+11 -7
net/ipv4/tcp_bpf.c
··· 15 15 { 16 16 struct iov_iter *iter = &msg->msg_iter; 17 17 int peek = flags & MSG_PEEK; 18 - int i, ret, copied = 0; 19 18 struct sk_msg *msg_rx; 19 + int i, copied = 0; 20 20 21 21 msg_rx = list_first_entry_or_null(&psock->ingress_msg, 22 22 struct sk_msg, list); ··· 37 37 page = sg_page(sge); 38 38 if (copied + copy > len) 39 39 copy = len - copied; 40 - ret = copy_page_to_iter(page, sge->offset, copy, iter); 41 - if (ret != copy) { 42 - msg_rx->sg.start = i; 43 - return -EFAULT; 44 - } 40 + copy = copy_page_to_iter(page, sge->offset, copy, iter); 41 + if (!copy) 42 + return copied ? copied : -EFAULT; 45 43 46 44 copied += copy; 47 45 if (likely(!peek)) { 48 46 sge->offset += copy; 49 47 sge->length -= copy; 50 - sk_mem_uncharge(sk, copy); 48 + if (!msg_rx->skb) 49 + sk_mem_uncharge(sk, copy); 51 50 msg_rx->sg.size -= copy; 52 51 53 52 if (!sge->length) { ··· 55 56 put_page(page); 56 57 } 57 58 } else { 59 + /* Lets not optimize peek case if copy_page_to_iter 60 + * didn't copy the entire length lets just break. 61 + */ 62 + if (copy != sge->length) 63 + return copied; 58 64 sk_msg_iter_var_next(i); 59 65 } 60 66
+6 -2
net/ipv6/addrconf.c
··· 5023 5023 return -EMSGSIZE; 5024 5024 5025 5025 if (args->netnsid >= 0 && 5026 - nla_put_s32(skb, IFA_TARGET_NETNSID, args->netnsid)) 5026 + nla_put_s32(skb, IFA_TARGET_NETNSID, args->netnsid)) { 5027 + nlmsg_cancel(skb, nlh); 5027 5028 return -EMSGSIZE; 5029 + } 5028 5030 5029 5031 put_ifaddrmsg(nlh, 128, IFA_F_PERMANENT, scope, ifindex); 5030 5032 if (nla_put_in6_addr(skb, IFA_MULTICAST, &ifmca->mca_addr) < 0 || ··· 5057 5055 return -EMSGSIZE; 5058 5056 5059 5057 if (args->netnsid >= 0 && 5060 - nla_put_s32(skb, IFA_TARGET_NETNSID, args->netnsid)) 5058 + nla_put_s32(skb, IFA_TARGET_NETNSID, args->netnsid)) { 5059 + nlmsg_cancel(skb, nlh); 5061 5060 return -EMSGSIZE; 5061 + } 5062 5062 5063 5063 put_ifaddrmsg(nlh, 128, IFA_F_PERMANENT, scope, ifindex); 5064 5064 if (nla_put_in6_addr(skb, IFA_ANYCAST, &ifaca->aca_addr) < 0 ||
+2 -1
net/ipv6/ah6.c
··· 588 588 memcpy(auth_data, ah->auth_data, ahp->icv_trunc_len); 589 589 memset(ah->auth_data, 0, ahp->icv_trunc_len); 590 590 591 - if (ipv6_clear_mutable_options(ip6h, hdr_len, XFRM_POLICY_IN)) 591 + err = ipv6_clear_mutable_options(ip6h, hdr_len, XFRM_POLICY_IN); 592 + if (err) 592 593 goto out_free; 593 594 594 595 ip6h->priority = 0;
+7
net/ipv6/ndisc.c
··· 81 81 static int pndisc_constructor(struct pneigh_entry *n); 82 82 static void pndisc_destructor(struct pneigh_entry *n); 83 83 static void pndisc_redo(struct sk_buff *skb); 84 + static int ndisc_is_multicast(const void *pkey); 84 85 85 86 static const struct neigh_ops ndisc_generic_ops = { 86 87 .family = AF_INET6, ··· 116 115 .pconstructor = pndisc_constructor, 117 116 .pdestructor = pndisc_destructor, 118 117 .proxy_redo = pndisc_redo, 118 + .is_multicast = ndisc_is_multicast, 119 119 .allow_add = ndisc_allow_add, 120 120 .id = "ndisc_cache", 121 121 .parms = { ··· 1706 1704 { 1707 1705 ndisc_recv_ns(skb); 1708 1706 kfree_skb(skb); 1707 + } 1708 + 1709 + static int ndisc_is_multicast(const void *pkey) 1710 + { 1711 + return ipv6_addr_is_multicast((struct in6_addr *)pkey); 1709 1712 } 1710 1713 1711 1714 static bool ndisc_suppress_frag_ndisc(struct sk_buff *skb)
+9
net/ipv6/netfilter/nf_conntrack_reasm.c
··· 440 440 int nf_ct_frag6_gather(struct net *net, struct sk_buff *skb, u32 user) 441 441 { 442 442 u16 savethdr = skb->transport_header; 443 + u8 nexthdr = NEXTHDR_FRAGMENT; 443 444 int fhoff, nhoff, ret; 444 445 struct frag_hdr *fhdr; 445 446 struct frag_queue *fq; ··· 455 454 456 455 if (find_prev_fhdr(skb, &prevhdr, &nhoff, &fhoff) < 0) 457 456 return 0; 457 + 458 + /* Discard the first fragment if it does not include all headers 459 + * RFC 8200, Section 4.5 460 + */ 461 + if (ipv6frag_thdr_truncated(skb, fhoff, &nexthdr)) { 462 + pr_debug("Drop incomplete fragment\n"); 463 + return 0; 464 + } 458 465 459 466 if (!pskb_may_pull(skb, fhoff + sizeof(*fhdr))) 460 467 return -ENOMEM;
+6 -20
net/ipv6/reassembly.c
··· 324 324 struct frag_queue *fq; 325 325 const struct ipv6hdr *hdr = ipv6_hdr(skb); 326 326 struct net *net = dev_net(skb_dst(skb)->dev); 327 - __be16 frag_off; 328 - int iif, offset; 329 327 u8 nexthdr; 328 + int iif; 330 329 331 330 if (IP6CB(skb)->flags & IP6SKB_FRAGMENTED) 332 331 goto fail_hdr; ··· 361 362 * the source of the fragment, with the Pointer field set to zero. 362 363 */ 363 364 nexthdr = hdr->nexthdr; 364 - offset = ipv6_skip_exthdr(skb, skb_transport_offset(skb), &nexthdr, &frag_off); 365 - if (offset >= 0) { 366 - /* Check some common protocols' header */ 367 - if (nexthdr == IPPROTO_TCP) 368 - offset += sizeof(struct tcphdr); 369 - else if (nexthdr == IPPROTO_UDP) 370 - offset += sizeof(struct udphdr); 371 - else if (nexthdr == IPPROTO_ICMPV6) 372 - offset += sizeof(struct icmp6hdr); 373 - else 374 - offset += 1; 375 - 376 - if (!(frag_off & htons(IP6_OFFSET)) && offset > skb->len) { 377 - __IP6_INC_STATS(net, __in6_dev_get_safely(skb->dev), 378 - IPSTATS_MIB_INHDRERRORS); 379 - icmpv6_param_prob(skb, ICMPV6_HDR_INCOMP, 0); 380 - return -1; 381 - } 365 + if (ipv6frag_thdr_truncated(skb, skb_transport_offset(skb), &nexthdr)) { 366 + __IP6_INC_STATS(net, __in6_dev_get_safely(skb->dev), 367 + IPSTATS_MIB_INHDRERRORS); 368 + icmpv6_param_prob(skb, ICMPV6_HDR_INCOMP, 0); 369 + return -1; 382 370 } 383 371 384 372 iif = skb->dev ? skb->dev->ifindex : 0;
+5 -22
net/mac80211/rc80211_minstrel.c
··· 274 274 success = !!(info->flags & IEEE80211_TX_STAT_ACK); 275 275 276 276 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) { 277 - if (ar[i].idx < 0) 277 + if (ar[i].idx < 0 || !ar[i].count) 278 278 break; 279 279 280 280 ndx = rix_to_ndx(mi, ar[i].idx); ··· 286 286 if ((i != IEEE80211_TX_MAX_RATES - 1) && (ar[i + 1].idx < 0)) 287 287 mi->r[ndx].stats.success += success; 288 288 } 289 - 290 - if ((info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) && (i >= 0)) 291 - mi->sample_packets++; 292 - 293 - if (mi->sample_deferred > 0) 294 - mi->sample_deferred--; 295 289 296 290 if (time_after(jiffies, mi->last_stats_update + 297 291 mp->update_interval / (mp->new_avg ? 2 : 1))) ··· 361 367 return; 362 368 363 369 delta = (mi->total_packets * sampling_ratio / 100) - 364 - (mi->sample_packets + mi->sample_deferred / 2); 370 + mi->sample_packets; 365 371 366 372 /* delta < 0: no sampling required */ 367 373 prev_sample = mi->prev_sample; ··· 370 376 return; 371 377 372 378 if (mi->total_packets >= 10000) { 373 - mi->sample_deferred = 0; 374 379 mi->sample_packets = 0; 375 380 mi->total_packets = 0; 376 381 } else if (delta > mi->n_rates * 2) { ··· 394 401 * rate sampling method should be used. 395 402 * Respect such rates that are not sampled for 20 interations. 396 403 */ 397 - if (mrr_capable && 398 - msr->perfect_tx_time > mr->perfect_tx_time && 399 - msr->stats.sample_skipped < 20) { 400 - /* Only use IEEE80211_TX_CTL_RATE_CTRL_PROBE to mark 401 - * packets that have the sampling rate deferred to the 402 - * second MRR stage. Increase the sample counter only 403 - * if the deferred sample rate was actually used. 404 - * Use the sample_deferred counter to make sure that 405 - * the sampling is not done in large bursts */ 406 - info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE; 407 - rate++; 408 - mi->sample_deferred++; 409 - } else { 404 + if (msr->perfect_tx_time < mr->perfect_tx_time || 405 + msr->stats.sample_skipped >= 20) { 410 406 if (!msr->sample_limit) 411 407 return; 412 408 ··· 415 433 416 434 rate->idx = mi->r[ndx].rix; 417 435 rate->count = minstrel_get_retry_count(&mi->r[ndx], info); 436 + info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE; 418 437 } 419 438 420 439
-1
net/mac80211/rc80211_minstrel.h
··· 126 126 u8 max_prob_rate; 127 127 unsigned int total_packets; 128 128 unsigned int sample_packets; 129 - int sample_deferred; 130 129 131 130 unsigned int sample_row; 132 131 unsigned int sample_column;
+4 -10
net/mac80211/sta_info.c
··· 705 705 out_drop_sta: 706 706 local->num_sta--; 707 707 synchronize_net(); 708 - __cleanup_single_sta(sta); 708 + cleanup_single_sta(sta); 709 709 out_err: 710 710 mutex_unlock(&local->sta_mtx); 711 711 kfree(sinfo); ··· 724 724 725 725 err = sta_info_insert_check(sta); 726 726 if (err) { 727 + sta_info_free(local, sta); 727 728 mutex_unlock(&local->sta_mtx); 728 729 rcu_read_lock(); 729 - goto out_free; 730 + return err; 730 731 } 731 732 732 - err = sta_info_insert_finish(sta); 733 - if (err) 734 - goto out_free; 735 - 736 - return 0; 737 - out_free: 738 - sta_info_free(local, sta); 739 - return err; 733 + return sta_info_insert_finish(sta); 740 734 } 741 735 742 736 int sta_info_insert(struct sta_info *sta)
+8 -10
net/mac80211/status.c
··· 49 49 int ac; 50 50 51 51 if (info->flags & (IEEE80211_TX_CTL_NO_PS_BUFFER | 52 - IEEE80211_TX_CTL_AMPDU)) { 52 + IEEE80211_TX_CTL_AMPDU | 53 + IEEE80211_TX_CTL_HW_80211_ENCAP)) { 53 54 ieee80211_free_txskb(&local->hw, skb); 54 55 return; 55 56 } ··· 916 915 ieee80211_mpsp_trigger_process( 917 916 ieee80211_get_qos_ctl(hdr), sta, true, acked); 918 917 919 - if (!acked && test_sta_flag(sta, WLAN_STA_PS_STA)) { 920 - /* 921 - * The STA is in power save mode, so assume 922 - * that this TX packet failed because of that. 923 - */ 924 - ieee80211_handle_filtered_frame(local, sta, skb); 925 - return; 926 - } 927 - 928 918 if (ieee80211_hw_check(&local->hw, HAS_RATE_CONTROL) && 929 919 (ieee80211_is_data(hdr->frame_control)) && 930 920 (rates_idx != -1)) ··· 1142 1150 -info->status.ack_signal); 1143 1151 } 1144 1152 } else if (test_sta_flag(sta, WLAN_STA_PS_STA)) { 1153 + /* 1154 + * The STA is in power save mode, so assume 1155 + * that this TX packet failed because of that. 1156 + */ 1157 + if (skb) 1158 + ieee80211_handle_filtered_frame(local, sta, skb); 1145 1159 return; 1146 1160 } else if (noack_success) { 1147 1161 /* nothing to do here, do not account as lost */
-5
net/ncsi/ncsi-manage.c
··· 1726 1726 ndp->ptype.dev = dev; 1727 1727 dev_add_pack(&ndp->ptype); 1728 1728 1729 - /* Set up generic netlink interface */ 1730 - ncsi_init_netlink(dev); 1731 - 1732 1729 pdev = to_platform_device(dev->dev.parent); 1733 1730 if (pdev) { 1734 1731 np = pdev->dev.of_node; ··· 1888 1891 spin_lock_irqsave(&ncsi_dev_lock, flags); 1889 1892 list_del_rcu(&ndp->node); 1890 1893 spin_unlock_irqrestore(&ncsi_dev_lock, flags); 1891 - 1892 - ncsi_unregister_netlink(nd->dev); 1893 1894 1894 1895 kfree(ndp); 1895 1896 }
+3 -19
net/ncsi/ncsi-netlink.c
··· 766 766 .n_small_ops = ARRAY_SIZE(ncsi_ops), 767 767 }; 768 768 769 - int ncsi_init_netlink(struct net_device *dev) 769 + static int __init ncsi_init_netlink(void) 770 770 { 771 - int rc; 772 - 773 - rc = genl_register_family(&ncsi_genl_family); 774 - if (rc) 775 - netdev_err(dev, "ncsi: failed to register netlink family\n"); 776 - 777 - return rc; 771 + return genl_register_family(&ncsi_genl_family); 778 772 } 779 - 780 - int ncsi_unregister_netlink(struct net_device *dev) 781 - { 782 - int rc; 783 - 784 - rc = genl_unregister_family(&ncsi_genl_family); 785 - if (rc) 786 - netdev_err(dev, "ncsi: failed to unregister netlink family\n"); 787 - 788 - return rc; 789 - } 773 + subsys_initcall(ncsi_init_netlink);
-3
net/ncsi/ncsi-netlink.h
··· 22 22 struct nlmsghdr *nlhdr, 23 23 int err); 24 24 25 - int ncsi_init_netlink(struct net_device *dev); 26 - int ncsi_unregister_netlink(struct net_device *dev); 27 - 28 25 #endif /* __NCSI_NETLINK_H__ */
+1 -1
net/netlabel/netlabel_unlabeled.c
··· 1167 1167 u32 skip_bkt = cb->args[0]; 1168 1168 u32 skip_chain = cb->args[1]; 1169 1169 u32 skip_addr4 = cb->args[2]; 1170 - u32 iter_bkt, iter_chain, iter_addr4 = 0, iter_addr6 = 0; 1170 + u32 iter_bkt, iter_chain = 0, iter_addr4 = 0, iter_addr6 = 0; 1171 1171 struct netlbl_unlhsh_iface *iface; 1172 1172 struct list_head *iter_list; 1173 1173 struct netlbl_af4list *addr4;
+3
net/rfkill/core.c
··· 876 876 877 877 rfkill->suspended = false; 878 878 879 + if (!rfkill->registered) 880 + return 0; 881 + 879 882 if (!rfkill->persistent) { 880 883 cur = !!(rfkill->state & RFKILL_BLOCK_SW); 881 884 rfkill_set_block(rfkill, cur);
+2 -2
net/sctp/input.c
··· 449 449 else { 450 450 if (!mod_timer(&t->proto_unreach_timer, 451 451 jiffies + (HZ/20))) 452 - sctp_association_hold(asoc); 452 + sctp_transport_hold(t); 453 453 } 454 454 } else { 455 455 struct net *net = sock_net(sk); ··· 458 458 "encountered!\n", __func__); 459 459 460 460 if (del_timer(&t->proto_unreach_timer)) 461 - sctp_association_put(asoc); 461 + sctp_transport_put(t); 462 462 463 463 sctp_do_sm(net, SCTP_EVENT_T_OTHER, 464 464 SCTP_ST_OTHER(SCTP_EVENT_ICMP_PROTO_UNREACH),
+2 -2
net/sctp/sm_sideeffect.c
··· 419 419 /* Try again later. */ 420 420 if (!mod_timer(&transport->proto_unreach_timer, 421 421 jiffies + (HZ/20))) 422 - sctp_association_hold(asoc); 422 + sctp_transport_hold(transport); 423 423 goto out_unlock; 424 424 } 425 425 ··· 435 435 436 436 out_unlock: 437 437 bh_unlock_sock(sk); 438 - sctp_association_put(asoc); 438 + sctp_transport_put(transport); 439 439 } 440 440 441 441 /* Handle the timeout of the RE-CONFIG timer. */
+1 -1
net/sctp/transport.c
··· 133 133 134 134 /* Delete the ICMP proto unreachable timer if it's active. */ 135 135 if (del_timer(&transport->proto_unreach_timer)) 136 - sctp_association_put(transport->asoc); 136 + sctp_transport_put(transport); 137 137 138 138 sctp_transport_put(transport); 139 139 }
+2 -1
net/smc/af_smc.c
··· 979 979 980 980 /* check if smc modes and versions of CLC proposal and accept match */ 981 981 rc = smc_connect_check_aclc(ini, aclc); 982 - version = aclc->hdr.version == SMC_V1 ? SMC_V1 : version; 982 + version = aclc->hdr.version == SMC_V1 ? SMC_V1 : SMC_V2; 983 + ini->smcd_version = version; 983 984 if (rc) 984 985 goto vlan_cleanup; 985 986
+2 -1
net/smc/smc_core.c
··· 1309 1309 ini->ism_peer_gid[ini->ism_selected]) : 1310 1310 smcr_lgr_match(lgr, ini->ib_lcl, role, ini->ib_clcqpn)) && 1311 1311 !lgr->sync_err && 1312 - lgr->vlan_id == ini->vlan_id && 1312 + (ini->smcd_version == SMC_V2 || 1313 + lgr->vlan_id == ini->vlan_id) && 1313 1314 (role == SMC_CLNT || ini->is_smcd || 1314 1315 lgr->conns_num < SMC_RMBS_PER_LGR_MAX)) { 1315 1316 /* link group found */
+3 -3
net/smc/smc_ib.c
··· 198 198 rcu_read_lock(); 199 199 ndev = rdma_read_gid_attr_ndev_rcu(attr); 200 200 if (!IS_ERR(ndev) && 201 - ((!vlan_id && !is_vlan_dev(attr->ndev)) || 202 - (vlan_id && is_vlan_dev(attr->ndev) && 203 - vlan_dev_vlan_id(attr->ndev) == vlan_id)) && 201 + ((!vlan_id && !is_vlan_dev(ndev)) || 202 + (vlan_id && is_vlan_dev(ndev) && 203 + vlan_dev_vlan_id(ndev) == vlan_id)) && 204 204 attr->gid_type == IB_GID_TYPE_ROCE) { 205 205 rcu_read_unlock(); 206 206 if (gid)
+27 -10
net/tls/tls_device.c
··· 694 694 695 695 static bool 696 696 tls_device_rx_resync_async(struct tls_offload_resync_async *resync_async, 697 - s64 resync_req, u32 *seq) 697 + s64 resync_req, u32 *seq, u16 *rcd_delta) 698 698 { 699 699 u32 is_async = resync_req & RESYNC_REQ_ASYNC; 700 700 u32 req_seq = resync_req >> 32; 701 701 u32 req_end = req_seq + ((resync_req >> 16) & 0xffff); 702 + u16 i; 703 + 704 + *rcd_delta = 0; 702 705 703 706 if (is_async) { 707 + /* shouldn't get to wraparound: 708 + * too long in async stage, something bad happened 709 + */ 710 + if (WARN_ON_ONCE(resync_async->rcd_delta == USHRT_MAX)) 711 + return false; 712 + 704 713 /* asynchronous stage: log all headers seq such that 705 714 * req_seq <= seq <= end_seq, and wait for real resync request 706 715 */ 707 - if (between(*seq, req_seq, req_end) && 716 + if (before(*seq, req_seq)) 717 + return false; 718 + if (!after(*seq, req_end) && 708 719 resync_async->loglen < TLS_DEVICE_RESYNC_ASYNC_LOGMAX) 709 720 resync_async->log[resync_async->loglen++] = *seq; 721 + 722 + resync_async->rcd_delta++; 710 723 711 724 return false; 712 725 } ··· 727 714 /* synchronous stage: check against the logged entries and 728 715 * proceed to check the next entries if no match was found 729 716 */ 730 - while (resync_async->loglen) { 731 - if (req_seq == resync_async->log[resync_async->loglen - 1] && 732 - atomic64_try_cmpxchg(&resync_async->req, 733 - &resync_req, 0)) { 734 - resync_async->loglen = 0; 717 + for (i = 0; i < resync_async->loglen; i++) 718 + if (req_seq == resync_async->log[i] && 719 + atomic64_try_cmpxchg(&resync_async->req, &resync_req, 0)) { 720 + *rcd_delta = resync_async->rcd_delta - i; 735 721 *seq = req_seq; 722 + resync_async->loglen = 0; 723 + resync_async->rcd_delta = 0; 736 724 return true; 737 725 } 738 - resync_async->loglen--; 739 - } 726 + 727 + resync_async->loglen = 0; 728 + resync_async->rcd_delta = 0; 740 729 741 730 if (req_seq == *seq && 742 731 atomic64_try_cmpxchg(&resync_async->req, ··· 756 741 u32 sock_data, is_req_pending; 757 742 struct tls_prot_info *prot; 758 743 s64 resync_req; 744 + u16 rcd_delta; 759 745 u32 req_seq; 760 746 761 747 if (tls_ctx->rx_conf != TLS_HW) ··· 802 786 return; 803 787 804 788 if (!tls_device_rx_resync_async(rx_ctx->resync_async, 805 - resync_req, &seq)) 789 + resync_req, &seq, &rcd_delta)) 806 790 return; 791 + tls_bigint_subtract(rcd_sn, rcd_delta); 807 792 break; 808 793 } 809 794
+1 -1
net/tls/tls_sw.c
··· 1913 1913 * another message type 1914 1914 */ 1915 1915 msg->msg_flags |= MSG_EOR; 1916 - if (ctx->control != TLS_RECORD_TYPE_DATA) 1916 + if (control != TLS_RECORD_TYPE_DATA) 1917 1917 goto recv_end; 1918 1918 } else { 1919 1919 break;
+1 -1
net/vmw_vsock/af_vsock.c
··· 438 438 case SOCK_STREAM: 439 439 if (vsock_use_local_transport(remote_cid)) 440 440 new_transport = transport_local; 441 - else if (remote_cid <= VMADDR_CID_HOST) 441 + else if (remote_cid <= VMADDR_CID_HOST || !transport_h2g) 442 442 new_transport = transport_g2h; 443 443 else 444 444 new_transport = transport_h2g;
+1
net/x25/af_x25.c
··· 1050 1050 makex25->lci = lci; 1051 1051 makex25->dest_addr = dest_addr; 1052 1052 makex25->source_addr = source_addr; 1053 + x25_neigh_hold(nb); 1053 1054 makex25->neighbour = nb; 1054 1055 makex25->facilities = facilities; 1055 1056 makex25->dte_facilities= dte_facilities;
+3 -1
security/selinux/ibpkey.c
··· 151 151 * is valid, it just won't be added to the cache. 152 152 */ 153 153 new = kzalloc(sizeof(*new), GFP_ATOMIC); 154 - if (!new) 154 + if (!new) { 155 + ret = -ENOMEM; 155 156 goto out; 157 + } 156 158 157 159 new->psec.subnet_prefix = subnet_prefix; 158 160 new->psec.pkey = pkey_num;
+3 -5
tools/arch/x86/lib/memcpy_64.S
··· 16 16 * to a jmp to memcpy_erms which does the REP; MOVSB mem copy. 17 17 */ 18 18 19 - .weak memcpy 20 - 21 19 /* 22 20 * memcpy - Copy a memory block. 23 21 * ··· 28 30 * rax original destination 29 31 */ 30 32 SYM_FUNC_START_ALIAS(__memcpy) 31 - SYM_FUNC_START_LOCAL(memcpy) 33 + SYM_FUNC_START_WEAK(memcpy) 32 34 ALTERNATIVE_2 "jmp memcpy_orig", "", X86_FEATURE_REP_GOOD, \ 33 35 "jmp memcpy_erms", X86_FEATURE_ERMS 34 36 ··· 49 51 * memcpy_erms() - enhanced fast string memcpy. This is faster and 50 52 * simpler than memcpy. Use memcpy_erms when possible. 51 53 */ 52 - SYM_FUNC_START(memcpy_erms) 54 + SYM_FUNC_START_LOCAL(memcpy_erms) 53 55 movq %rdi, %rax 54 56 movq %rdx, %rcx 55 57 rep movsb 56 58 ret 57 59 SYM_FUNC_END(memcpy_erms) 58 60 59 - SYM_FUNC_START(memcpy_orig) 61 + SYM_FUNC_START_LOCAL(memcpy_orig) 60 62 movq %rdi, %rax 61 63 62 64 cmpq $0x20, %rdx
+6 -5
tools/arch/x86/lib/memset_64.S
··· 4 4 #include <linux/linkage.h> 5 5 #include <asm/cpufeatures.h> 6 6 #include <asm/alternative-asm.h> 7 - 8 - .weak memset 7 + #include <asm/export.h> 9 8 10 9 /* 11 10 * ISO C memset - set a memory block to a byte value. This function uses fast ··· 17 18 * 18 19 * rax original destination 19 20 */ 20 - SYM_FUNC_START_ALIAS(memset) 21 + SYM_FUNC_START_WEAK(memset) 21 22 SYM_FUNC_START(__memset) 22 23 /* 23 24 * Some CPUs support enhanced REP MOVSB/STOSB feature. It is recommended ··· 43 44 ret 44 45 SYM_FUNC_END(__memset) 45 46 SYM_FUNC_END_ALIAS(memset) 47 + EXPORT_SYMBOL(memset) 48 + EXPORT_SYMBOL(__memset) 46 49 47 50 /* 48 51 * ISO C memset - set a memory block to a byte value. This function uses ··· 57 56 * 58 57 * rax original destination 59 58 */ 60 - SYM_FUNC_START(memset_erms) 59 + SYM_FUNC_START_LOCAL(memset_erms) 61 60 movq %rdi,%r9 62 61 movb %sil,%al 63 62 movq %rdx,%rcx ··· 66 65 ret 67 66 SYM_FUNC_END(memset_erms) 68 67 69 - SYM_FUNC_START(memset_orig) 68 + SYM_FUNC_START_LOCAL(memset_orig) 70 69 movq %rdi,%r10 71 70 72 71 /* expand byte value */
+9 -9
tools/bpf/bpftool/net.c
··· 578 578 579 579 ifindex = net_parse_dev(&argc, &argv); 580 580 if (ifindex < 1) { 581 - close(progfd); 582 - return -EINVAL; 581 + err = -EINVAL; 582 + goto cleanup; 583 583 } 584 584 585 585 if (argc) { ··· 587 587 overwrite = true; 588 588 } else { 589 589 p_err("expected 'overwrite', got: '%s'?", *argv); 590 - close(progfd); 591 - return -EINVAL; 590 + err = -EINVAL; 591 + goto cleanup; 592 592 } 593 593 } 594 594 ··· 596 596 if (is_prefix("xdp", attach_type_strings[attach_type])) 597 597 err = do_attach_detach_xdp(progfd, attach_type, ifindex, 598 598 overwrite); 599 - 600 - if (err < 0) { 599 + if (err) { 601 600 p_err("interface %s attach failed: %s", 602 601 attach_type_strings[attach_type], strerror(-err)); 603 - return err; 602 + goto cleanup; 604 603 } 605 604 606 605 if (json_output) 607 606 jsonw_null(json_wtr); 608 - 609 - return 0; 607 + cleanup: 608 + close(progfd); 609 + return err; 610 610 } 611 611 612 612 static int do_detach(int argc, char **argv)
+2
tools/lib/bpf/Makefile
··· 146 146 awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}' | \ 147 147 sort -u | wc -l) 148 148 VERSIONED_SYM_COUNT = $(shell readelf --dyn-syms --wide $(OUTPUT)libbpf.so | \ 149 + sed 's/\[.*\]//' | \ 149 150 awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}' | \ 150 151 grep -Eo '[^ ]+@LIBBPF_' | cut -d@ -f1 | sort -u | wc -l) 151 152 ··· 215 214 awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}'| \ 216 215 sort -u > $(OUTPUT)libbpf_global_syms.tmp; \ 217 216 readelf --dyn-syms --wide $(OUTPUT)libbpf.so | \ 217 + sed 's/\[.*\]//' | \ 218 218 awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}'| \ 219 219 grep -Eo '[^ ]+@LIBBPF_' | cut -d@ -f1 | \ 220 220 sort -u > $(OUTPUT)libbpf_versioned_syms.tmp; \
+13 -10
tools/lib/bpf/libbpf.c
··· 560 560 const char *name, size_t sec_idx, const char *sec_name, 561 561 size_t sec_off, void *insn_data, size_t insn_data_sz) 562 562 { 563 - int i; 564 - 565 563 if (insn_data_sz == 0 || insn_data_sz % BPF_INSN_SZ || sec_off % BPF_INSN_SZ) { 566 564 pr_warn("sec '%s': corrupted program '%s', offset %zu, size %zu\n", 567 565 sec_name, name, sec_off, insn_data_sz); ··· 597 599 if (!prog->insns) 598 600 goto errout; 599 601 memcpy(prog->insns, insn_data, insn_data_sz); 600 - 601 - for (i = 0; i < prog->insns_cnt; i++) { 602 - if (insn_is_subprog_call(&prog->insns[i])) { 603 - obj->has_subcalls = true; 604 - break; 605 - } 606 - } 607 602 608 603 return 0; 609 604 errout: ··· 3271 3280 static bool prog_is_subprog(const struct bpf_object *obj, 3272 3281 const struct bpf_program *prog) 3273 3282 { 3274 - return prog->sec_idx == obj->efile.text_shndx && obj->has_subcalls; 3283 + /* For legacy reasons, libbpf supports an entry-point BPF programs 3284 + * without SEC() attribute, i.e., those in the .text section. But if 3285 + * there are 2 or more such programs in the .text section, they all 3286 + * must be subprograms called from entry-point BPF programs in 3287 + * designated SEC()'tions, otherwise there is no way to distinguish 3288 + * which of those programs should be loaded vs which are a subprogram. 3289 + * Similarly, if there is a function/program in .text and at least one 3290 + * other BPF program with custom SEC() attribute, then we just assume 3291 + * .text programs are subprograms (even if they are not called from 3292 + * other programs), because libbpf never explicitly supported mixing 3293 + * SEC()-designated BPF programs and .text entry-point BPF programs. 3294 + */ 3295 + return prog->sec_idx == obj->efile.text_shndx && obj->nr_programs > 1; 3275 3296 } 3276 3297 3277 3298 struct bpf_program *
+7
tools/perf/arch/x86/tests/dwarf-unwind.c
··· 38 38 stack_size = stack_size > STACK_SIZE ? STACK_SIZE : stack_size; 39 39 40 40 memcpy(buf, (void *) sp, stack_size); 41 + #ifdef MEMORY_SANITIZER 42 + /* 43 + * Copying the stack may copy msan poison, avoid false positives in the 44 + * unwinder by removing the poison here. 45 + */ 46 + __msan_unpoison(buf, stack_size); 47 + #endif 41 48 stack->data = (char *) buf; 42 49 stack->size = stack_size; 43 50 return 0;
+3
tools/perf/bench/mem-memcpy-x86-64-asm.S
··· 2 2 3 3 /* Various wrappers to make the kernel .S file build in user-space: */ 4 4 5 + // memcpy_orig and memcpy_erms are being defined as SYM_L_LOCAL but we need it 6 + #define SYM_FUNC_START_LOCAL(name) \ 7 + SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN) 5 8 #define memcpy MEMCPY /* don't hide glibc's memcpy() */ 6 9 #define altinstr_replacement text 7 10 #define globl p2align 4; .globl
+3
tools/perf/bench/mem-memset-x86-64-asm.S
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 + // memset_orig and memset_erms are being defined as SYM_L_LOCAL but we need it 3 + #define SYM_FUNC_START_LOCAL(name) \ 4 + SYM_START(name, SYM_L_GLOBAL, SYM_A_ALIGN) 2 5 #define memset MEMSET /* don't hide glibc's memset() */ 3 6 #define altinstr_replacement text 4 7 #define globl p2align 4; .globl
+1 -11
tools/perf/builtin-inject.c
··· 779 779 dsos__hit_all(session); 780 780 /* 781 781 * The AUX areas have been removed and replaced with 782 - * synthesized hardware events, so clear the feature flag and 783 - * remove the evsel. 782 + * synthesized hardware events, so clear the feature flag. 784 783 */ 785 784 if (inject->itrace_synth_opts.set) { 786 - struct evsel *evsel; 787 - 788 785 perf_header__clear_feat(&session->header, 789 786 HEADER_AUXTRACE); 790 787 if (inject->itrace_synth_opts.last_branch || 791 788 inject->itrace_synth_opts.add_last_branch) 792 789 perf_header__set_feat(&session->header, 793 790 HEADER_BRANCH_STACK); 794 - evsel = perf_evlist__id2evsel_strict(session->evlist, 795 - inject->aux_id); 796 - if (evsel) { 797 - pr_debug("Deleting %s\n", evsel__name(evsel)); 798 - evlist__remove(session->evlist, evsel); 799 - evsel__delete(evsel); 800 - } 801 791 } 802 792 session->header.data_offset = output_data_offset; 803 793 session->header.data_size = inject->bytes_written;
+2 -2
tools/perf/builtin-lock.c
··· 406 406 struct lock_seq_stat *seq; 407 407 const char *name = evsel__strval(evsel, sample, "name"); 408 408 u64 tmp = evsel__intval(evsel, sample, "lockdep_addr"); 409 - int flag = evsel__intval(evsel, sample, "flag"); 409 + int flag = evsel__intval(evsel, sample, "flags"); 410 410 411 411 memcpy(&addr, &tmp, sizeof(void *)); 412 412 ··· 621 621 case SEQ_STATE_READ_ACQUIRED: 622 622 seq->read_count--; 623 623 BUG_ON(seq->read_count < 0); 624 - if (!seq->read_count) { 624 + if (seq->read_count) { 625 625 ls->nr_release++; 626 626 goto end; 627 627 }
+2 -2
tools/perf/tests/shell/test_arm_coresight.sh
··· 44 44 # touch 6512 1 branches:u: ffffb22082e0 strcmp+0xa0 (/lib/aarch64-linux-gnu/ld-2.27.so) 45 45 # touch 6512 1 branches:u: ffffb2208320 strcmp+0xe0 (/lib/aarch64-linux-gnu/ld-2.27.so) 46 46 perf script -F,-time -i ${perfdata} | \ 47 - egrep " +$1 +[0-9]+ .* +branches:([u|k]:)? +" 47 + egrep " +$1 +[0-9]+ .* +branches:(.*:)? +" 48 48 } 49 49 50 50 perf_report_branch_samples() { ··· 105 105 # `> device_name = 'tmc_etf0' 106 106 device_name=$(basename $path) 107 107 108 - if is_device_sink $path $devce_name; then 108 + if is_device_sink $path $device_name; then 109 109 110 110 record_touch_file $device_name $2 && 111 111 perf_script_branch_samples touch &&
+7
tools/perf/util/include/linux/linkage.h
··· 25 25 26 26 /* SYM_L_* -- linkage of symbols */ 27 27 #define SYM_L_GLOBAL(name) .globl name 28 + #define SYM_L_WEAK(name) .weak name 28 29 #define SYM_L_LOCAL(name) /* nothing */ 29 30 30 31 #define ALIGN __ALIGN ··· 83 82 #ifndef SYM_FUNC_END_ALIAS 84 83 #define SYM_FUNC_END_ALIAS(name) \ 85 84 SYM_END(name, SYM_T_FUNC) 85 + #endif 86 + 87 + /* SYM_FUNC_START_WEAK -- use for weak functions */ 88 + #ifndef SYM_FUNC_START_WEAK 89 + #define SYM_FUNC_START_WEAK(name) \ 90 + SYM_START(name, SYM_L_WEAK, SYM_A_ALIGN) 86 91 #endif 87 92 88 93 /*
-1
tools/testing/kunit/.gitattributes
··· 1 - test_data/* binary
+13 -14
tools/testing/kunit/kunit.py
··· 11 11 import sys 12 12 import os 13 13 import time 14 - import shutil 15 14 16 15 from collections import namedtuple 17 16 from enum import Enum, auto ··· 43 44 BUILD_FAILURE = auto() 44 45 TEST_FAILURE = auto() 45 46 46 - def create_default_kunitconfig(): 47 - if not os.path.exists(kunit_kernel.kunitconfig_path): 48 - shutil.copyfile('arch/um/configs/kunit_defconfig', 49 - kunit_kernel.kunitconfig_path) 50 - 51 47 def get_kernel_root_path(): 52 48 parts = sys.argv[0] if not __file__ else __file__ 53 49 parts = os.path.realpath(parts).split('tools/testing/kunit') ··· 55 61 kunit_parser.print_with_timestamp('Configuring KUnit Kernel ...') 56 62 57 63 config_start = time.time() 58 - create_default_kunitconfig() 59 64 success = linux.build_reconfig(request.build_dir, request.make_options) 60 65 config_end = time.time() 61 66 if not success: ··· 255 262 if not os.path.exists(cli_args.build_dir): 256 263 os.mkdir(cli_args.build_dir) 257 264 258 - if not os.path.exists(kunit_kernel.kunitconfig_path): 259 - create_default_kunitconfig() 260 - 261 265 if not linux: 262 266 linux = kunit_kernel.LinuxSourceTree() 267 + 268 + linux.create_kunitconfig(cli_args.build_dir) 269 + linux.read_kunitconfig(cli_args.build_dir) 263 270 264 271 request = KunitRequest(cli_args.raw_output, 265 272 cli_args.timeout, ··· 276 283 not os.path.exists(cli_args.build_dir)): 277 284 os.mkdir(cli_args.build_dir) 278 285 279 - if not os.path.exists(kunit_kernel.kunitconfig_path): 280 - create_default_kunitconfig() 281 - 282 286 if not linux: 283 287 linux = kunit_kernel.LinuxSourceTree() 288 + 289 + linux.create_kunitconfig(cli_args.build_dir) 290 + linux.read_kunitconfig(cli_args.build_dir) 284 291 285 292 request = KunitConfigRequest(cli_args.build_dir, 286 293 cli_args.make_options) ··· 293 300 elif cli_args.subcommand == 'build': 294 301 if not linux: 295 302 linux = kunit_kernel.LinuxSourceTree() 303 + 304 + linux.create_kunitconfig(cli_args.build_dir) 305 + linux.read_kunitconfig(cli_args.build_dir) 296 306 297 307 request = KunitBuildRequest(cli_args.jobs, 298 308 cli_args.build_dir, ··· 310 314 elif cli_args.subcommand == 'exec': 311 315 if not linux: 312 316 linux = kunit_kernel.LinuxSourceTree() 317 + 318 + linux.create_kunitconfig(cli_args.build_dir) 319 + linux.read_kunitconfig(cli_args.build_dir) 313 320 314 321 exec_request = KunitExecRequest(cli_args.timeout, 315 322 cli_args.build_dir, ··· 336 337 kunit_output = f.read().splitlines() 337 338 request = KunitParseRequest(cli_args.raw_output, 338 339 kunit_output, 339 - cli_args.build_dir, 340 + None, 340 341 cli_args.json) 341 342 result = parse_tests(request) 342 343 if result.status != KunitStatus.SUCCESS:
+39 -12
tools/testing/kunit/kunit_kernel.py
··· 6 6 # Author: Felix Guo <felixguoxiuping@gmail.com> 7 7 # Author: Brendan Higgins <brendanhiggins@google.com> 8 8 9 - 10 9 import logging 11 10 import subprocess 12 11 import os 12 + import shutil 13 13 import signal 14 14 15 15 from contextlib import ExitStack ··· 18 18 import kunit_parser 19 19 20 20 KCONFIG_PATH = '.config' 21 - kunitconfig_path = '.kunitconfig' 21 + KUNITCONFIG_PATH = '.kunitconfig' 22 + DEFAULT_KUNITCONFIG_PATH = 'arch/um/configs/kunit_defconfig' 22 23 BROKEN_ALLCONFIG_PATH = 'tools/testing/kunit/configs/broken_on_uml.config' 24 + OUTFILE_PATH = 'test.log' 23 25 24 26 class ConfigError(Exception): 25 27 """Represents an error trying to configure the Linux kernel.""" ··· 84 82 if build_dir: 85 83 command += ['O=' + build_dir] 86 84 try: 87 - subprocess.check_output(command, stderr=subprocess.STDOUT) 85 + proc = subprocess.Popen(command, 86 + stderr=subprocess.PIPE, 87 + stdout=subprocess.DEVNULL) 88 88 except OSError as e: 89 - raise BuildError('Could not call execute make: ' + str(e)) 90 - except subprocess.CalledProcessError as e: 91 - raise BuildError(e.output.decode()) 89 + raise BuildError('Could not call make command: ' + str(e)) 90 + _, stderr = proc.communicate() 91 + if proc.returncode != 0: 92 + raise BuildError(stderr.decode()) 93 + if stderr: # likely only due to build warnings 94 + print(stderr.decode()) 92 95 93 - def linux_bin(self, params, timeout, build_dir, outfile): 96 + def linux_bin(self, params, timeout, build_dir): 94 97 """Runs the Linux UML binary. Must be named 'linux'.""" 95 98 linux_bin = './linux' 96 99 if build_dir: 97 100 linux_bin = os.path.join(build_dir, 'linux') 101 + outfile = get_outfile_path(build_dir) 98 102 with open(outfile, 'w') as output: 99 103 process = subprocess.Popen([linux_bin] + params, 100 104 stdout=output, 101 105 stderr=subprocess.STDOUT) 102 106 process.wait(timeout) 103 - 104 107 105 108 def get_kconfig_path(build_dir): 106 109 kconfig_path = KCONFIG_PATH ··· 113 106 kconfig_path = os.path.join(build_dir, KCONFIG_PATH) 114 107 return kconfig_path 115 108 109 + def get_kunitconfig_path(build_dir): 110 + kunitconfig_path = KUNITCONFIG_PATH 111 + if build_dir: 112 + kunitconfig_path = os.path.join(build_dir, KUNITCONFIG_PATH) 113 + return kunitconfig_path 114 + 115 + def get_outfile_path(build_dir): 116 + outfile_path = OUTFILE_PATH 117 + if build_dir: 118 + outfile_path = os.path.join(build_dir, OUTFILE_PATH) 119 + return outfile_path 120 + 116 121 class LinuxSourceTree(object): 117 122 """Represents a Linux kernel source tree with KUnit tests.""" 118 123 119 124 def __init__(self): 120 - self._kconfig = kunit_config.Kconfig() 121 - self._kconfig.read_from_file(kunitconfig_path) 122 125 self._ops = LinuxSourceTreeOperations() 123 126 signal.signal(signal.SIGINT, self.signal_handler) 124 127 ··· 139 122 logging.error(e) 140 123 return False 141 124 return True 125 + 126 + def create_kunitconfig(self, build_dir, defconfig=DEFAULT_KUNITCONFIG_PATH): 127 + kunitconfig_path = get_kunitconfig_path(build_dir) 128 + if not os.path.exists(kunitconfig_path): 129 + shutil.copyfile(defconfig, kunitconfig_path) 130 + 131 + def read_kunitconfig(self, build_dir): 132 + kunitconfig_path = get_kunitconfig_path(build_dir) 133 + self._kconfig = kunit_config.Kconfig() 134 + self._kconfig.read_from_file(kunitconfig_path) 142 135 143 136 def validate_config(self, build_dir): 144 137 kconfig_path = get_kconfig_path(build_dir) ··· 205 178 206 179 def run_kernel(self, args=[], build_dir='', timeout=None): 207 180 args.extend(['mem=1G']) 208 - outfile = 'test.log' 209 - self._ops.linux_bin(args, timeout, build_dir, outfile) 181 + self._ops.linux_bin(args, timeout, build_dir) 182 + outfile = get_outfile_path(build_dir) 210 183 subprocess.call(['stty', 'sane']) 211 184 with open(outfile, 'r') as file: 212 185 for line in file:
+9 -8
tools/testing/kunit/kunit_parser.py
··· 12 12 from datetime import datetime 13 13 from enum import Enum, auto 14 14 from functools import reduce 15 - from typing import List 15 + from typing import List, Optional, Tuple 16 16 17 17 TestResult = namedtuple('TestResult', ['status','suites','log']) 18 18 ··· 54 54 def isolate_kunit_output(kernel_output): 55 55 started = False 56 56 for line in kernel_output: 57 + line = line.rstrip() # line always has a trailing \n 57 58 if kunit_start_re.search(line): 58 59 prefix_len = len(line.split('TAP version')[0]) 59 60 started = True ··· 66 65 67 66 def raw_output(kernel_output): 68 67 for line in kernel_output: 69 - print(line) 68 + print(line.rstrip()) 70 69 71 70 DIVIDER = '=' * 60 72 71 ··· 152 151 else: 153 152 return False 154 153 155 - def parse_test_case(lines: List[str]) -> TestCase: 154 + def parse_test_case(lines: List[str]) -> Optional[TestCase]: 156 155 test_case = TestCase() 157 156 save_non_diagnositic(lines, test_case) 158 157 while parse_diagnostic(lines, test_case): ··· 164 163 165 164 SUBTEST_HEADER = re.compile(r'^[\s]+# Subtest: (.*)$') 166 165 167 - def parse_subtest_header(lines: List[str]) -> str: 166 + def parse_subtest_header(lines: List[str]) -> Optional[str]: 168 167 consume_non_diagnositic(lines) 169 168 if not lines: 170 169 return None ··· 177 176 178 177 SUBTEST_PLAN = re.compile(r'[\s]+[0-9]+\.\.([0-9]+)') 179 178 180 - def parse_subtest_plan(lines: List[str]) -> int: 179 + def parse_subtest_plan(lines: List[str]) -> Optional[int]: 181 180 consume_non_diagnositic(lines) 182 181 match = SUBTEST_PLAN.match(lines[0]) 183 182 if match: ··· 231 230 max_test_case_status = bubble_up_errors(lambda x: x.status, test_suite.cases) 232 231 return max_status(max_test_case_status, test_suite.status) 233 232 234 - def parse_test_suite(lines: List[str], expected_suite_index: int) -> TestSuite: 233 + def parse_test_suite(lines: List[str], expected_suite_index: int) -> Optional[TestSuite]: 235 234 if not lines: 236 235 return None 237 236 consume_non_diagnositic(lines) ··· 272 271 273 272 TEST_PLAN = re.compile(r'[0-9]+\.\.([0-9]+)') 274 273 275 - def parse_test_plan(lines: List[str]) -> int: 274 + def parse_test_plan(lines: List[str]) -> Optional[int]: 276 275 consume_non_diagnositic(lines) 277 276 match = TEST_PLAN.match(lines[0]) 278 277 if match: ··· 311 310 else: 312 311 return TestResult(TestStatus.NO_TESTS, [], lines) 313 312 314 - def print_and_count_results(test_result: TestResult) -> None: 313 + def print_and_count_results(test_result: TestResult) -> Tuple[int, int, int]: 315 314 total_tests = 0 316 315 failed_tests = 0 317 316 crashed_tests = 0
+2 -2
tools/testing/kunit/kunit_tool_test.py
··· 102 102 'test_data/test_output_isolated_correctly.log') 103 103 file = open(log_path) 104 104 result = kunit_parser.isolate_kunit_output(file.readlines()) 105 - self.assertContains('TAP version 14\n', result) 105 + self.assertContains('TAP version 14', result) 106 106 self.assertContains(' # Subtest: example', result) 107 107 self.assertContains(' 1..2', result) 108 108 self.assertContains(' ok 1 - example_simple_test', result) ··· 115 115 'test_data/test_pound_sign.log') 116 116 with open(log_path) as file: 117 117 result = kunit_parser.isolate_kunit_output(file.readlines()) 118 - self.assertContains('TAP version 14\n', result) 118 + self.assertContains('TAP version 14', result) 119 119 self.assertContains(' # Subtest: kunit-resource-test', result) 120 120 self.assertContains(' 1..5', result) 121 121 self.assertContains(' ok 1 - kunit_resource_test_init_resources', result)
+1
tools/testing/scatterlist/linux/mm.h
··· 33 33 #define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1) 34 34 #define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask)) 35 35 #define ALIGN(x, a) __ALIGN_KERNEL((x), (a)) 36 + #define ALIGN_DOWN(x, a) __ALIGN_KERNEL((x) - ((a) - 1), (a)) 36 37 37 38 #define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE) 38 39
+2 -2
tools/testing/scatterlist/main.c
··· 52 52 { 53 53 const unsigned int sgmax = SCATTERLIST_MAX_SEGMENT; 54 54 struct test *test, tests[] = { 55 - { -EINVAL, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 }, 56 55 { -EINVAL, 1, pfn(0), PAGE_SIZE, 0, 1 }, 57 - { -EINVAL, 1, pfn(0), PAGE_SIZE, sgmax + 1, 1 }, 56 + { 0, 1, pfn(0), PAGE_SIZE, PAGE_SIZE + 1, 1 }, 57 + { 0, 1, pfn(0), PAGE_SIZE, sgmax + 1, 1 }, 58 58 { 0, 1, pfn(0), PAGE_SIZE, sgmax, 1 }, 59 59 { 0, 1, pfn(0), 1, sgmax, 1 }, 60 60 { 0, 2, pfn(0, 1), 2 * PAGE_SIZE, sgmax, 1 },
+71
tools/testing/selftests/bpf/prog_tests/probe_read_user_str.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + #include <test_progs.h> 3 + #include "test_probe_read_user_str.skel.h" 4 + 5 + static const char str1[] = "mestring"; 6 + static const char str2[] = "mestringalittlebigger"; 7 + static const char str3[] = "mestringblubblubblubblubblub"; 8 + 9 + static int test_one_str(struct test_probe_read_user_str *skel, const char *str, 10 + size_t len) 11 + { 12 + int err, duration = 0; 13 + char buf[256]; 14 + 15 + /* Ensure bytes after string are ones */ 16 + memset(buf, 1, sizeof(buf)); 17 + memcpy(buf, str, len); 18 + 19 + /* Give prog our userspace pointer */ 20 + skel->bss->user_ptr = buf; 21 + 22 + /* Trigger tracepoint */ 23 + usleep(1); 24 + 25 + /* Did helper fail? */ 26 + if (CHECK(skel->bss->ret < 0, "prog_ret", "prog returned: %ld\n", 27 + skel->bss->ret)) 28 + return 1; 29 + 30 + /* Check that string was copied correctly */ 31 + err = memcmp(skel->bss->buf, str, len); 32 + if (CHECK(err, "memcmp", "prog copied wrong string")) 33 + return 1; 34 + 35 + /* Now check that no extra trailing bytes were copied */ 36 + memset(buf, 0, sizeof(buf)); 37 + err = memcmp(skel->bss->buf + len, buf, sizeof(buf) - len); 38 + if (CHECK(err, "memcmp", "trailing bytes were not stripped")) 39 + return 1; 40 + 41 + return 0; 42 + } 43 + 44 + void test_probe_read_user_str(void) 45 + { 46 + struct test_probe_read_user_str *skel; 47 + int err, duration = 0; 48 + 49 + skel = test_probe_read_user_str__open_and_load(); 50 + if (CHECK(!skel, "test_probe_read_user_str__open_and_load", 51 + "skeleton open and load failed\n")) 52 + return; 53 + 54 + /* Give pid to bpf prog so it doesn't read from anyone else */ 55 + skel->bss->pid = getpid(); 56 + 57 + err = test_probe_read_user_str__attach(skel); 58 + if (CHECK(err, "test_probe_read_user_str__attach", 59 + "skeleton attach failed: %d\n", err)) 60 + goto out; 61 + 62 + if (test_one_str(skel, str1, sizeof(str1))) 63 + goto out; 64 + if (test_one_str(skel, str2, sizeof(str2))) 65 + goto out; 66 + if (test_one_str(skel, str3, sizeof(str3))) 67 + goto out; 68 + 69 + out: 70 + test_probe_read_user_str__destroy(skel); 71 + }
+2 -1
tools/testing/selftests/bpf/prog_tests/sockopt_multi.c
··· 138 138 */ 139 139 140 140 buf = 0x40; 141 - if (setsockopt(sock_fd, SOL_IP, IP_TOS, &buf, 1) < 0) { 141 + err = setsockopt(sock_fd, SOL_IP, IP_TOS, &buf, 1); 142 + if (err < 0) { 142 143 log_err("Failed to call setsockopt(IP_TOS)"); 143 144 goto detach; 144 145 }
+6
tools/testing/selftests/bpf/prog_tests/subprogs.c
··· 3 3 #include <test_progs.h> 4 4 #include <time.h> 5 5 #include "test_subprogs.skel.h" 6 + #include "test_subprogs_unused.skel.h" 6 7 7 8 static int duration; 8 9 9 10 void test_subprogs(void) 10 11 { 11 12 struct test_subprogs *skel; 13 + struct test_subprogs_unused *skel2; 12 14 int err; 13 15 14 16 skel = test_subprogs__open_and_load(); ··· 27 25 CHECK(skel->bss->res2 != 17, "res2", "got %d, exp %d\n", skel->bss->res2, 17); 28 26 CHECK(skel->bss->res3 != 19, "res3", "got %d, exp %d\n", skel->bss->res3, 19); 29 27 CHECK(skel->bss->res4 != 36, "res4", "got %d, exp %d\n", skel->bss->res4, 36); 28 + 29 + skel2 = test_subprogs_unused__open_and_load(); 30 + ASSERT_OK_PTR(skel2, "unused_progs_skel"); 31 + test_subprogs_unused__destroy(skel2); 30 32 31 33 cleanup: 32 34 test_subprogs__destroy(skel);
+1
tools/testing/selftests/bpf/prog_tests/test_global_funcs.c
··· 60 60 { "test_global_func5.o" , "expected pointer to ctx, but got PTR" }, 61 61 { "test_global_func6.o" , "modified ctx ptr R2" }, 62 62 { "test_global_func7.o" , "foo() doesn't return scalar" }, 63 + { "test_global_func8.o" }, 63 64 }; 64 65 libbpf_print_fn_t old_print_fn = NULL; 65 66 int err, i, duration = 0;
+19
tools/testing/selftests/bpf/progs/test_global_func8.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* Copyright (c) 2020 Facebook */ 3 + #include <stddef.h> 4 + #include <linux/bpf.h> 5 + #include <bpf/bpf_helpers.h> 6 + 7 + __noinline int foo(struct __sk_buff *skb) 8 + { 9 + return bpf_get_prandom_u32(); 10 + } 11 + 12 + SEC("cgroup_skb/ingress") 13 + int test_cls(struct __sk_buff *skb) 14 + { 15 + if (!foo(skb)) 16 + return 0; 17 + 18 + return 1; 19 + }
+25
tools/testing/selftests/bpf/progs/test_probe_read_user_str.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + #include <linux/bpf.h> 4 + #include <bpf/bpf_helpers.h> 5 + #include <bpf/bpf_tracing.h> 6 + 7 + #include <sys/types.h> 8 + 9 + pid_t pid = 0; 10 + long ret = 0; 11 + void *user_ptr = 0; 12 + char buf[256] = {}; 13 + 14 + SEC("tracepoint/syscalls/sys_enter_nanosleep") 15 + int on_write(void *ctx) 16 + { 17 + if (pid != (bpf_get_current_pid_tgid() >> 32)) 18 + return 0; 19 + 20 + ret = bpf_probe_read_user_str(buf, sizeof(buf), user_ptr); 21 + 22 + return 0; 23 + } 24 + 25 + char _license[] SEC("license") = "GPL";
+21
tools/testing/selftests/bpf/progs/test_subprogs_unused.c
··· 1 + #include "vmlinux.h" 2 + #include <bpf/bpf_helpers.h> 3 + #include <bpf/bpf_core_read.h> 4 + 5 + const char LICENSE[] SEC("license") = "GPL"; 6 + 7 + __attribute__((unused)) __noinline int unused1(int x) 8 + { 9 + return x + 1; 10 + } 11 + 12 + static __attribute__((unused)) __noinline int unused2(int x) 13 + { 14 + return x + 2; 15 + } 16 + 17 + SEC("raw_tp/sys_enter") 18 + int main_prog(void *ctx) 19 + { 20 + return 0; 21 + }
+5
tools/testing/selftests/powerpc/include/utils.h
··· 42 42 int perf_event_disable(int fd); 43 43 int perf_event_reset(int fd); 44 44 45 + struct perf_event_read { 46 + __u64 nr; 47 + __u64 l1d_misses; 48 + }; 49 + 45 50 #if !defined(__GLIBC_PREREQ) || !__GLIBC_PREREQ(2, 30) 46 51 #include <unistd.h> 47 52 #include <sys/syscall.h>
+1
tools/testing/selftests/powerpc/security/.gitignore
··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 rfi_flush 3 + entry_flush
+3 -1
tools/testing/selftests/powerpc/security/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0+ 2 2 3 - TEST_GEN_PROGS := rfi_flush spectre_v2 3 + TEST_GEN_PROGS := rfi_flush entry_flush spectre_v2 4 4 top_srcdir = ../../../../.. 5 5 6 6 CFLAGS += -I../../../../../usr/include ··· 11 11 12 12 $(OUTPUT)/spectre_v2: CFLAGS += -m64 13 13 $(OUTPUT)/spectre_v2: ../pmu/event.c branch_loops.S 14 + $(OUTPUT)/rfi_flush: flush_utils.c 15 + $(OUTPUT)/entry_flush: flush_utils.c
+139
tools/testing/selftests/powerpc/security/entry_flush.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + 3 + /* 4 + * Copyright 2018 IBM Corporation. 5 + */ 6 + 7 + #define __SANE_USERSPACE_TYPES__ 8 + 9 + #include <sys/types.h> 10 + #include <stdint.h> 11 + #include <malloc.h> 12 + #include <unistd.h> 13 + #include <signal.h> 14 + #include <stdlib.h> 15 + #include <string.h> 16 + #include <stdio.h> 17 + #include "utils.h" 18 + #include "flush_utils.h" 19 + 20 + int entry_flush_test(void) 21 + { 22 + char *p; 23 + int repetitions = 10; 24 + int fd, passes = 0, iter, rc = 0; 25 + struct perf_event_read v; 26 + __u64 l1d_misses_total = 0; 27 + unsigned long iterations = 100000, zero_size = 24 * 1024; 28 + unsigned long l1d_misses_expected; 29 + int rfi_flush_orig; 30 + int entry_flush, entry_flush_orig; 31 + 32 + SKIP_IF(geteuid() != 0); 33 + 34 + // The PMU event we use only works on Power7 or later 35 + SKIP_IF(!have_hwcap(PPC_FEATURE_ARCH_2_06)); 36 + 37 + if (read_debugfs_file("powerpc/rfi_flush", &rfi_flush_orig) < 0) { 38 + perror("Unable to read powerpc/rfi_flush debugfs file"); 39 + SKIP_IF(1); 40 + } 41 + 42 + if (read_debugfs_file("powerpc/entry_flush", &entry_flush_orig) < 0) { 43 + perror("Unable to read powerpc/entry_flush debugfs file"); 44 + SKIP_IF(1); 45 + } 46 + 47 + if (rfi_flush_orig != 0) { 48 + if (write_debugfs_file("powerpc/rfi_flush", 0) < 0) { 49 + perror("error writing to powerpc/rfi_flush debugfs file"); 50 + FAIL_IF(1); 51 + } 52 + } 53 + 54 + entry_flush = entry_flush_orig; 55 + 56 + fd = perf_event_open_counter(PERF_TYPE_RAW, /* L1d miss */ 0x400f0, -1); 57 + FAIL_IF(fd < 0); 58 + 59 + p = (char *)memalign(zero_size, CACHELINE_SIZE); 60 + 61 + FAIL_IF(perf_event_enable(fd)); 62 + 63 + // disable L1 prefetching 64 + set_dscr(1); 65 + 66 + iter = repetitions; 67 + 68 + /* 69 + * We expect to see l1d miss for each cacheline access when entry_flush 70 + * is set. Allow a small variation on this. 71 + */ 72 + l1d_misses_expected = iterations * (zero_size / CACHELINE_SIZE - 2); 73 + 74 + again: 75 + FAIL_IF(perf_event_reset(fd)); 76 + 77 + syscall_loop(p, iterations, zero_size); 78 + 79 + FAIL_IF(read(fd, &v, sizeof(v)) != sizeof(v)); 80 + 81 + if (entry_flush && v.l1d_misses >= l1d_misses_expected) 82 + passes++; 83 + else if (!entry_flush && v.l1d_misses < (l1d_misses_expected / 2)) 84 + passes++; 85 + 86 + l1d_misses_total += v.l1d_misses; 87 + 88 + while (--iter) 89 + goto again; 90 + 91 + if (passes < repetitions) { 92 + printf("FAIL (L1D misses with entry_flush=%d: %llu %c %lu) [%d/%d failures]\n", 93 + entry_flush, l1d_misses_total, entry_flush ? '<' : '>', 94 + entry_flush ? repetitions * l1d_misses_expected : 95 + repetitions * l1d_misses_expected / 2, 96 + repetitions - passes, repetitions); 97 + rc = 1; 98 + } else { 99 + printf("PASS (L1D misses with entry_flush=%d: %llu %c %lu) [%d/%d pass]\n", 100 + entry_flush, l1d_misses_total, entry_flush ? '>' : '<', 101 + entry_flush ? repetitions * l1d_misses_expected : 102 + repetitions * l1d_misses_expected / 2, 103 + passes, repetitions); 104 + } 105 + 106 + if (entry_flush == entry_flush_orig) { 107 + entry_flush = !entry_flush_orig; 108 + if (write_debugfs_file("powerpc/entry_flush", entry_flush) < 0) { 109 + perror("error writing to powerpc/entry_flush debugfs file"); 110 + return 1; 111 + } 112 + iter = repetitions; 113 + l1d_misses_total = 0; 114 + passes = 0; 115 + goto again; 116 + } 117 + 118 + perf_event_disable(fd); 119 + close(fd); 120 + 121 + set_dscr(0); 122 + 123 + if (write_debugfs_file("powerpc/rfi_flush", rfi_flush_orig) < 0) { 124 + perror("unable to restore original value of powerpc/rfi_flush debugfs file"); 125 + return 1; 126 + } 127 + 128 + if (write_debugfs_file("powerpc/entry_flush", entry_flush_orig) < 0) { 129 + perror("unable to restore original value of powerpc/entry_flush debugfs file"); 130 + return 1; 131 + } 132 + 133 + return rc; 134 + } 135 + 136 + int main(int argc, char *argv[]) 137 + { 138 + return test_harness(entry_flush_test, "entry_flush_test"); 139 + }
+70
tools/testing/selftests/powerpc/security/flush_utils.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + 3 + /* 4 + * Copyright 2018 IBM Corporation. 5 + */ 6 + 7 + #define __SANE_USERSPACE_TYPES__ 8 + 9 + #include <sys/types.h> 10 + #include <stdint.h> 11 + #include <unistd.h> 12 + #include <signal.h> 13 + #include <stdlib.h> 14 + #include <string.h> 15 + #include <stdio.h> 16 + #include "utils.h" 17 + #include "flush_utils.h" 18 + 19 + static inline __u64 load(void *addr) 20 + { 21 + __u64 tmp; 22 + 23 + asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr)); 24 + 25 + return tmp; 26 + } 27 + 28 + void syscall_loop(char *p, unsigned long iterations, 29 + unsigned long zero_size) 30 + { 31 + for (unsigned long i = 0; i < iterations; i++) { 32 + for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE) 33 + load(p + j); 34 + getppid(); 35 + } 36 + } 37 + 38 + static void sigill_handler(int signr, siginfo_t *info, void *unused) 39 + { 40 + static int warned; 41 + ucontext_t *ctx = (ucontext_t *)unused; 42 + unsigned long *pc = &UCONTEXT_NIA(ctx); 43 + 44 + /* mtspr 3,RS to check for move to DSCR below */ 45 + if ((*((unsigned int *)*pc) & 0xfc1fffff) == 0x7c0303a6) { 46 + if (!warned++) 47 + printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n"); 48 + *pc += 4; 49 + } else { 50 + printf("SIGILL at %p\n", pc); 51 + abort(); 52 + } 53 + } 54 + 55 + void set_dscr(unsigned long val) 56 + { 57 + static int init; 58 + struct sigaction sa; 59 + 60 + if (!init) { 61 + memset(&sa, 0, sizeof(sa)); 62 + sa.sa_sigaction = sigill_handler; 63 + sa.sa_flags = SA_SIGINFO; 64 + if (sigaction(SIGILL, &sa, NULL)) 65 + perror("sigill_handler"); 66 + init = 1; 67 + } 68 + 69 + asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR)); 70 + }
+17
tools/testing/selftests/powerpc/security/flush_utils.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 + 3 + /* 4 + * Copyright 2018 IBM Corporation. 5 + */ 6 + 7 + #ifndef _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H 8 + #define _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H 9 + 10 + #define CACHELINE_SIZE 128 11 + 12 + void syscall_loop(char *p, unsigned long iterations, 13 + unsigned long zero_size); 14 + 15 + void set_dscr(unsigned long val); 16 + 17 + #endif /* _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H */
+30 -66
tools/testing/selftests/powerpc/security/rfi_flush.c
··· 10 10 #include <stdint.h> 11 11 #include <malloc.h> 12 12 #include <unistd.h> 13 - #include <signal.h> 14 13 #include <stdlib.h> 15 14 #include <string.h> 16 15 #include <stdio.h> 17 16 #include "utils.h" 17 + #include "flush_utils.h" 18 18 19 - #define CACHELINE_SIZE 128 20 - 21 - struct perf_event_read { 22 - __u64 nr; 23 - __u64 l1d_misses; 24 - }; 25 - 26 - static inline __u64 load(void *addr) 27 - { 28 - __u64 tmp; 29 - 30 - asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr)); 31 - 32 - return tmp; 33 - } 34 - 35 - static void syscall_loop(char *p, unsigned long iterations, 36 - unsigned long zero_size) 37 - { 38 - for (unsigned long i = 0; i < iterations; i++) { 39 - for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE) 40 - load(p + j); 41 - getppid(); 42 - } 43 - } 44 - 45 - static void sigill_handler(int signr, siginfo_t *info, void *unused) 46 - { 47 - static int warned = 0; 48 - ucontext_t *ctx = (ucontext_t *)unused; 49 - unsigned long *pc = &UCONTEXT_NIA(ctx); 50 - 51 - /* mtspr 3,RS to check for move to DSCR below */ 52 - if ((*((unsigned int *)*pc) & 0xfc1fffff) == 0x7c0303a6) { 53 - if (!warned++) 54 - printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n"); 55 - *pc += 4; 56 - } else { 57 - printf("SIGILL at %p\n", pc); 58 - abort(); 59 - } 60 - } 61 - 62 - static void set_dscr(unsigned long val) 63 - { 64 - static int init = 0; 65 - struct sigaction sa; 66 - 67 - if (!init) { 68 - memset(&sa, 0, sizeof(sa)); 69 - sa.sa_sigaction = sigill_handler; 70 - sa.sa_flags = SA_SIGINFO; 71 - if (sigaction(SIGILL, &sa, NULL)) 72 - perror("sigill_handler"); 73 - init = 1; 74 - } 75 - 76 - asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR)); 77 - } 78 19 79 20 int rfi_flush_test(void) 80 21 { ··· 26 85 __u64 l1d_misses_total = 0; 27 86 unsigned long iterations = 100000, zero_size = 24 * 1024; 28 87 unsigned long l1d_misses_expected; 29 - int rfi_flush_org, rfi_flush; 88 + int rfi_flush_orig, rfi_flush; 89 + int have_entry_flush, entry_flush_orig; 30 90 31 91 SKIP_IF(geteuid() != 0); 32 92 33 93 // The PMU event we use only works on Power7 or later 34 94 SKIP_IF(!have_hwcap(PPC_FEATURE_ARCH_2_06)); 35 95 36 - if (read_debugfs_file("powerpc/rfi_flush", &rfi_flush_org)) { 96 + if (read_debugfs_file("powerpc/rfi_flush", &rfi_flush_orig) < 0) { 37 97 perror("Unable to read powerpc/rfi_flush debugfs file"); 38 98 SKIP_IF(1); 39 99 } 40 100 41 - rfi_flush = rfi_flush_org; 101 + if (read_debugfs_file("powerpc/entry_flush", &entry_flush_orig) < 0) { 102 + have_entry_flush = 0; 103 + } else { 104 + have_entry_flush = 1; 105 + 106 + if (entry_flush_orig != 0) { 107 + if (write_debugfs_file("powerpc/entry_flush", 0) < 0) { 108 + perror("error writing to powerpc/entry_flush debugfs file"); 109 + return 1; 110 + } 111 + } 112 + } 113 + 114 + rfi_flush = rfi_flush_orig; 42 115 43 116 fd = perf_event_open_counter(PERF_TYPE_RAW, /* L1d miss */ 0x400f0, -1); 44 117 FAIL_IF(fd < 0); ··· 61 106 62 107 FAIL_IF(perf_event_enable(fd)); 63 108 109 + // disable L1 prefetching 64 110 set_dscr(1); 65 111 66 112 iter = repetitions; ··· 103 147 repetitions * l1d_misses_expected / 2, 104 148 passes, repetitions); 105 149 106 - if (rfi_flush == rfi_flush_org) { 107 - rfi_flush = !rfi_flush_org; 150 + if (rfi_flush == rfi_flush_orig) { 151 + rfi_flush = !rfi_flush_orig; 108 152 if (write_debugfs_file("powerpc/rfi_flush", rfi_flush) < 0) { 109 153 perror("error writing to powerpc/rfi_flush debugfs file"); 110 154 return 1; ··· 120 164 121 165 set_dscr(0); 122 166 123 - if (write_debugfs_file("powerpc/rfi_flush", rfi_flush_org) < 0) { 167 + if (write_debugfs_file("powerpc/rfi_flush", rfi_flush_orig) < 0) { 124 168 perror("unable to restore original value of powerpc/rfi_flush debugfs file"); 125 169 return 1; 170 + } 171 + 172 + if (have_entry_flush) { 173 + if (write_debugfs_file("powerpc/entry_flush", entry_flush_orig) < 0) { 174 + perror("unable to restore original value of powerpc/entry_flush " 175 + "debugfs file"); 176 + return 1; 177 + } 126 178 } 127 179 128 180 return rc;