Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
crypto: hisilicon/sec - fix the CTR mode BD configuration
The CTR counter is 32bit rollover default on the BD.
But the NIST standard is 128bit rollover. it cause the
testing failed, so need to fix the BD configuration.
Signed-off-by: Kai Ye <yekai13@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
authored by
Kai Ye
and committed by
Herbert Xu
566f060f
5e340558
+10
-2
+6
drivers/crypto/hisilicon/sec2/sec_crypto.c
+6
drivers/crypto/hisilicon/sec2/sec_crypto.c
···
42
42
#define SEC_DE_OFFSET_V3 9
43
43
#define SEC_SCENE_OFFSET_V3 5
44
44
#define SEC_CKEY_OFFSET_V3 13
45
+
#define SEC_CTR_CNT_OFFSET 25
46
+
#define SEC_CTR_CNT_ROLLOVER 2
45
47
#define SEC_SRC_SGL_OFFSET_V3 11
46
48
#define SEC_DST_SGL_OFFSET_V3 14
47
49
#define SEC_CALG_OFFSET_V3 4
···
1304
1302
else
1305
1303
cipher = SEC_CIPHER_DEC;
1306
1304
sec_sqe3->c_icv_key |= cpu_to_le16(cipher);
1305
+
1306
+
/* Set the CTR counter mode is 128bit rollover */
1307
+
sec_sqe3->auth_mac_key = cpu_to_le32((u32)SEC_CTR_CNT_ROLLOVER <<
1308
+
SEC_CTR_CNT_OFFSET);
1307
1309
1308
1310
if (req->use_pbuf) {
1309
1311
bd_param |= SEC_PBUF << SEC_SRC_SGL_OFFSET_V3;
+4
-2
drivers/crypto/hisilicon/sec2/sec_crypto.h
+4
-2
drivers/crypto/hisilicon/sec2/sec_crypto.h
···
354
354
* akey_len: 9~14 bits
355
355
* a_alg: 15~20 bits
356
356
* key_sel: 21~24 bits
357
-
* updata_key: 25 bits
358
-
* reserved: 26~31 bits
357
+
* ctr_count_mode/sm4_xts: 25~26 bits
358
+
* sva_prefetch: 27 bits
359
+
* key_wrap_num: 28~30 bits
360
+
* update_key: 31 bits
359
361
*/
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__le32 auth_mac_key;
361
363
__le32 salt;