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drm/xe: use entry_dump callbacks for xe2+ PAT dumps

Move xe2+ PAT entry printing into the entry_dump op so platform
specific logic stays localized, simplifying future maintenance.

v2:
- Do not null xe->pat.ops for VFs.
- Skip PAT init and dump on VFs (-EOPNOTSUPP), avoiding NULL ops use.

v3:
- fixed typo

v4: (Matt)
- Switch xe2_dump() to use the new ops->entry_dump() vfunc.
- Remove xe3p_xpc_dump() and reuse the common xe2_dump() for Xe3p XPC.
- This also fixes Xe3p_HPM media PAT dumping by using the proper
non-MCR access for the PAT register range (bspec 76445).

Cc: Matt Roper <matthew.d.roper@intel.com>
Suggested-by: Brian Nguyen <brian3.nguyen@intel.com>
Signed-off-by: Xin Wang <x.wang@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20260130175349.2249033-1-x.wang@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

authored by

Xin Wang and committed by
Matt Roper 568d9d0d f89dbe14

+16 -51
+16 -51
drivers/gpu/drm/xe/xe_pat.c
··· 88 88 void (*program_media)(struct xe_gt *gt, const struct xe_pat_table_entry table[], 89 89 int n_entries); 90 90 int (*dump)(struct xe_gt *gt, struct drm_printer *p); 91 + void (*entry_dump)(struct drm_printer *p, const char *label, u32 pat, bool rsvd); 91 92 }; 92 93 93 94 static const struct xe_pat_table_entry xelp_pat_table[] = { ··· 459 458 pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); 460 459 461 460 xe_pat_index_label(label, sizeof(label), i); 462 - xe2_pat_entry_dump(p, label, pat, !xe->pat.table[i].valid); 461 + xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); 463 462 } 464 463 465 464 /* ··· 472 471 pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_PTA)); 473 472 474 473 drm_printf(p, "Page Table Access:\n"); 475 - xe2_pat_entry_dump(p, "PTA_MODE", pat, false); 474 + xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); 476 475 477 476 return 0; 478 477 } ··· 481 480 .program_graphics = program_pat_mcr, 482 481 .program_media = program_pat, 483 482 .dump = xe2_dump, 483 + .entry_dump = xe2_pat_entry_dump, 484 484 }; 485 - 486 - static int xe3p_xpc_dump(struct xe_gt *gt, struct drm_printer *p) 487 - { 488 - struct xe_device *xe = gt_to_xe(gt); 489 - u32 pat; 490 - int i; 491 - char label[PAT_LABEL_LEN]; 492 - 493 - CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT); 494 - if (!fw_ref.domains) 495 - return -ETIMEDOUT; 496 - 497 - drm_printf(p, "PAT table: (* = reserved entry)\n"); 498 - 499 - for (i = 0; i < xe->pat.n_entries; i++) { 500 - pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_INDEX(i))); 501 - 502 - xe_pat_index_label(label, sizeof(label), i); 503 - xe3p_xpc_pat_entry_dump(p, label, pat, !xe->pat.table[i].valid); 504 - } 505 - 506 - /* 507 - * Also print PTA_MODE, which describes how the hardware accesses 508 - * PPGTT entries. 509 - */ 510 - pat = xe_gt_mcr_unicast_read_any(gt, XE_REG_MCR(_PAT_PTA)); 511 - 512 - drm_printf(p, "Page Table Access:\n"); 513 - xe3p_xpc_pat_entry_dump(p, "PTA_MODE", pat, false); 514 - 515 - return 0; 516 - } 517 485 518 486 static const struct xe_pat_ops xe3p_xpc_pat_ops = { 519 487 .program_graphics = program_pat_mcr, 520 488 .program_media = program_pat, 521 - .dump = xe3p_xpc_dump, 489 + .dump = xe2_dump, 490 + .entry_dump = xe3p_xpc_pat_entry_dump, 522 491 }; 523 492 524 493 void xe_pat_init_early(struct xe_device *xe) ··· 571 600 GRAPHICS_VER(xe), GRAPHICS_VERx100(xe) % 100); 572 601 } 573 602 574 - /* VFs can't program nor dump PAT settings */ 575 - if (IS_SRIOV_VF(xe)) 576 - xe->pat.ops = NULL; 577 - 578 - xe_assert(xe, !xe->pat.ops || xe->pat.ops->dump); 579 - xe_assert(xe, !xe->pat.ops || xe->pat.ops->program_graphics); 580 - xe_assert(xe, !xe->pat.ops || MEDIA_VER(xe) < 13 || xe->pat.ops->program_media); 603 + xe_assert(xe, xe->pat.ops->dump); 604 + xe_assert(xe, xe->pat.ops->program_graphics); 605 + xe_assert(xe, MEDIA_VER(xe) < 13 || xe->pat.ops->program_media); 606 + xe_assert(xe, GRAPHICS_VER(xe) < 20 || xe->pat.ops->entry_dump); 581 607 } 582 608 583 609 void xe_pat_init(struct xe_gt *gt) 584 610 { 585 611 struct xe_device *xe = gt_to_xe(gt); 586 612 587 - if (!xe->pat.ops) 613 + if (IS_SRIOV_VF(xe)) 588 614 return; 589 615 590 616 if (xe_gt_is_media_type(gt)) ··· 601 633 { 602 634 struct xe_device *xe = gt_to_xe(gt); 603 635 604 - if (!xe->pat.ops) 636 + if (IS_SRIOV_VF(xe)) 605 637 return -EOPNOTSUPP; 606 638 607 639 return xe->pat.ops->dump(gt, p); ··· 626 658 for (u32 i = 0; i < xe->pat.n_entries; i++) { 627 659 u32 pat = xe->pat.table[i].value; 628 660 629 - if (GRAPHICS_VERx100(xe) == 3511) { 661 + if (GRAPHICS_VER(xe) >= 20) { 630 662 xe_pat_index_label(label, sizeof(label), i); 631 - xe3p_xpc_pat_entry_dump(p, label, pat, !xe->pat.table[i].valid); 632 - } else if (GRAPHICS_VER(xe) == 30 || GRAPHICS_VER(xe) == 20) { 633 - xe_pat_index_label(label, sizeof(label), i); 634 - xe2_pat_entry_dump(p, label, pat, !xe->pat.table[i].valid); 663 + xe->pat.ops->entry_dump(p, label, pat, !xe->pat.table[i].valid); 635 664 } else if (xe->info.platform == XE_METEORLAKE) { 636 665 xelpg_pat_entry_dump(p, i, pat); 637 666 } else if (xe->info.platform == XE_PVC) { ··· 644 679 u32 pat = xe->pat.pat_pta->value; 645 680 646 681 drm_printf(p, "Page Table Access:\n"); 647 - xe2_pat_entry_dump(p, "PTA_MODE", pat, false); 682 + xe->pat.ops->entry_dump(p, "PTA_MODE", pat, false); 648 683 } 649 684 650 685 if (xe->pat.pat_ats) { 651 686 u32 pat = xe->pat.pat_ats->value; 652 687 653 688 drm_printf(p, "PCIe ATS/PASID:\n"); 654 - xe2_pat_entry_dump(p, "PAT_ATS ", pat, false); 689 + xe->pat.ops->entry_dump(p, "PAT_ATS ", pat, false); 655 690 } 656 691 657 692 drm_printf(p, "Cache Level:\n");