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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
"A few clk driver fixes this time:

- Introduce protected-clock DT binding to fix breakage on qcom
sdm845-mtp boards where the qspi clks introduced this merge window
cause the firmware on those boards to take down the system if we
try to read the clk registers

- Fix a couple off-by-one errors found by Dan Carpenter

- Handle failure in zynq fixed factor clk driver to avoid using
uninitialized data"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: zynqmp: Off by one in zynqmp_is_valid_clock()
clk: mmp: Off by one in mmp_clk_add()
clk: mvebu: Off by one bugs in cp110_of_clk_get()
arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks
clk: qcom: Support 'protected-clocks' property
dt-bindings: clk: Introduce 'protected-clocks' property
clk: zynqmp: handle fixed factor param query error

+47 -4
+16
Documentation/devicetree/bindings/clock/clock-bindings.txt
··· 168 168 169 169 Configuration of common clocks, which affect multiple consumer devices can 170 170 be similarly specified in the clock provider node. 171 + 172 + ==Protected clocks== 173 + 174 + Some platforms or firmwares may not fully expose all the clocks to the OS, such 175 + as in situations where those clks are used by drivers running in ARM secure 176 + execution levels. Such a configuration can be specified in device tree with the 177 + protected-clocks property in the form of a clock specifier list. This property should 178 + only be specified in the node that is providing the clocks being protected: 179 + 180 + clock-controller@a000f000 { 181 + compatible = "vendor,clk95; 182 + reg = <0xa000f000 0x1000> 183 + #clocks-cells = <1>; 184 + ... 185 + protected-clocks = <UART3_CLK>, <SPI5_CLK>; 186 + };
+6
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
··· 343 343 }; 344 344 }; 345 345 346 + &gcc { 347 + protected-clocks = <GCC_QSPI_CORE_CLK>, 348 + <GCC_QSPI_CORE_CLK_SRC>, 349 + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; 350 + }; 351 + 346 352 &i2c10 { 347 353 status = "okay"; 348 354 clock-frequency = <400000>;
+1 -1
drivers/clk/mmp/clk.c
··· 183 183 pr_err("CLK %d has invalid pointer %p\n", id, clk); 184 184 return; 185 185 } 186 - if (id > unit->nr_clks) { 186 + if (id >= unit->nr_clks) { 187 187 pr_err("CLK %d is invalid\n", id); 188 188 return; 189 189 }
+2 -2
drivers/clk/mvebu/cp110-system-controller.c
··· 200 200 unsigned int idx = clkspec->args[1]; 201 201 202 202 if (type == CP110_CLK_TYPE_CORE) { 203 - if (idx > CP110_MAX_CORE_CLOCKS) 203 + if (idx >= CP110_MAX_CORE_CLOCKS) 204 204 return ERR_PTR(-EINVAL); 205 205 return clk_data->hws[idx]; 206 206 } else if (type == CP110_CLK_TYPE_GATABLE) { 207 - if (idx > CP110_MAX_GATABLE_CLOCKS) 207 + if (idx >= CP110_MAX_GATABLE_CLOCKS) 208 208 return ERR_PTR(-EINVAL); 209 209 return clk_data->hws[CP110_MAX_CORE_CLOCKS + idx]; 210 210 }
+18
drivers/clk/qcom/common.c
··· 191 191 } 192 192 EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk); 193 193 194 + /* Drop 'protected-clocks' from the list of clocks to register */ 195 + static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc) 196 + { 197 + struct device_node *np = dev->of_node; 198 + struct property *prop; 199 + const __be32 *p; 200 + u32 i; 201 + 202 + of_property_for_each_u32(np, "protected-clocks", prop, p, i) { 203 + if (i >= cc->num_rclks) 204 + continue; 205 + 206 + cc->rclks[i] = NULL; 207 + } 208 + } 209 + 194 210 static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec, 195 211 void *data) 196 212 { ··· 266 250 267 251 cc->rclks = rclks; 268 252 cc->num_rclks = num_clks; 253 + 254 + qcom_cc_drop_protected(dev, cc); 269 255 270 256 for (i = 0; i < num_clks; i++) { 271 257 if (!rclks[i])
+4 -1
drivers/clk/zynqmp/clkc.c
··· 128 128 */ 129 129 static inline int zynqmp_is_valid_clock(u32 clk_id) 130 130 { 131 - if (clk_id > clock_max_idx) 131 + if (clk_id >= clock_max_idx) 132 132 return -ENODEV; 133 133 134 134 return clock[clk_id].valid; ··· 279 279 qdata.arg1 = clk_id; 280 280 281 281 ret = eemi_ops->query_data(qdata, ret_payload); 282 + if (ret) 283 + return ERR_PTR(ret); 284 + 282 285 mult = ret_payload[1]; 283 286 div = ret_payload[2]; 284 287