tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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gpio: brcmstb: Utilize irqd_to_hwirq(d) instead of d->hwirq

Consistently use irqd_to_hwirq(d) which is the recommended helper to
fetch the hardware IRQ number from an irq_data structure. While at it,
update the brcmstb_gpio_set_imask() function signature to use the proper
type for the "hwirq" argument rather than "unsigned int".

Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20260204164333.1146039-2-florian.fainelli@broadcom.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

authored by

Florian Fainelli and committed by
Bartosz Golaszewski 5711ae6d 6de23f81

+6 -6
+6 -6
drivers/gpio/gpio-brcmstb.c
··· 96 96 } 97 97 98 98 static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank, 99 - unsigned int hwirq, bool enable) 99 + irq_hw_number_t hwirq, bool enable) 100 100 { 101 101 struct brcmstb_gpio_priv *priv = bank->parent_priv; 102 102 u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(hwirq, bank)); ··· 132 132 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 133 133 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); 134 134 135 - brcmstb_gpio_set_imask(bank, d->hwirq, false); 135 + brcmstb_gpio_set_imask(bank, irqd_to_hwirq(d), false); 136 136 } 137 137 138 138 static void brcmstb_gpio_irq_unmask(struct irq_data *d) ··· 140 140 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 141 141 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); 142 142 143 - brcmstb_gpio_set_imask(bank, d->hwirq, true); 143 + brcmstb_gpio_set_imask(bank, irqd_to_hwirq(d), true); 144 144 } 145 145 146 146 static void brcmstb_gpio_irq_ack(struct irq_data *d) ··· 148 148 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 149 149 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); 150 150 struct brcmstb_gpio_priv *priv = bank->parent_priv; 151 - u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank)); 151 + u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(irqd_to_hwirq(d), bank)); 152 152 153 153 gpio_generic_write_reg(&bank->chip, 154 154 priv->reg_base + GIO_STAT(bank->id), mask); ··· 159 159 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 160 160 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); 161 161 struct brcmstb_gpio_priv *priv = bank->parent_priv; 162 - u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank)); 162 + u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(irqd_to_hwirq(d), bank)); 163 163 u32 edge_insensitive, iedge_insensitive; 164 164 u32 edge_config, iedge_config; 165 165 u32 level, ilevel; ··· 236 236 struct gpio_chip *gc = irq_data_get_irq_chip_data(d); 237 237 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); 238 238 struct brcmstb_gpio_priv *priv = bank->parent_priv; 239 - u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank)); 239 + u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(irqd_to_hwirq(d), bank)); 240 240 241 241 /* 242 242 * Do not do anything specific for now, suspend/resume callbacks will