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dt-bindings: soc: Add new VN-X board description based on Versal NET

The Versal NET (Networked Adaptive Compute Acceleration Platform) from
AMD/Xilinx is a next-generation adaptive platform designed for high
performance computing, networking, and AI acceleration. It is part of the
Versal ACAP (Adaptive Compute Acceleration Platform) family.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e4486141cf9b1d36b03624cc73621b2e3bba894.1738657826.git.michal.simek@amd.com

authored by

Shubhrajyoti Datta and committed by
Michal Simek 573debf0 385a59e7

+9 -2
+9 -2
Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
··· 9 9 maintainers: 10 10 - Michal Simek <michal.simek@amd.com> 11 11 12 - description: | 13 - Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC 12 + description: 13 + AMD/Xilinx boards with ARM 32/64bits cores 14 14 15 15 properties: 16 16 $nodename: ··· 186 186 items: 187 187 - const: qemu,mbv 188 188 - const: amd,mbv 189 + 190 + - description: Xilinx Versal NET VN-X revA platform 191 + items: 192 + enum: 193 + - xlnx,versal-net-vnx-revA 194 + - xlnx,versal-net-vnx 195 + - xlnx,versal-net 189 196 190 197 additionalProperties: true 191 198