Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma
Pull rmda fixes from Doug Ledford.
"First round of -rc fixes.
Due to various issues, I've been away and couldn't send a pull request
for about three weeks. There were a number of -rc patches that built
up in the meantime (some where there already from the early -rc
stages). Obviously, there were way too many to send now, so I tried to
pare the list down to the more important patches for the -rc cycle.
Most of the code has had plenty of soak time at the various vendor's
testing setups, so I doubt there will be another -rc pull request this
cycle. I also tried to limit the patches to those with smaller
footprints, so even though a shortlog is longer than I would like, the
actual diffstat is mostly very small with the exception of just three
files that had more changes, and a couple files with pure removals.
Summary:
- Misc Intel hfi1 fixes
- Misc Mellanox mlx4, mlx5, and rxe fixes
- A couple cxgb4 fixes"
* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: (34 commits)
iw_cxgb4: invalidate the mr when posting a read_w_inv wr
iw_cxgb4: set *bad_wr for post_send/post_recv errors
IB/rxe: Update qp state for user query
IB/rxe: Clear queue buffer when modifying QP to reset
IB/rxe: Fix handling of erroneous WR
IB/rxe: Fix kernel panic in UDP tunnel with GRO and RX checksum
IB/mlx4: Fix create CQ error flow
IB/mlx4: Check gid_index return value
IB/mlx5: Fix NULL pointer dereference on debug print
IB/mlx5: Fix fatal error dispatching
IB/mlx5: Resolve soft lock on massive reg MRs
IB/mlx5: Use cache line size to select CQE stride
IB/mlx5: Validate requested RQT size
IB/mlx5: Fix memory leak in query device
IB/core: Avoid unsigned int overflow in sg_alloc_table
IB/core: Add missing check for addr_resolve callback return value
IB/core: Set routable RoCE gid type for ipv4/ipv6 networks
IB/cm: Mark stale CM id's whenever the mad agent was unregistered
IB/uverbs: Fix leak of XRC target QPs
IB/hfi1: Remove incorrect IS_ERR check
...
+391
-395
+9
-2
drivers/infiniband/core/addr.c
+9
-2
drivers/infiniband/core/addr.c
···
699
699
struct resolve_cb_context {
700
700
struct rdma_dev_addr *addr;
701
701
struct completion comp;
702
+
int status;
702
703
};
703
704
704
705
static void resolve_cb(int status, struct sockaddr *src_addr,
705
706
struct rdma_dev_addr *addr, void *context)
706
707
{
707
-
memcpy(((struct resolve_cb_context *)context)->addr, addr, sizeof(struct
708
-
rdma_dev_addr));
708
+
if (!status)
709
+
memcpy(((struct resolve_cb_context *)context)->addr,
710
+
addr, sizeof(struct rdma_dev_addr));
711
+
((struct resolve_cb_context *)context)->status = status;
709
712
complete(&((struct resolve_cb_context *)context)->comp);
710
713
}
711
714
···
745
742
return ret;
746
743
747
744
wait_for_completion(&ctx.comp);
745
+
746
+
ret = ctx.status;
747
+
if (ret)
748
+
return ret;
748
749
749
750
memcpy(dmac, dev_addr.dst_dev_addr, ETH_ALEN);
750
751
dev = dev_get_by_index(&init_net, dev_addr.bound_dev_if);
+110
-16
drivers/infiniband/core/cm.c
+110
-16
drivers/infiniband/core/cm.c
···
80
80
__be32 random_id_operand;
81
81
struct list_head timewait_list;
82
82
struct workqueue_struct *wq;
83
+
/* Sync on cm change port state */
84
+
spinlock_t state_lock;
83
85
} cm;
84
86
85
87
/* Counter indexes ordered by attribute ID */
···
163
161
struct ib_mad_agent *mad_agent;
164
162
struct kobject port_obj;
165
163
u8 port_num;
164
+
struct list_head cm_priv_prim_list;
165
+
struct list_head cm_priv_altr_list;
166
166
struct cm_counter_group counter_group[CM_COUNTER_GROUPS];
167
167
};
168
168
···
245
241
u8 service_timeout;
246
242
u8 target_ack_delay;
247
243
244
+
struct list_head prim_list;
245
+
struct list_head altr_list;
246
+
/* Indicates that the send port mad is registered and av is set */
247
+
int prim_send_port_not_ready;
248
+
int altr_send_port_not_ready;
249
+
248
250
struct list_head work_list;
249
251
atomic_t work_count;
250
252
};
···
269
259
struct ib_mad_agent *mad_agent;
270
260
struct ib_mad_send_buf *m;
271
261
struct ib_ah *ah;
262
+
struct cm_av *av;
263
+
unsigned long flags, flags2;
264
+
int ret = 0;
272
265
266
+
/* don't let the port to be released till the agent is down */
267
+
spin_lock_irqsave(&cm.state_lock, flags2);
268
+
spin_lock_irqsave(&cm.lock, flags);
269
+
if (!cm_id_priv->prim_send_port_not_ready)
270
+
av = &cm_id_priv->av;
271
+
else if (!cm_id_priv->altr_send_port_not_ready &&
272
+
(cm_id_priv->alt_av.port))
273
+
av = &cm_id_priv->alt_av;
274
+
else {
275
+
pr_info("%s: not valid CM id\n", __func__);
276
+
ret = -ENODEV;
277
+
spin_unlock_irqrestore(&cm.lock, flags);
278
+
goto out;
279
+
}
280
+
spin_unlock_irqrestore(&cm.lock, flags);
281
+
/* Make sure the port haven't released the mad yet */
273
282
mad_agent = cm_id_priv->av.port->mad_agent;
274
-
ah = ib_create_ah(mad_agent->qp->pd, &cm_id_priv->av.ah_attr);
275
-
if (IS_ERR(ah))
276
-
return PTR_ERR(ah);
283
+
if (!mad_agent) {
284
+
pr_info("%s: not a valid MAD agent\n", __func__);
285
+
ret = -ENODEV;
286
+
goto out;
287
+
}
288
+
ah = ib_create_ah(mad_agent->qp->pd, &av->ah_attr);
289
+
if (IS_ERR(ah)) {
290
+
ret = PTR_ERR(ah);
291
+
goto out;
292
+
}
277
293
278
294
m = ib_create_send_mad(mad_agent, cm_id_priv->id.remote_cm_qpn,
279
-
cm_id_priv->av.pkey_index,
295
+
av->pkey_index,
280
296
0, IB_MGMT_MAD_HDR, IB_MGMT_MAD_DATA,
281
297
GFP_ATOMIC,
282
298
IB_MGMT_BASE_VERSION);
283
299
if (IS_ERR(m)) {
284
300
ib_destroy_ah(ah);
285
-
return PTR_ERR(m);
301
+
ret = PTR_ERR(m);
302
+
goto out;
286
303
}
287
304
288
305
/* Timeout set by caller if response is expected. */
···
319
282
atomic_inc(&cm_id_priv->refcount);
320
283
m->context[0] = cm_id_priv;
321
284
*msg = m;
322
-
return 0;
285
+
286
+
out:
287
+
spin_unlock_irqrestore(&cm.state_lock, flags2);
288
+
return ret;
323
289
}
324
290
325
291
static int cm_alloc_response_msg(struct cm_port *port,
···
392
352
grh, &av->ah_attr);
393
353
}
394
354
395
-
static int cm_init_av_by_path(struct ib_sa_path_rec *path, struct cm_av *av)
355
+
static int cm_init_av_by_path(struct ib_sa_path_rec *path, struct cm_av *av,
356
+
struct cm_id_private *cm_id_priv)
396
357
{
397
358
struct cm_device *cm_dev;
398
359
struct cm_port *port = NULL;
···
428
387
&av->ah_attr);
429
388
av->timeout = path->packet_life_time + 1;
430
389
431
-
return 0;
390
+
spin_lock_irqsave(&cm.lock, flags);
391
+
if (&cm_id_priv->av == av)
392
+
list_add_tail(&cm_id_priv->prim_list, &port->cm_priv_prim_list);
393
+
else if (&cm_id_priv->alt_av == av)
394
+
list_add_tail(&cm_id_priv->altr_list, &port->cm_priv_altr_list);
395
+
else
396
+
ret = -EINVAL;
397
+
398
+
spin_unlock_irqrestore(&cm.lock, flags);
399
+
400
+
return ret;
432
401
}
433
402
434
403
static int cm_alloc_id(struct cm_id_private *cm_id_priv)
···
728
677
spin_lock_init(&cm_id_priv->lock);
729
678
init_completion(&cm_id_priv->comp);
730
679
INIT_LIST_HEAD(&cm_id_priv->work_list);
680
+
INIT_LIST_HEAD(&cm_id_priv->prim_list);
681
+
INIT_LIST_HEAD(&cm_id_priv->altr_list);
731
682
atomic_set(&cm_id_priv->work_count, -1);
732
683
atomic_set(&cm_id_priv->refcount, 1);
733
684
return &cm_id_priv->id;
···
944
891
spin_unlock_irq(&cm_id_priv->lock);
945
892
break;
946
893
}
894
+
895
+
spin_lock_irq(&cm.lock);
896
+
if (!list_empty(&cm_id_priv->altr_list) &&
897
+
(!cm_id_priv->altr_send_port_not_ready))
898
+
list_del(&cm_id_priv->altr_list);
899
+
if (!list_empty(&cm_id_priv->prim_list) &&
900
+
(!cm_id_priv->prim_send_port_not_ready))
901
+
list_del(&cm_id_priv->prim_list);
902
+
spin_unlock_irq(&cm.lock);
947
903
948
904
cm_free_id(cm_id->local_id);
949
905
cm_deref_id(cm_id_priv);
···
1254
1192
goto out;
1255
1193
}
1256
1194
1257
-
ret = cm_init_av_by_path(param->primary_path, &cm_id_priv->av);
1195
+
ret = cm_init_av_by_path(param->primary_path, &cm_id_priv->av,
1196
+
cm_id_priv);
1258
1197
if (ret)
1259
1198
goto error1;
1260
1199
if (param->alternate_path) {
1261
1200
ret = cm_init_av_by_path(param->alternate_path,
1262
-
&cm_id_priv->alt_av);
1201
+
&cm_id_priv->alt_av, cm_id_priv);
1263
1202
if (ret)
1264
1203
goto error1;
1265
1204
}
···
1716
1653
dev_put(gid_attr.ndev);
1717
1654
}
1718
1655
work->path[0].gid_type = gid_attr.gid_type;
1719
-
ret = cm_init_av_by_path(&work->path[0], &cm_id_priv->av);
1656
+
ret = cm_init_av_by_path(&work->path[0], &cm_id_priv->av,
1657
+
cm_id_priv);
1720
1658
}
1721
1659
if (ret) {
1722
1660
int err = ib_get_cached_gid(work->port->cm_dev->ib_device,
···
1736
1672
goto rejected;
1737
1673
}
1738
1674
if (req_msg->alt_local_lid) {
1739
-
ret = cm_init_av_by_path(&work->path[1], &cm_id_priv->alt_av);
1675
+
ret = cm_init_av_by_path(&work->path[1], &cm_id_priv->alt_av,
1676
+
cm_id_priv);
1740
1677
if (ret) {
1741
1678
ib_send_cm_rej(cm_id, IB_CM_REJ_INVALID_ALT_GID,
1742
1679
&work->path[0].sgid,
···
2792
2727
goto out;
2793
2728
}
2794
2729
2795
-
ret = cm_init_av_by_path(alternate_path, &cm_id_priv->alt_av);
2730
+
ret = cm_init_av_by_path(alternate_path, &cm_id_priv->alt_av,
2731
+
cm_id_priv);
2796
2732
if (ret)
2797
2733
goto out;
2798
2734
cm_id_priv->alt_av.timeout =
···
2905
2839
cm_init_av_for_response(work->port, work->mad_recv_wc->wc,
2906
2840
work->mad_recv_wc->recv_buf.grh,
2907
2841
&cm_id_priv->av);
2908
-
cm_init_av_by_path(param->alternate_path, &cm_id_priv->alt_av);
2842
+
cm_init_av_by_path(param->alternate_path, &cm_id_priv->alt_av,
2843
+
cm_id_priv);
2909
2844
ret = atomic_inc_and_test(&cm_id_priv->work_count);
2910
2845
if (!ret)
2911
2846
list_add_tail(&work->list, &cm_id_priv->work_list);
···
3098
3031
return -EINVAL;
3099
3032
3100
3033
cm_id_priv = container_of(cm_id, struct cm_id_private, id);
3101
-
ret = cm_init_av_by_path(param->path, &cm_id_priv->av);
3034
+
ret = cm_init_av_by_path(param->path, &cm_id_priv->av, cm_id_priv);
3102
3035
if (ret)
3103
3036
goto out;
3104
3037
···
3535
3468
static int cm_migrate(struct ib_cm_id *cm_id)
3536
3469
{
3537
3470
struct cm_id_private *cm_id_priv;
3471
+
struct cm_av tmp_av;
3538
3472
unsigned long flags;
3473
+
int tmp_send_port_not_ready;
3539
3474
int ret = 0;
3540
3475
3541
3476
cm_id_priv = container_of(cm_id, struct cm_id_private, id);
···
3546
3477
(cm_id->lap_state == IB_CM_LAP_UNINIT ||
3547
3478
cm_id->lap_state == IB_CM_LAP_IDLE)) {
3548
3479
cm_id->lap_state = IB_CM_LAP_IDLE;
3480
+
/* Swap address vector */
3481
+
tmp_av = cm_id_priv->av;
3549
3482
cm_id_priv->av = cm_id_priv->alt_av;
3483
+
cm_id_priv->alt_av = tmp_av;
3484
+
/* Swap port send ready state */
3485
+
tmp_send_port_not_ready = cm_id_priv->prim_send_port_not_ready;
3486
+
cm_id_priv->prim_send_port_not_ready = cm_id_priv->altr_send_port_not_ready;
3487
+
cm_id_priv->altr_send_port_not_ready = tmp_send_port_not_ready;
3550
3488
} else
3551
3489
ret = -EINVAL;
3552
3490
spin_unlock_irqrestore(&cm_id_priv->lock, flags);
···
3964
3888
port->cm_dev = cm_dev;
3965
3889
port->port_num = i;
3966
3890
3891
+
INIT_LIST_HEAD(&port->cm_priv_prim_list);
3892
+
INIT_LIST_HEAD(&port->cm_priv_altr_list);
3893
+
3967
3894
ret = cm_create_port_fs(port);
3968
3895
if (ret)
3969
3896
goto error1;
···
4024
3945
{
4025
3946
struct cm_device *cm_dev = client_data;
4026
3947
struct cm_port *port;
3948
+
struct cm_id_private *cm_id_priv;
3949
+
struct ib_mad_agent *cur_mad_agent;
4027
3950
struct ib_port_modify port_modify = {
4028
3951
.clr_port_cap_mask = IB_PORT_CM_SUP
4029
3952
};
···
4049
3968
4050
3969
port = cm_dev->port[i-1];
4051
3970
ib_modify_port(ib_device, port->port_num, 0, &port_modify);
3971
+
/* Mark all the cm_id's as not valid */
3972
+
spin_lock_irq(&cm.lock);
3973
+
list_for_each_entry(cm_id_priv, &port->cm_priv_altr_list, altr_list)
3974
+
cm_id_priv->altr_send_port_not_ready = 1;
3975
+
list_for_each_entry(cm_id_priv, &port->cm_priv_prim_list, prim_list)
3976
+
cm_id_priv->prim_send_port_not_ready = 1;
3977
+
spin_unlock_irq(&cm.lock);
4052
3978
/*
4053
3979
* We flush the queue here after the going_down set, this
4054
3980
* verify that no new works will be queued in the recv handler,
4055
3981
* after that we can call the unregister_mad_agent
4056
3982
*/
4057
3983
flush_workqueue(cm.wq);
4058
-
ib_unregister_mad_agent(port->mad_agent);
3984
+
spin_lock_irq(&cm.state_lock);
3985
+
cur_mad_agent = port->mad_agent;
3986
+
port->mad_agent = NULL;
3987
+
spin_unlock_irq(&cm.state_lock);
3988
+
ib_unregister_mad_agent(cur_mad_agent);
4059
3989
cm_remove_port_fs(port);
4060
3990
}
3991
+
4061
3992
device_unregister(cm_dev->device);
4062
3993
kfree(cm_dev);
4063
3994
}
···
4082
3989
INIT_LIST_HEAD(&cm.device_list);
4083
3990
rwlock_init(&cm.device_lock);
4084
3991
spin_lock_init(&cm.lock);
3992
+
spin_lock_init(&cm.state_lock);
4085
3993
cm.listen_service_table = RB_ROOT;
4086
3994
cm.listen_service_id = be64_to_cpu(IB_CM_ASSIGN_SERVICE_ID);
4087
3995
cm.remote_id_table = RB_ROOT;
+20
-1
drivers/infiniband/core/cma.c
+20
-1
drivers/infiniband/core/cma.c
···
2438
2438
return 0;
2439
2439
}
2440
2440
2441
+
static enum ib_gid_type cma_route_gid_type(enum rdma_network_type network_type,
2442
+
unsigned long supported_gids,
2443
+
enum ib_gid_type default_gid)
2444
+
{
2445
+
if ((network_type == RDMA_NETWORK_IPV4 ||
2446
+
network_type == RDMA_NETWORK_IPV6) &&
2447
+
test_bit(IB_GID_TYPE_ROCE_UDP_ENCAP, &supported_gids))
2448
+
return IB_GID_TYPE_ROCE_UDP_ENCAP;
2449
+
2450
+
return default_gid;
2451
+
}
2452
+
2441
2453
static int cma_resolve_iboe_route(struct rdma_id_private *id_priv)
2442
2454
{
2443
2455
struct rdma_route *route = &id_priv->id.route;
···
2475
2463
route->num_paths = 1;
2476
2464
2477
2465
if (addr->dev_addr.bound_dev_if) {
2466
+
unsigned long supported_gids;
2467
+
2478
2468
ndev = dev_get_by_index(&init_net, addr->dev_addr.bound_dev_if);
2479
2469
if (!ndev) {
2480
2470
ret = -ENODEV;
···
2500
2486
2501
2487
route->path_rec->net = &init_net;
2502
2488
route->path_rec->ifindex = ndev->ifindex;
2503
-
route->path_rec->gid_type = id_priv->gid_type;
2489
+
supported_gids = roce_gid_type_mask_support(id_priv->id.device,
2490
+
id_priv->id.port_num);
2491
+
route->path_rec->gid_type =
2492
+
cma_route_gid_type(addr->dev_addr.network,
2493
+
supported_gids,
2494
+
id_priv->gid_type);
2504
2495
}
2505
2496
if (!ndev) {
2506
2497
ret = -ENODEV;
+1
-1
drivers/infiniband/core/umem.c
+1
-1
drivers/infiniband/core/umem.c
+2
-5
drivers/infiniband/core/uverbs_main.c
+2
-5
drivers/infiniband/core/uverbs_main.c
···
262
262
container_of(uobj, struct ib_uqp_object, uevent.uobject);
263
263
264
264
idr_remove_uobj(&ib_uverbs_qp_idr, uobj);
265
-
if (qp != qp->real_qp) {
266
-
ib_close_qp(qp);
267
-
} else {
265
+
if (qp == qp->real_qp)
268
266
ib_uverbs_detach_umcast(qp, uqp);
269
-
ib_destroy_qp(qp);
270
-
}
267
+
ib_destroy_qp(qp);
271
268
ib_uverbs_release_uevent(file, &uqp->uevent);
272
269
kfree(uqp);
273
270
}
+3
-14
drivers/infiniband/hw/cxgb4/cq.c
+3
-14
drivers/infiniband/hw/cxgb4/cq.c
···
666
666
return ret;
667
667
}
668
668
669
-
static void invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
670
-
{
671
-
struct c4iw_mr *mhp;
672
-
unsigned long flags;
673
-
674
-
spin_lock_irqsave(&rhp->lock, flags);
675
-
mhp = get_mhp(rhp, rkey >> 8);
676
-
if (mhp)
677
-
mhp->attr.state = 0;
678
-
spin_unlock_irqrestore(&rhp->lock, flags);
679
-
}
680
-
681
669
/*
682
670
* Get one cq entry from c4iw and map it to openib.
683
671
*
···
721
733
CQE_OPCODE(&cqe) == FW_RI_SEND_WITH_SE_INV) {
722
734
wc->ex.invalidate_rkey = CQE_WRID_STAG(&cqe);
723
735
wc->wc_flags |= IB_WC_WITH_INVALIDATE;
724
-
invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
736
+
c4iw_invalidate_mr(qhp->rhp, wc->ex.invalidate_rkey);
725
737
}
726
738
} else {
727
739
switch (CQE_OPCODE(&cqe)) {
···
750
762
751
763
/* Invalidate the MR if the fastreg failed */
752
764
if (CQE_STATUS(&cqe) != T4_ERR_SUCCESS)
753
-
invalidate_mr(qhp->rhp, CQE_WRID_FR_STAG(&cqe));
765
+
c4iw_invalidate_mr(qhp->rhp,
766
+
CQE_WRID_FR_STAG(&cqe));
754
767
break;
755
768
default:
756
769
printk(KERN_ERR MOD "Unexpected opcode %d "
+1
-1
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+1
-1
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+12
drivers/infiniband/hw/cxgb4/mem.c
+12
drivers/infiniband/hw/cxgb4/mem.c
···
770
770
kfree(mhp);
771
771
return 0;
772
772
}
773
+
774
+
void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey)
775
+
{
776
+
struct c4iw_mr *mhp;
777
+
unsigned long flags;
778
+
779
+
spin_lock_irqsave(&rhp->lock, flags);
780
+
mhp = get_mhp(rhp, rkey >> 8);
781
+
if (mhp)
782
+
mhp->attr.state = 0;
783
+
spin_unlock_irqrestore(&rhp->lock, flags);
784
+
}
+12
-8
drivers/infiniband/hw/cxgb4/qp.c
+12
-8
drivers/infiniband/hw/cxgb4/qp.c
···
706
706
return 0;
707
707
}
708
708
709
-
static int build_inv_stag(struct c4iw_dev *dev, union t4_wr *wqe,
710
-
struct ib_send_wr *wr, u8 *len16)
709
+
static int build_inv_stag(union t4_wr *wqe, struct ib_send_wr *wr, u8 *len16)
711
710
{
712
-
struct c4iw_mr *mhp = get_mhp(dev, wr->ex.invalidate_rkey >> 8);
713
-
714
-
mhp->attr.state = 0;
715
711
wqe->inv.stag_inv = cpu_to_be32(wr->ex.invalidate_rkey);
716
712
wqe->inv.r2 = 0;
717
713
*len16 = DIV_ROUND_UP(sizeof wqe->inv, 16);
···
793
797
spin_lock_irqsave(&qhp->lock, flag);
794
798
if (t4_wq_in_error(&qhp->wq)) {
795
799
spin_unlock_irqrestore(&qhp->lock, flag);
800
+
*bad_wr = wr;
796
801
return -EINVAL;
797
802
}
798
803
num_wrs = t4_sq_avail(&qhp->wq);
799
804
if (num_wrs == 0) {
800
805
spin_unlock_irqrestore(&qhp->lock, flag);
806
+
*bad_wr = wr;
801
807
return -ENOMEM;
802
808
}
803
809
while (wr) {
···
838
840
case IB_WR_RDMA_READ_WITH_INV:
839
841
fw_opcode = FW_RI_RDMA_READ_WR;
840
842
swsqe->opcode = FW_RI_READ_REQ;
841
-
if (wr->opcode == IB_WR_RDMA_READ_WITH_INV)
843
+
if (wr->opcode == IB_WR_RDMA_READ_WITH_INV) {
844
+
c4iw_invalidate_mr(qhp->rhp,
845
+
wr->sg_list[0].lkey);
842
846
fw_flags = FW_RI_RDMA_READ_INVALIDATE;
843
-
else
847
+
} else {
844
848
fw_flags = 0;
849
+
}
845
850
err = build_rdma_read(wqe, wr, &len16);
846
851
if (err)
847
852
break;
···
877
876
fw_flags |= FW_RI_LOCAL_FENCE_FLAG;
878
877
fw_opcode = FW_RI_INV_LSTAG_WR;
879
878
swsqe->opcode = FW_RI_LOCAL_INV;
880
-
err = build_inv_stag(qhp->rhp, wqe, wr, &len16);
879
+
err = build_inv_stag(wqe, wr, &len16);
880
+
c4iw_invalidate_mr(qhp->rhp, wr->ex.invalidate_rkey);
881
881
break;
882
882
default:
883
883
PDBG("%s post of type=%d TBD!\n", __func__,
···
936
934
spin_lock_irqsave(&qhp->lock, flag);
937
935
if (t4_wq_in_error(&qhp->wq)) {
938
936
spin_unlock_irqrestore(&qhp->lock, flag);
937
+
*bad_wr = wr;
939
938
return -EINVAL;
940
939
}
941
940
num_wrs = t4_rq_avail(&qhp->wq);
942
941
if (num_wrs == 0) {
943
942
spin_unlock_irqrestore(&qhp->lock, flag);
943
+
*bad_wr = wr;
944
944
return -ENOMEM;
945
945
}
946
946
while (wr) {
-72
drivers/infiniband/hw/hfi1/affinity.c
-72
drivers/infiniband/hw/hfi1/affinity.c
···
775
775
}
776
776
mutex_unlock(&affinity->lock);
777
777
}
778
-
779
-
int hfi1_set_sdma_affinity(struct hfi1_devdata *dd, const char *buf,
780
-
size_t count)
781
-
{
782
-
struct hfi1_affinity_node *entry;
783
-
cpumask_var_t mask;
784
-
int ret, i;
785
-
786
-
mutex_lock(&node_affinity.lock);
787
-
entry = node_affinity_lookup(dd->node);
788
-
789
-
if (!entry) {
790
-
ret = -EINVAL;
791
-
goto unlock;
792
-
}
793
-
794
-
ret = zalloc_cpumask_var(&mask, GFP_KERNEL);
795
-
if (!ret) {
796
-
ret = -ENOMEM;
797
-
goto unlock;
798
-
}
799
-
800
-
ret = cpulist_parse(buf, mask);
801
-
if (ret)
802
-
goto out;
803
-
804
-
if (!cpumask_subset(mask, cpu_online_mask) || cpumask_empty(mask)) {
805
-
dd_dev_warn(dd, "Invalid CPU mask\n");
806
-
ret = -EINVAL;
807
-
goto out;
808
-
}
809
-
810
-
/* reset the SDMA interrupt affinity details */
811
-
init_cpu_mask_set(&entry->def_intr);
812
-
cpumask_copy(&entry->def_intr.mask, mask);
813
-
814
-
/* Reassign the affinity for each SDMA interrupt. */
815
-
for (i = 0; i < dd->num_msix_entries; i++) {
816
-
struct hfi1_msix_entry *msix;
817
-
818
-
msix = &dd->msix_entries[i];
819
-
if (msix->type != IRQ_SDMA)
820
-
continue;
821
-
822
-
ret = get_irq_affinity(dd, msix);
823
-
824
-
if (ret)
825
-
break;
826
-
}
827
-
out:
828
-
free_cpumask_var(mask);
829
-
unlock:
830
-
mutex_unlock(&node_affinity.lock);
831
-
return ret ? ret : strnlen(buf, PAGE_SIZE);
832
-
}
833
-
834
-
int hfi1_get_sdma_affinity(struct hfi1_devdata *dd, char *buf)
835
-
{
836
-
struct hfi1_affinity_node *entry;
837
-
838
-
mutex_lock(&node_affinity.lock);
839
-
entry = node_affinity_lookup(dd->node);
840
-
841
-
if (!entry) {
842
-
mutex_unlock(&node_affinity.lock);
843
-
return -EINVAL;
844
-
}
845
-
846
-
cpumap_print_to_pagebuf(true, buf, &entry->def_intr.mask);
847
-
mutex_unlock(&node_affinity.lock);
848
-
return strnlen(buf, PAGE_SIZE);
849
-
}
-4
drivers/infiniband/hw/hfi1/affinity.h
-4
drivers/infiniband/hw/hfi1/affinity.h
···
102
102
/* Release a CPU used by a user process. */
103
103
void hfi1_put_proc_affinity(int);
104
104
105
-
int hfi1_get_sdma_affinity(struct hfi1_devdata *dd, char *buf);
106
-
int hfi1_set_sdma_affinity(struct hfi1_devdata *dd, const char *buf,
107
-
size_t count);
108
-
109
105
struct hfi1_affinity_node {
110
106
int node;
111
107
struct cpu_mask_set def_intr;
+9
-18
drivers/infiniband/hw/hfi1/chip.c
+9
-18
drivers/infiniband/hw/hfi1/chip.c
···
6301
6301
/* leave shared count at zero for both global and VL15 */
6302
6302
write_global_credit(dd, vau, vl15buf, 0);
6303
6303
6304
-
/* We may need some credits for another VL when sending packets
6305
-
* with the snoop interface. Dividing it down the middle for VL15
6306
-
* and VL0 should suffice.
6307
-
*/
6308
-
if (unlikely(dd->hfi1_snoop.mode_flag == HFI1_PORT_SNOOP_MODE)) {
6309
-
write_csr(dd, SEND_CM_CREDIT_VL15, (u64)(vl15buf >> 1)
6310
-
<< SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT);
6311
-
write_csr(dd, SEND_CM_CREDIT_VL, (u64)(vl15buf >> 1)
6312
-
<< SEND_CM_CREDIT_VL_DEDICATED_LIMIT_VL_SHIFT);
6313
-
} else {
6314
-
write_csr(dd, SEND_CM_CREDIT_VL15, (u64)vl15buf
6315
-
<< SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT);
6316
-
}
6304
+
write_csr(dd, SEND_CM_CREDIT_VL15, (u64)vl15buf
6305
+
<< SEND_CM_CREDIT_VL15_DEDICATED_LIMIT_VL_SHIFT);
6317
6306
}
6318
6307
6319
6308
/*
···
9904
9915
u32 mask = ~((1U << ppd->lmc) - 1);
9905
9916
u64 c1 = read_csr(ppd->dd, DCC_CFG_PORT_CONFIG1);
9906
9917
9907
-
if (dd->hfi1_snoop.mode_flag)
9908
-
dd_dev_info(dd, "Set lid/lmc while snooping");
9909
-
9910
9918
c1 &= ~(DCC_CFG_PORT_CONFIG1_TARGET_DLID_SMASK
9911
9919
| DCC_CFG_PORT_CONFIG1_DLID_MASK_SMASK);
9912
9920
c1 |= ((ppd->lid & DCC_CFG_PORT_CONFIG1_TARGET_DLID_MASK)
···
12098
12112
mod_timer(&dd->synth_stats_timer, jiffies + HZ * SYNTH_CNT_TIME);
12099
12113
}
12100
12114
12101
-
#define C_MAX_NAME 13 /* 12 chars + one for /0 */
12115
+
#define C_MAX_NAME 16 /* 15 chars + one for /0 */
12102
12116
static int init_cntrs(struct hfi1_devdata *dd)
12103
12117
{
12104
12118
int i, rcv_ctxts, j;
···
14449
14463
* Any error printing is already done by the init code.
14450
14464
* On return, we have the chip mapped.
14451
14465
*/
14452
-
ret = hfi1_pcie_ddinit(dd, pdev, ent);
14466
+
ret = hfi1_pcie_ddinit(dd, pdev);
14453
14467
if (ret < 0)
14454
14468
goto bail_free;
14455
14469
···
14676
14690
ret = init_rcverr(dd);
14677
14691
if (ret)
14678
14692
goto bail_free_cntrs;
14693
+
14694
+
init_completion(&dd->user_comp);
14695
+
14696
+
/* The user refcount starts with one to inidicate an active device */
14697
+
atomic_set(&dd->user_refcount, 1);
14679
14698
14680
14699
goto bail;
14681
14700
+3
drivers/infiniband/hw/hfi1/chip.h
+3
drivers/infiniband/hw/hfi1/chip.h
···
320
320
/* DC_DC8051_CFG_MODE.GENERAL bits */
321
321
#define DISABLE_SELF_GUID_CHECK 0x2
322
322
323
+
/* Bad L2 frame error code */
324
+
#define BAD_L2_ERR 0x6
325
+
323
326
/*
324
327
* Eager buffer minimum and maximum sizes supported by the hardware.
325
328
* All power-of-two sizes in between are supported as well.
+26
-11
drivers/infiniband/hw/hfi1/driver.c
+26
-11
drivers/infiniband/hw/hfi1/driver.c
···
599
599
dd->rhf_offset;
600
600
struct rvt_qp *qp;
601
601
struct ib_header *hdr;
602
-
struct ib_other_headers *ohdr;
603
602
struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
604
603
u64 rhf = rhf_to_cpu(rhf_addr);
605
604
u32 etype = rhf_rcv_type(rhf), qpn, bth1;
···
614
615
if (etype != RHF_RCV_TYPE_IB)
615
616
goto next;
616
617
617
-
hdr = hfi1_get_msgheader(dd, rhf_addr);
618
+
packet->hdr = hfi1_get_msgheader(dd, rhf_addr);
619
+
hdr = packet->hdr;
618
620
619
621
lnh = be16_to_cpu(hdr->lrh[0]) & 3;
620
622
621
-
if (lnh == HFI1_LRH_BTH)
622
-
ohdr = &hdr->u.oth;
623
-
else if (lnh == HFI1_LRH_GRH)
624
-
ohdr = &hdr->u.l.oth;
625
-
else
623
+
if (lnh == HFI1_LRH_BTH) {
624
+
packet->ohdr = &hdr->u.oth;
625
+
} else if (lnh == HFI1_LRH_GRH) {
626
+
packet->ohdr = &hdr->u.l.oth;
627
+
packet->rcv_flags |= HFI1_HAS_GRH;
628
+
} else {
626
629
goto next; /* just in case */
630
+
}
627
631
628
-
bth1 = be32_to_cpu(ohdr->bth[1]);
632
+
bth1 = be32_to_cpu(packet->ohdr->bth[1]);
629
633
is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
630
634
631
635
if (!is_ecn)
···
648
646
649
647
/* turn off BECN, FECN */
650
648
bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
651
-
ohdr->bth[1] = cpu_to_be32(bth1);
649
+
packet->ohdr->bth[1] = cpu_to_be32(bth1);
652
650
next:
653
651
update_ps_mdata(&mdata, rcd);
654
652
}
···
1362
1360
1363
1361
int process_receive_bypass(struct hfi1_packet *packet)
1364
1362
{
1363
+
struct hfi1_devdata *dd = packet->rcd->dd;
1364
+
1365
1365
if (unlikely(rhf_err_flags(packet->rhf)))
1366
1366
handle_eflags(packet);
1367
1367
1368
-
dd_dev_err(packet->rcd->dd,
1368
+
dd_dev_err(dd,
1369
1369
"Bypass packets are not supported in normal operation. Dropping\n");
1370
-
incr_cntr64(&packet->rcd->dd->sw_rcv_bypass_packet_errors);
1370
+
incr_cntr64(&dd->sw_rcv_bypass_packet_errors);
1371
+
if (!(dd->err_info_rcvport.status_and_code & OPA_EI_STATUS_SMASK)) {
1372
+
u64 *flits = packet->ebuf;
1373
+
1374
+
if (flits && !(packet->rhf & RHF_LEN_ERR)) {
1375
+
dd->err_info_rcvport.packet_flit1 = flits[0];
1376
+
dd->err_info_rcvport.packet_flit2 =
1377
+
packet->tlen > sizeof(flits[0]) ? flits[1] : 0;
1378
+
}
1379
+
dd->err_info_rcvport.status_and_code |=
1380
+
(OPA_EI_STATUS_SMASK | BAD_L2_ERR);
1381
+
}
1371
1382
return RHF_RCV_CONTINUE;
1372
1383
}
1373
1384
+16
-3
drivers/infiniband/hw/hfi1/file_ops.c
+16
-3
drivers/infiniband/hw/hfi1/file_ops.c
···
172
172
struct hfi1_devdata,
173
173
user_cdev);
174
174
175
+
if (!atomic_inc_not_zero(&dd->user_refcount))
176
+
return -ENXIO;
177
+
175
178
/* Just take a ref now. Not all opens result in a context assign */
176
179
kobject_get(&dd->kobj);
177
180
···
186
183
fd->rec_cpu_num = -1; /* no cpu affinity by default */
187
184
fd->mm = current->mm;
188
185
atomic_inc(&fd->mm->mm_count);
186
+
fp->private_data = fd;
187
+
} else {
188
+
fp->private_data = NULL;
189
+
190
+
if (atomic_dec_and_test(&dd->user_refcount))
191
+
complete(&dd->user_comp);
192
+
193
+
return -ENOMEM;
189
194
}
190
195
191
-
fp->private_data = fd;
192
-
193
-
return fd ? 0 : -ENOMEM;
196
+
return 0;
194
197
}
195
198
196
199
static long hfi1_file_ioctl(struct file *fp, unsigned int cmd,
···
807
798
done:
808
799
mmdrop(fdata->mm);
809
800
kobject_put(&dd->kobj);
801
+
802
+
if (atomic_dec_and_test(&dd->user_refcount))
803
+
complete(&dd->user_comp);
804
+
810
805
kfree(fdata);
811
806
return 0;
812
807
}
+34
-55
drivers/infiniband/hw/hfi1/hfi.h
+34
-55
drivers/infiniband/hw/hfi1/hfi.h
···
367
367
u8 etype;
368
368
};
369
369
370
-
/*
371
-
* Private data for snoop/capture support.
372
-
*/
373
-
struct hfi1_snoop_data {
374
-
int mode_flag;
375
-
struct cdev cdev;
376
-
struct device *class_dev;
377
-
/* protect snoop data */
378
-
spinlock_t snoop_lock;
379
-
struct list_head queue;
380
-
wait_queue_head_t waitq;
381
-
void *filter_value;
382
-
int (*filter_callback)(void *hdr, void *data, void *value);
383
-
u64 dcc_cfg; /* saved value of DCC Cfg register */
384
-
};
385
-
386
-
/* snoop mode_flag values */
387
-
#define HFI1_PORT_SNOOP_MODE 1U
388
-
#define HFI1_PORT_CAPTURE_MODE 2U
389
-
390
370
struct rvt_sge_state;
391
371
392
372
/*
···
592
612
/* host link state variables */
593
613
struct mutex hls_lock;
594
614
u32 host_link_state;
595
-
596
-
spinlock_t sdma_alllock ____cacheline_aligned_in_smp;
597
615
598
616
u32 lstate; /* logical link state */
599
617
···
1082
1104
char *portcntrnames;
1083
1105
size_t portcntrnameslen;
1084
1106
1085
-
struct hfi1_snoop_data hfi1_snoop;
1086
-
1087
1107
struct err_info_rcvport err_info_rcvport;
1088
1108
struct err_info_constraint err_info_rcv_constraint;
1089
1109
struct err_info_constraint err_info_xmit_constraint;
···
1117
1141
rhf_rcv_function_ptr normal_rhf_rcv_functions[8];
1118
1142
1119
1143
/*
1120
-
* Handlers for outgoing data so that snoop/capture does not
1121
-
* have to have its hooks in the send path
1144
+
* Capability to have different send engines simply by changing a
1145
+
* pointer value.
1122
1146
*/
1123
1147
send_routine process_pio_send;
1124
1148
send_routine process_dma_send;
···
1150
1174
spinlock_t aspm_lock;
1151
1175
/* Number of verbs contexts which have disabled ASPM */
1152
1176
atomic_t aspm_disabled_cnt;
1177
+
/* Keeps track of user space clients */
1178
+
atomic_t user_refcount;
1179
+
/* Used to wait for outstanding user space clients before dev removal */
1180
+
struct completion user_comp;
1153
1181
1154
1182
struct hfi1_affinity *affinity;
1155
1183
struct rhashtable sdma_rht;
···
1201
1221
extern u32 hfi1_cpulist_count;
1202
1222
extern unsigned long *hfi1_cpulist;
1203
1223
1204
-
extern unsigned int snoop_drop_send;
1205
-
extern unsigned int snoop_force_capture;
1206
1224
int hfi1_init(struct hfi1_devdata *, int);
1207
1225
int hfi1_count_units(int *npresentp, int *nupp);
1208
1226
int hfi1_count_active_units(void);
···
1535
1557
void reset_link_credits(struct hfi1_devdata *dd);
1536
1558
void assign_remote_cm_au_table(struct hfi1_devdata *dd, u8 vcu);
1537
1559
1538
-
int snoop_recv_handler(struct hfi1_packet *packet);
1539
-
int snoop_send_dma_handler(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
1540
-
u64 pbc);
1541
-
int snoop_send_pio_handler(struct rvt_qp *qp, struct hfi1_pkt_state *ps,
1542
-
u64 pbc);
1543
-
void snoop_inline_pio_send(struct hfi1_devdata *dd, struct pio_buf *pbuf,
1544
-
u64 pbc, const void *from, size_t count);
1545
1560
int set_buffer_control(struct hfi1_pportdata *ppd, struct buffer_control *bc);
1546
1561
1547
1562
static inline struct hfi1_devdata *dd_from_ppd(struct hfi1_pportdata *ppd)
···
1734
1763
1735
1764
int hfi1_pcie_init(struct pci_dev *, const struct pci_device_id *);
1736
1765
void hfi1_pcie_cleanup(struct pci_dev *);
1737
-
int hfi1_pcie_ddinit(struct hfi1_devdata *, struct pci_dev *,
1738
-
const struct pci_device_id *);
1766
+
int hfi1_pcie_ddinit(struct hfi1_devdata *, struct pci_dev *);
1739
1767
void hfi1_pcie_ddcleanup(struct hfi1_devdata *);
1740
1768
void hfi1_pcie_flr(struct hfi1_devdata *);
1741
1769
int pcie_speeds(struct hfi1_devdata *);
···
1769
1799
int kdeth_process_eager(struct hfi1_packet *packet);
1770
1800
int process_receive_invalid(struct hfi1_packet *packet);
1771
1801
1772
-
extern rhf_rcv_function_ptr snoop_rhf_rcv_functions[8];
1773
-
1774
1802
void update_sge(struct rvt_sge_state *ss, u32 length);
1775
1803
1776
1804
/* global module parameter variables */
···
1795
1827
#define DRIVER_NAME "hfi1"
1796
1828
#define HFI1_USER_MINOR_BASE 0
1797
1829
#define HFI1_TRACE_MINOR 127
1798
-
#define HFI1_DIAGPKT_MINOR 128
1799
-
#define HFI1_DIAG_MINOR_BASE 129
1800
-
#define HFI1_SNOOP_CAPTURE_BASE 200
1801
1830
#define HFI1_NMINORS 255
1802
1831
1803
1832
#define PCI_VENDOR_ID_INTEL 0x8086
···
1813
1848
static inline u64 hfi1_pkt_default_send_ctxt_mask(struct hfi1_devdata *dd,
1814
1849
u16 ctxt_type)
1815
1850
{
1816
-
u64 base_sc_integrity =
1851
+
u64 base_sc_integrity;
1852
+
1853
+
/* No integrity checks if HFI1_CAP_NO_INTEGRITY is set */
1854
+
if (HFI1_CAP_IS_KSET(NO_INTEGRITY))
1855
+
return 0;
1856
+
1857
+
base_sc_integrity =
1817
1858
SEND_CTXT_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1818
1859
| SEND_CTXT_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1819
1860
| SEND_CTXT_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
···
1834
1863
| SEND_CTXT_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1835
1864
| SEND_CTXT_CHECK_ENABLE_CHECK_OPCODE_SMASK
1836
1865
| SEND_CTXT_CHECK_ENABLE_CHECK_SLID_SMASK
1837
-
| SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1838
1866
| SEND_CTXT_CHECK_ENABLE_CHECK_VL_SMASK
1839
1867
| SEND_CTXT_CHECK_ENABLE_CHECK_ENABLE_SMASK;
1840
1868
···
1842
1872
else
1843
1873
base_sc_integrity |= HFI1_PKT_KERNEL_SC_INTEGRITY;
1844
1874
1845
-
if (is_ax(dd))
1846
-
/* turn off send-side job key checks - A0 */
1847
-
return base_sc_integrity &
1848
-
~SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
1875
+
/* turn on send-side job key checks if !A0 */
1876
+
if (!is_ax(dd))
1877
+
base_sc_integrity |= SEND_CTXT_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
1878
+
1849
1879
return base_sc_integrity;
1850
1880
}
1851
1881
1852
1882
static inline u64 hfi1_pkt_base_sdma_integrity(struct hfi1_devdata *dd)
1853
1883
{
1854
-
u64 base_sdma_integrity =
1884
+
u64 base_sdma_integrity;
1885
+
1886
+
/* No integrity checks if HFI1_CAP_NO_INTEGRITY is set */
1887
+
if (HFI1_CAP_IS_KSET(NO_INTEGRITY))
1888
+
return 0;
1889
+
1890
+
base_sdma_integrity =
1855
1891
SEND_DMA_CHECK_ENABLE_DISALLOW_BYPASS_BAD_PKT_LEN_SMASK
1856
-
| SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK
1857
1892
| SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_BYPASS_PACKETS_SMASK
1858
1893
| SEND_DMA_CHECK_ENABLE_DISALLOW_TOO_LONG_IB_PACKETS_SMASK
1859
1894
| SEND_DMA_CHECK_ENABLE_DISALLOW_BAD_PKT_LEN_SMASK
···
1870
1895
| SEND_DMA_CHECK_ENABLE_CHECK_VL_MAPPING_SMASK
1871
1896
| SEND_DMA_CHECK_ENABLE_CHECK_OPCODE_SMASK
1872
1897
| SEND_DMA_CHECK_ENABLE_CHECK_SLID_SMASK
1873
-
| SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK
1874
1898
| SEND_DMA_CHECK_ENABLE_CHECK_VL_SMASK
1875
1899
| SEND_DMA_CHECK_ENABLE_CHECK_ENABLE_SMASK;
1876
1900
1877
-
if (is_ax(dd))
1878
-
/* turn off send-side job key checks - A0 */
1879
-
return base_sdma_integrity &
1880
-
~SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
1901
+
if (!HFI1_CAP_IS_KSET(STATIC_RATE_CTRL))
1902
+
base_sdma_integrity |=
1903
+
SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK;
1904
+
1905
+
/* turn on send-side job key checks if !A0 */
1906
+
if (!is_ax(dd))
1907
+
base_sdma_integrity |=
1908
+
SEND_DMA_CHECK_ENABLE_CHECK_JOB_KEY_SMASK;
1909
+
1881
1910
return base_sdma_integrity;
1882
1911
}
1883
1912
+64
-40
drivers/infiniband/hw/hfi1/init.c
+64
-40
drivers/infiniband/hw/hfi1/init.c
···
144
144
struct hfi1_ctxtdata *rcd;
145
145
146
146
ppd = dd->pport + (i % dd->num_pports);
147
+
148
+
/* dd->rcd[i] gets assigned inside the callee */
147
149
rcd = hfi1_create_ctxtdata(ppd, i, dd->node);
148
150
if (!rcd) {
149
151
dd_dev_err(dd,
···
171
169
if (!rcd->sc) {
172
170
dd_dev_err(dd,
173
171
"Unable to allocate kernel send context, failing\n");
174
-
dd->rcd[rcd->ctxt] = NULL;
175
-
hfi1_free_ctxtdata(dd, rcd);
176
172
goto nomem;
177
173
}
178
174
···
178
178
if (ret < 0) {
179
179
dd_dev_err(dd,
180
180
"Failed to setup kernel receive context, failing\n");
181
-
sc_free(rcd->sc);
182
-
dd->rcd[rcd->ctxt] = NULL;
183
-
hfi1_free_ctxtdata(dd, rcd);
184
181
ret = -EFAULT;
185
182
goto bail;
186
183
}
···
193
196
nomem:
194
197
ret = -ENOMEM;
195
198
bail:
199
+
if (dd->rcd) {
200
+
for (i = 0; i < dd->num_rcv_contexts; ++i)
201
+
hfi1_free_ctxtdata(dd, dd->rcd[i]);
202
+
}
196
203
kfree(dd->rcd);
197
204
dd->rcd = NULL;
198
205
return ret;
···
217
216
dd->num_rcv_contexts - dd->first_user_ctxt)
218
217
kctxt_ngroups = (dd->rcv_entries.nctxt_extra -
219
218
(dd->num_rcv_contexts - dd->first_user_ctxt));
220
-
rcd = kzalloc(sizeof(*rcd), GFP_KERNEL);
219
+
rcd = kzalloc_node(sizeof(*rcd), GFP_KERNEL, numa);
221
220
if (rcd) {
222
221
u32 rcvtids, max_entries;
223
222
···
262
261
}
263
262
rcd->eager_base = base * dd->rcv_entries.group_size;
264
263
265
-
/* Validate and initialize Rcv Hdr Q variables */
266
-
if (rcvhdrcnt % HDRQ_INCREMENT) {
267
-
dd_dev_err(dd,
268
-
"ctxt%u: header queue count %d must be divisible by %lu\n",
269
-
rcd->ctxt, rcvhdrcnt, HDRQ_INCREMENT);
270
-
goto bail;
271
-
}
272
264
rcd->rcvhdrq_cnt = rcvhdrcnt;
273
265
rcd->rcvhdrqentsize = hfi1_hdrq_entsize;
274
266
/*
···
500
506
INIT_WORK(&ppd->qsfp_info.qsfp_work, qsfp_event);
501
507
502
508
mutex_init(&ppd->hls_lock);
503
-
spin_lock_init(&ppd->sdma_alllock);
504
509
spin_lock_init(&ppd->qsfp_info.qsfp_lock);
505
510
506
511
ppd->qsfp_info.ppd = ppd;
···
1392
1399
hfi1_free_devdata(dd);
1393
1400
}
1394
1401
1402
+
static int init_validate_rcvhdrcnt(struct device *dev, uint thecnt)
1403
+
{
1404
+
if (thecnt <= HFI1_MIN_HDRQ_EGRBUF_CNT) {
1405
+
hfi1_early_err(dev, "Receive header queue count too small\n");
1406
+
return -EINVAL;
1407
+
}
1408
+
1409
+
if (thecnt > HFI1_MAX_HDRQ_EGRBUF_CNT) {
1410
+
hfi1_early_err(dev,
1411
+
"Receive header queue count cannot be greater than %u\n",
1412
+
HFI1_MAX_HDRQ_EGRBUF_CNT);
1413
+
return -EINVAL;
1414
+
}
1415
+
1416
+
if (thecnt % HDRQ_INCREMENT) {
1417
+
hfi1_early_err(dev, "Receive header queue count %d must be divisible by %lu\n",
1418
+
thecnt, HDRQ_INCREMENT);
1419
+
return -EINVAL;
1420
+
}
1421
+
1422
+
return 0;
1423
+
}
1424
+
1395
1425
static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1396
1426
{
1397
1427
int ret = 0, j, pidx, initfail;
1398
-
struct hfi1_devdata *dd = ERR_PTR(-EINVAL);
1428
+
struct hfi1_devdata *dd;
1399
1429
struct hfi1_pportdata *ppd;
1400
1430
1401
1431
/* First, lock the non-writable module parameters */
1402
1432
HFI1_CAP_LOCK();
1403
1433
1404
1434
/* Validate some global module parameters */
1405
-
if (rcvhdrcnt <= HFI1_MIN_HDRQ_EGRBUF_CNT) {
1406
-
hfi1_early_err(&pdev->dev, "Header queue count too small\n");
1407
-
ret = -EINVAL;
1435
+
ret = init_validate_rcvhdrcnt(&pdev->dev, rcvhdrcnt);
1436
+
if (ret)
1408
1437
goto bail;
1409
-
}
1410
-
if (rcvhdrcnt > HFI1_MAX_HDRQ_EGRBUF_CNT) {
1411
-
hfi1_early_err(&pdev->dev,
1412
-
"Receive header queue count cannot be greater than %u\n",
1413
-
HFI1_MAX_HDRQ_EGRBUF_CNT);
1414
-
ret = -EINVAL;
1415
-
goto bail;
1416
-
}
1438
+
1417
1439
/* use the encoding function as a sanitization check */
1418
1440
if (!encode_rcv_header_entry_size(hfi1_hdrq_entsize)) {
1419
1441
hfi1_early_err(&pdev->dev, "Invalid HdrQ Entry size %u\n",
···
1469
1461
if (ret)
1470
1462
goto bail;
1471
1463
1472
-
/*
1473
-
* Do device-specific initialization, function table setup, dd
1474
-
* allocation, etc.
1475
-
*/
1476
-
switch (ent->device) {
1477
-
case PCI_DEVICE_ID_INTEL0:
1478
-
case PCI_DEVICE_ID_INTEL1:
1479
-
dd = hfi1_init_dd(pdev, ent);
1480
-
break;
1481
-
default:
1464
+
if (!(ent->device == PCI_DEVICE_ID_INTEL0 ||
1465
+
ent->device == PCI_DEVICE_ID_INTEL1)) {
1482
1466
hfi1_early_err(&pdev->dev,
1483
1467
"Failing on unknown Intel deviceid 0x%x\n",
1484
1468
ent->device);
1485
1469
ret = -ENODEV;
1470
+
goto clean_bail;
1486
1471
}
1487
1472
1488
-
if (IS_ERR(dd))
1473
+
/*
1474
+
* Do device-specific initialization, function table setup, dd
1475
+
* allocation, etc.
1476
+
*/
1477
+
dd = hfi1_init_dd(pdev, ent);
1478
+
1479
+
if (IS_ERR(dd)) {
1489
1480
ret = PTR_ERR(dd);
1490
-
if (ret)
1491
1481
goto clean_bail; /* error already printed */
1482
+
}
1492
1483
1493
1484
ret = create_workqueues(dd);
1494
1485
if (ret)
···
1545
1538
return ret;
1546
1539
}
1547
1540
1541
+
static void wait_for_clients(struct hfi1_devdata *dd)
1542
+
{
1543
+
/*
1544
+
* Remove the device init value and complete the device if there is
1545
+
* no clients or wait for active clients to finish.
1546
+
*/
1547
+
if (atomic_dec_and_test(&dd->user_refcount))
1548
+
complete(&dd->user_comp);
1549
+
1550
+
wait_for_completion(&dd->user_comp);
1551
+
}
1552
+
1548
1553
static void remove_one(struct pci_dev *pdev)
1549
1554
{
1550
1555
struct hfi1_devdata *dd = pci_get_drvdata(pdev);
1551
1556
1552
1557
/* close debugfs files before ib unregister */
1553
1558
hfi1_dbg_ibdev_exit(&dd->verbs_dev);
1559
+
1560
+
/* remove the /dev hfi1 interface */
1561
+
hfi1_device_remove(dd);
1562
+
1563
+
/* wait for existing user space clients to finish */
1564
+
wait_for_clients(dd);
1565
+
1554
1566
/* unregister from IB core */
1555
1567
hfi1_unregister_ib_device(dd);
1556
1568
···
1583
1557
1584
1558
/* wait until all of our (qsfp) queue_work() calls complete */
1585
1559
flush_workqueue(ib_wq);
1586
-
1587
-
hfi1_device_remove(dd);
1588
1560
1589
1561
postinit_cleanup(dd);
1590
1562
}
+1
-2
drivers/infiniband/hw/hfi1/pcie.c
+1
-2
drivers/infiniband/hw/hfi1/pcie.c
···
157
157
* fields required to re-initialize after a chip reset, or for
158
158
* various other purposes
159
159
*/
160
-
int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev,
161
-
const struct pci_device_id *ent)
160
+
int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev)
162
161
{
163
162
unsigned long len;
164
163
resource_size_t addr;
+3
-10
drivers/infiniband/hw/hfi1/pio.c
+3
-10
drivers/infiniband/hw/hfi1/pio.c
···
668
668
void set_pio_integrity(struct send_context *sc)
669
669
{
670
670
struct hfi1_devdata *dd = sc->dd;
671
-
u64 reg = 0;
672
671
u32 hw_context = sc->hw_context;
673
672
int type = sc->type;
674
673
675
-
/*
676
-
* No integrity checks if HFI1_CAP_NO_INTEGRITY is set, or if
677
-
* we're snooping.
678
-
*/
679
-
if (likely(!HFI1_CAP_IS_KSET(NO_INTEGRITY)) &&
680
-
dd->hfi1_snoop.mode_flag != HFI1_PORT_SNOOP_MODE)
681
-
reg = hfi1_pkt_default_send_ctxt_mask(dd, type);
682
-
683
-
write_kctxt_csr(dd, hw_context, SC(CHECK_ENABLE), reg);
674
+
write_kctxt_csr(dd, hw_context,
675
+
SC(CHECK_ENABLE),
676
+
hfi1_pkt_default_send_ctxt_mask(dd, type));
684
677
}
685
678
686
679
static u32 get_buffers_allocated(struct send_context *sc)
+1
-1
drivers/infiniband/hw/hfi1/rc.c
+1
-1
drivers/infiniband/hw/hfi1/rc.c
+2
-17
drivers/infiniband/hw/hfi1/sdma.c
+2
-17
drivers/infiniband/hw/hfi1/sdma.c
···
2009
2009
write_sde_csr(sde, SD(ENG_ERR_CLEAR), reg);
2010
2010
}
2011
2011
2012
-
#define CLEAR_STATIC_RATE_CONTROL_SMASK(r) \
2013
-
(r &= ~SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK)
2014
-
2015
-
#define SET_STATIC_RATE_CONTROL_SMASK(r) \
2016
-
(r |= SEND_DMA_CHECK_ENABLE_DISALLOW_PBC_STATIC_RATE_CONTROL_SMASK)
2017
2012
/*
2018
2013
* set_sdma_integrity
2019
2014
*
···
2017
2022
static void set_sdma_integrity(struct sdma_engine *sde)
2018
2023
{
2019
2024
struct hfi1_devdata *dd = sde->dd;
2020
-
u64 reg;
2021
2025
2022
-
if (unlikely(HFI1_CAP_IS_KSET(NO_INTEGRITY)))
2023
-
return;
2024
-
2025
-
reg = hfi1_pkt_base_sdma_integrity(dd);
2026
-
2027
-
if (HFI1_CAP_IS_KSET(STATIC_RATE_CTRL))
2028
-
CLEAR_STATIC_RATE_CONTROL_SMASK(reg);
2029
-
else
2030
-
SET_STATIC_RATE_CONTROL_SMASK(reg);
2031
-
2032
-
write_sde_csr(sde, SD(CHECK_ENABLE), reg);
2026
+
write_sde_csr(sde, SD(CHECK_ENABLE),
2027
+
hfi1_pkt_base_sdma_integrity(dd));
2033
2028
}
2034
2029
2035
2030
static void init_sdma_regs(
-25
drivers/infiniband/hw/hfi1/sysfs.c
-25
drivers/infiniband/hw/hfi1/sysfs.c
···
49
49
#include "hfi.h"
50
50
#include "mad.h"
51
51
#include "trace.h"
52
-
#include "affinity.h"
53
52
54
53
/*
55
54
* Start of per-port congestion control structures and support code
···
622
623
return ret;
623
624
}
624
625
625
-
static ssize_t show_sdma_affinity(struct device *device,
626
-
struct device_attribute *attr, char *buf)
627
-
{
628
-
struct hfi1_ibdev *dev =
629
-
container_of(device, struct hfi1_ibdev, rdi.ibdev.dev);
630
-
struct hfi1_devdata *dd = dd_from_dev(dev);
631
-
632
-
return hfi1_get_sdma_affinity(dd, buf);
633
-
}
634
-
635
-
static ssize_t store_sdma_affinity(struct device *device,
636
-
struct device_attribute *attr,
637
-
const char *buf, size_t count)
638
-
{
639
-
struct hfi1_ibdev *dev =
640
-
container_of(device, struct hfi1_ibdev, rdi.ibdev.dev);
641
-
struct hfi1_devdata *dd = dd_from_dev(dev);
642
-
643
-
return hfi1_set_sdma_affinity(dd, buf, count);
644
-
}
645
-
646
626
/*
647
627
* end of per-unit (or driver, in some cases, but replicated
648
628
* per unit) functions
···
636
658
static DEVICE_ATTR(boardversion, S_IRUGO, show_boardversion, NULL);
637
659
static DEVICE_ATTR(tempsense, S_IRUGO, show_tempsense, NULL);
638
660
static DEVICE_ATTR(chip_reset, S_IWUSR, NULL, store_chip_reset);
639
-
static DEVICE_ATTR(sdma_affinity, S_IWUSR | S_IRUGO, show_sdma_affinity,
640
-
store_sdma_affinity);
641
661
642
662
static struct device_attribute *hfi1_attributes[] = {
643
663
&dev_attr_hw_rev,
···
646
670
&dev_attr_boardversion,
647
671
&dev_attr_tempsense,
648
672
&dev_attr_chip_reset,
649
-
&dev_attr_sdma_affinity,
650
673
};
651
674
652
675
int hfi1_create_port_files(struct ib_device *ibdev, u8 port_num,
-60
drivers/infiniband/hw/hfi1/trace_rx.h
-60
drivers/infiniband/hw/hfi1/trace_rx.h
···
253
253
)
254
254
);
255
255
256
-
#define SNOOP_PRN \
257
-
"slid %.4x dlid %.4x qpn 0x%.6x opcode 0x%.2x,%s " \
258
-
"svc lvl %d pkey 0x%.4x [header = %d bytes] [data = %d bytes]"
259
-
260
-
TRACE_EVENT(snoop_capture,
261
-
TP_PROTO(struct hfi1_devdata *dd,
262
-
int hdr_len,
263
-
struct ib_header *hdr,
264
-
int data_len,
265
-
void *data),
266
-
TP_ARGS(dd, hdr_len, hdr, data_len, data),
267
-
TP_STRUCT__entry(
268
-
DD_DEV_ENTRY(dd)
269
-
__field(u16, slid)
270
-
__field(u16, dlid)
271
-
__field(u32, qpn)
272
-
__field(u8, opcode)
273
-
__field(u8, sl)
274
-
__field(u16, pkey)
275
-
__field(u32, hdr_len)
276
-
__field(u32, data_len)
277
-
__field(u8, lnh)
278
-
__dynamic_array(u8, raw_hdr, hdr_len)
279
-
__dynamic_array(u8, raw_pkt, data_len)
280
-
),
281
-
TP_fast_assign(
282
-
struct ib_other_headers *ohdr;
283
-
284
-
__entry->lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
285
-
if (__entry->lnh == HFI1_LRH_BTH)
286
-
ohdr = &hdr->u.oth;
287
-
else
288
-
ohdr = &hdr->u.l.oth;
289
-
DD_DEV_ASSIGN(dd);
290
-
__entry->slid = be16_to_cpu(hdr->lrh[3]);
291
-
__entry->dlid = be16_to_cpu(hdr->lrh[1]);
292
-
__entry->qpn = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
293
-
__entry->opcode = (be32_to_cpu(ohdr->bth[0]) >> 24) & 0xff;
294
-
__entry->sl = (u8)(be16_to_cpu(hdr->lrh[0]) >> 4) & 0xf;
295
-
__entry->pkey = be32_to_cpu(ohdr->bth[0]) & 0xffff;
296
-
__entry->hdr_len = hdr_len;
297
-
__entry->data_len = data_len;
298
-
memcpy(__get_dynamic_array(raw_hdr), hdr, hdr_len);
299
-
memcpy(__get_dynamic_array(raw_pkt), data, data_len);
300
-
),
301
-
TP_printk(
302
-
"[%s] " SNOOP_PRN,
303
-
__get_str(dev),
304
-
__entry->slid,
305
-
__entry->dlid,
306
-
__entry->qpn,
307
-
__entry->opcode,
308
-
show_ib_opcode(__entry->opcode),
309
-
__entry->sl,
310
-
__entry->pkey,
311
-
__entry->hdr_len,
312
-
__entry->data_len
313
-
)
314
-
);
315
-
316
256
#endif /* __HFI1_TRACE_RX_H */
317
257
318
258
#undef TRACE_INCLUDE_PATH
+1
-1
drivers/infiniband/hw/hfi1/user_sdma.c
+1
-1
drivers/infiniband/hw/hfi1/user_sdma.c
···
1144
1144
rb_node = hfi1_mmu_rb_extract(pq->handler,
1145
1145
(unsigned long)iovec->iov.iov_base,
1146
1146
iovec->iov.iov_len);
1147
-
if (rb_node && !IS_ERR(rb_node))
1147
+
if (rb_node)
1148
1148
node = container_of(rb_node, struct sdma_mmu_node, rb);
1149
1149
else
1150
1150
rb_node = NULL;
+4
-1
drivers/infiniband/hw/mlx4/ah.c
+4
-1
drivers/infiniband/hw/mlx4/ah.c
···
102
102
if (vlan_tag < 0x1000)
103
103
vlan_tag |= (ah_attr->sl & 7) << 13;
104
104
ah->av.eth.port_pd = cpu_to_be32(to_mpd(pd)->pdn | (ah_attr->port_num << 24));
105
-
ah->av.eth.gid_index = mlx4_ib_gid_index_to_real_index(ibdev, ah_attr->port_num, ah_attr->grh.sgid_index);
105
+
ret = mlx4_ib_gid_index_to_real_index(ibdev, ah_attr->port_num, ah_attr->grh.sgid_index);
106
+
if (ret < 0)
107
+
return ERR_PTR(ret);
108
+
ah->av.eth.gid_index = ret;
106
109
ah->av.eth.vlan = cpu_to_be16(vlan_tag);
107
110
ah->av.eth.hop_limit = ah_attr->grh.hop_limit;
108
111
if (ah_attr->static_rate) {
+4
-1
drivers/infiniband/hw/mlx4/cq.c
+4
-1
drivers/infiniband/hw/mlx4/cq.c
···
253
253
if (context)
254
254
if (ib_copy_to_udata(udata, &cq->mcq.cqn, sizeof (__u32))) {
255
255
err = -EFAULT;
256
-
goto err_dbmap;
256
+
goto err_cq_free;
257
257
}
258
258
259
259
return &cq->ibcq;
260
+
261
+
err_cq_free:
262
+
mlx4_cq_free(dev->dev, &cq->mcq);
260
263
261
264
err_dbmap:
262
265
if (context)
+1
-2
drivers/infiniband/hw/mlx5/cq.c
+1
-2
drivers/infiniband/hw/mlx5/cq.c
···
932
932
if (err)
933
933
goto err_create;
934
934
} else {
935
-
/* for now choose 64 bytes till we have a proper interface */
936
-
cqe_size = 64;
935
+
cqe_size = cache_line_size() == 128 ? 128 : 64;
937
936
err = create_cq_kernel(dev, cq, entries, cqe_size, &cqb,
938
937
&index, &inlen);
939
938
if (err)
+7
-4
drivers/infiniband/hw/mlx5/main.c
+7
-4
drivers/infiniband/hw/mlx5/main.c
···
2311
2311
{
2312
2312
struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context;
2313
2313
struct ib_event ibev;
2314
-
2314
+
bool fatal = false;
2315
2315
u8 port = 0;
2316
2316
2317
2317
switch (event) {
2318
2318
case MLX5_DEV_EVENT_SYS_ERROR:
2319
-
ibdev->ib_active = false;
2320
2319
ibev.event = IB_EVENT_DEVICE_FATAL;
2321
2320
mlx5_ib_handle_internal_error(ibdev);
2321
+
fatal = true;
2322
2322
break;
2323
2323
2324
2324
case MLX5_DEV_EVENT_PORT_UP:
···
2370
2370
2371
2371
if (ibdev->ib_active)
2372
2372
ib_dispatch_event(&ibev);
2373
+
2374
+
if (fatal)
2375
+
ibdev->ib_active = false;
2373
2376
}
2374
2377
2375
2378
static void get_ext_port_caps(struct mlx5_ib_dev *dev)
···
3118
3115
}
3119
3116
err = init_node_data(dev);
3120
3117
if (err)
3121
-
goto err_dealloc;
3118
+
goto err_free_port;
3122
3119
3123
3120
mutex_init(&dev->flow_db.lock);
3124
3121
mutex_init(&dev->cap_mask_mutex);
···
3128
3125
if (ll == IB_LINK_LAYER_ETHERNET) {
3129
3126
err = mlx5_enable_roce(dev);
3130
3127
if (err)
3131
-
goto err_dealloc;
3128
+
goto err_free_port;
3132
3129
}
3133
3130
3134
3131
err = create_dev_resources(&dev->devr);
+2
drivers/infiniband/hw/mlx5/mlx5_ib.h
+2
drivers/infiniband/hw/mlx5/mlx5_ib.h
···
626
626
struct mlx5_ib_resources devr;
627
627
struct mlx5_mr_cache cache;
628
628
struct timer_list delay_timer;
629
+
/* Prevents soft lock on massive reg MRs */
630
+
struct mutex slow_path_mutex;
629
631
int fill_delay;
630
632
#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
631
633
struct ib_odp_caps odp_caps;
+5
-1
drivers/infiniband/hw/mlx5/mr.c
+5
-1
drivers/infiniband/hw/mlx5/mr.c
···
610
610
int err;
611
611
int i;
612
612
613
+
mutex_init(&dev->slow_path_mutex);
613
614
cache->wq = alloc_ordered_workqueue("mkey_cache", WQ_MEM_RECLAIM);
614
615
if (!cache->wq) {
615
616
mlx5_ib_warn(dev, "failed to create work queue\n");
···
1183
1182
goto error;
1184
1183
}
1185
1184
1186
-
if (!mr)
1185
+
if (!mr) {
1186
+
mutex_lock(&dev->slow_path_mutex);
1187
1187
mr = reg_create(NULL, pd, virt_addr, length, umem, ncont,
1188
1188
page_shift, access_flags);
1189
+
mutex_unlock(&dev->slow_path_mutex);
1190
+
}
1189
1191
1190
1192
if (IS_ERR(mr)) {
1191
1193
err = PTR_ERR(mr);
+10
-2
drivers/infiniband/hw/mlx5/qp.c
+10
-2
drivers/infiniband/hw/mlx5/qp.c
···
2051
2051
2052
2052
mlx5_ib_dbg(dev, "ib qpnum 0x%x, mlx qpn 0x%x, rcqn 0x%x, scqn 0x%x\n",
2053
2053
qp->ibqp.qp_num, qp->trans_qp.base.mqp.qpn,
2054
-
to_mcq(init_attr->recv_cq)->mcq.cqn,
2055
-
to_mcq(init_attr->send_cq)->mcq.cqn);
2054
+
init_attr->recv_cq ? to_mcq(init_attr->recv_cq)->mcq.cqn : -1,
2055
+
init_attr->send_cq ? to_mcq(init_attr->send_cq)->mcq.cqn : -1);
2056
2056
2057
2057
qp->trans_qp.xrcdn = xrcdn;
2058
2058
···
4813
4813
!ib_is_udata_cleared(udata, 0,
4814
4814
udata->inlen))
4815
4815
return ERR_PTR(-EOPNOTSUPP);
4816
+
4817
+
if (init_attr->log_ind_tbl_size >
4818
+
MLX5_CAP_GEN(dev->mdev, log_max_rqt_size)) {
4819
+
mlx5_ib_dbg(dev, "log_ind_tbl_size = %d is bigger than supported = %d\n",
4820
+
init_attr->log_ind_tbl_size,
4821
+
MLX5_CAP_GEN(dev->mdev, log_max_rqt_size));
4822
+
return ERR_PTR(-EINVAL);
4823
+
}
4816
4824
4817
4825
min_resp_len = offsetof(typeof(resp), reserved) + sizeof(resp.reserved);
4818
4826
if (udata->outlen && udata->outlen < min_resp_len)
-3
drivers/infiniband/sw/rdmavt/dma.c
-3
drivers/infiniband/sw/rdmavt/dma.c
+2
-6
drivers/infiniband/sw/rxe/rxe_net.c
+2
-6
drivers/infiniband/sw/rxe/rxe_net.c
···
243
243
{
244
244
int err;
245
245
struct socket *sock;
246
-
struct udp_port_cfg udp_cfg;
247
-
struct udp_tunnel_sock_cfg tnl_cfg;
248
-
249
-
memset(&udp_cfg, 0, sizeof(udp_cfg));
246
+
struct udp_port_cfg udp_cfg = {0};
247
+
struct udp_tunnel_sock_cfg tnl_cfg = {0};
250
248
251
249
if (ipv6) {
252
250
udp_cfg.family = AF_INET6;
···
262
264
return ERR_PTR(err);
263
265
}
264
266
265
-
tnl_cfg.sk_user_data = NULL;
266
267
tnl_cfg.encap_type = 1;
267
268
tnl_cfg.encap_rcv = rxe_udp_encap_recv;
268
-
tnl_cfg.encap_destroy = NULL;
269
269
270
270
/* Setup UDP tunnel */
271
271
setup_udp_tunnel_sock(net, sock, &tnl_cfg);
+2
drivers/infiniband/sw/rxe/rxe_qp.c
+2
drivers/infiniband/sw/rxe/rxe_qp.c
···
522
522
if (qp->sq.queue) {
523
523
__rxe_do_task(&qp->comp.task);
524
524
__rxe_do_task(&qp->req.task);
525
+
rxe_queue_reset(qp->sq.queue);
525
526
}
526
527
527
528
/* cleanup attributes */
···
574
573
{
575
574
qp->req.state = QP_STATE_ERROR;
576
575
qp->resp.state = QP_STATE_ERROR;
576
+
qp->attr.qp_state = IB_QPS_ERR;
577
577
578
578
/* drain work and packet queues */
579
579
rxe_run_task(&qp->resp.task, 1);
+9
drivers/infiniband/sw/rxe/rxe_queue.c
+9
drivers/infiniband/sw/rxe/rxe_queue.c
···
84
84
return -EINVAL;
85
85
}
86
86
87
+
inline void rxe_queue_reset(struct rxe_queue *q)
88
+
{
89
+
/* queue is comprised from header and the memory
90
+
* of the actual queue. See "struct rxe_queue_buf" in rxe_queue.h
91
+
* reset only the queue itself and not the management header
92
+
*/
93
+
memset(q->buf->data, 0, q->buf_size - sizeof(struct rxe_queue_buf));
94
+
}
95
+
87
96
struct rxe_queue *rxe_queue_init(struct rxe_dev *rxe,
88
97
int *num_elem,
89
98
unsigned int elem_size)
+2
drivers/infiniband/sw/rxe/rxe_queue.h
+2
drivers/infiniband/sw/rxe/rxe_queue.h
+13
-8
drivers/infiniband/sw/rxe/rxe_req.c
+13
-8
drivers/infiniband/sw/rxe/rxe_req.c
···
696
696
qp->req.wqe_index);
697
697
wqe->state = wqe_state_done;
698
698
wqe->status = IB_WC_SUCCESS;
699
-
goto complete;
699
+
__rxe_do_task(&qp->comp.task);
700
+
return 0;
700
701
}
701
702
payload = mtu;
702
703
}
···
746
745
wqe->status = IB_WC_LOC_PROT_ERR;
747
746
wqe->state = wqe_state_error;
748
747
749
-
complete:
750
-
if (qp_type(qp) != IB_QPT_RC) {
751
-
while (rxe_completer(qp) == 0)
752
-
;
753
-
}
754
-
755
-
return 0;
748
+
/*
749
+
* IBA Spec. Section 10.7.3.1 SIGNALED COMPLETIONS
750
+
* ---------8<---------8<-------------
751
+
* ...Note that if a completion error occurs, a Work Completion
752
+
* will always be generated, even if the signaling
753
+
* indicator requests an Unsignaled Completion.
754
+
* ---------8<---------8<-------------
755
+
*/
756
+
wqe->wr.send_flags |= IB_SEND_SIGNALED;
757
+
__rxe_do_task(&qp->comp.task);
758
+
return -EAGAIN;
756
759
757
760
exit:
758
761
return -EAGAIN;