Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
For all other generations, we have been using just the QPHY prefix for
the PCS registers. Remove the _USB part of the QPHY_USB prefix.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230928105445.1210861-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Dmitry Baryshkov
and committed by
Vinod Koul
579483ec
9e34abc7
+39
-39
+19
-19
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+19
-19
drivers/phy/qualcomm/phy-qcom-qmp-combo.c
···
845
845
};
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static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
848
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
849
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
850
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
851
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
852
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
853
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RX_SIGDET_LVL, 0x99),
854
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
855
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
856
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_CDR_RESET_TIME, 0x0a),
857
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
858
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
859
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
860
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
861
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
848
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG1, 0xc4),
849
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG2, 0x89),
850
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG3, 0x20),
851
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_LOCK_DETECT_CONFIG6, 0x13),
852
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_REFGEN_REQ_CONFIG1, 0x21),
853
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_RX_SIGDET_LVL, 0x99),
854
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7),
855
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03),
856
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_CDR_RESET_TIME, 0x0a),
857
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG1, 0x88),
858
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_ALIGN_DETECT_CONFIG2, 0x13),
859
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
860
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG1, 0x4b),
861
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_EQ_CONFIG5, 0x10),
862
862
};
863
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static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
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-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
866
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
867
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
868
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
869
-
QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
865
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8),
866
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
867
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
868
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
869
+
QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
870
870
};
871
871
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872
static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
+20
-20
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
+20
-20
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
···
7
7
#define QCOM_PHY_QMP_PCS_USB_V6_H_
8
8
9
9
/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
10
-
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
11
-
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
12
-
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
13
-
#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
14
-
#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
15
-
#define QPHY_USB_V6_PCS_POWER_STATE_CONFIG1 0x90
16
-
#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
17
-
#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
18
-
#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
19
-
#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0
20
-
#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
21
-
#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
22
-
#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
23
-
#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
24
-
#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
10
+
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
11
+
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
12
+
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
13
+
#define QPHY_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
14
+
#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
15
+
#define QPHY_V6_PCS_POWER_STATE_CONFIG1 0x90
16
+
#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188
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+
#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
18
+
#define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
19
+
#define QPHY_V6_PCS_CDR_RESET_TIME 0x1b0
20
+
#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
21
+
#define QPHY_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
22
+
#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
23
+
#define QPHY_V6_PCS_EQ_CONFIG1 0x1dc
24
+
#define QPHY_V6_PCS_EQ_CONFIG5 0x1ec
25
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26
-
#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
27
-
#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
28
-
#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
29
-
#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
30
-
#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
26
+
#define QPHY_V6_PCS_USB3_POWER_STATE_CONFIG1 0x00
27
+
#define QPHY_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
28
+
#define QPHY_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
29
+
#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
30
+
#define QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
31
31
32
32
#endif