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dt-bindings: dma: fsl-edma: add nxp,s32g2-edma compatible string

Introduce the compatible strings 'nxp,s32g2-edma' and 'nxp,s32g3-edma' to
enable the support for the eDMAv3 present on S32G2/S32G3 platforms.

The S32G2/S32G3 eDMA architecture features 32 DMA channels. Each of the
two eDMA instances is integrated with two DMAMUX blocks.

Another particularity of these SoCs is that the interrupts are shared
between channels in the following way:
- DMA Channels 0-15 share the 'tx-0-15' interrupt
- DMA Channels 16-31 share the 'tx-16-31' interrupt
- all channels share the 'err' interrupt

Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241219102415.1208328-4-larisa.grigore@oss.nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Larisa Grigore and committed by
Vinod Koul 57eeb0a5 e7732945

+34
+34
Documentation/devicetree/bindings/dma/fsl,edma.yaml
··· 26 26 - fsl,imx93-edma3 27 27 - fsl,imx93-edma4 28 28 - fsl,imx95-edma5 29 + - nxp,s32g2-edma 29 30 - items: 30 31 - const: fsl,ls1028a-edma 31 32 - const: fsl,vf610-edma 33 + - items: 34 + - const: nxp,s32g3-edma 35 + - const: nxp,s32g2-edma 32 36 33 37 reg: 34 38 minItems: 1 ··· 224 220 else: 225 221 properties: 226 222 power-domains: false 223 + 224 + - if: 225 + properties: 226 + compatible: 227 + contains: 228 + const: nxp,s32g2-edma 229 + then: 230 + properties: 231 + clocks: 232 + minItems: 2 233 + maxItems: 2 234 + clock-names: 235 + items: 236 + - const: dmamux0 237 + - const: dmamux1 238 + interrupts: 239 + minItems: 3 240 + maxItems: 3 241 + interrupt-names: 242 + items: 243 + - const: tx-0-15 244 + - const: tx-16-31 245 + - const: err 246 + reg: 247 + minItems: 3 248 + maxItems: 3 249 + "#dma-cells": 250 + const: 2 251 + dma-channels: 252 + const: 32 227 253 228 254 unevaluatedProperties: false 229 255