Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'usb-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/PHY fixes from Greg KH:
"Here are a small number of USB and PHY driver fixes for 4.14-rc6
There is the usual musb and xhci fixes in here, as well as some needed
phy patches. Also is a nasty regression fix for usbfs that has started
to hit a lot of people using virtual machines.
All of these have been in linux-next with no reported problems"
* tag 'usb-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (26 commits)
usb: hub: Allow reset retry for USB2 devices on connect bounce
USB: core: fix out-of-bounds access bug in usb_get_bos_descriptor()
MAINTAINERS: fix git tree url for musb module
usb: quirks: add quirk for WORLDE MINI MIDI keyboard
usb: musb: sunxi: Explicitly release USB PHY on exit
usb: musb: Check for host-mode using is_host_active() on reset interrupt
usb: musb: musb_cppi41: Configure the number of channels for DA8xx
usb: musb: musb_cppi41: Fix cppi41_set_dma_mode() for DA8xx
usb: musb: musb_cppi41: Fix the address of teardown and autoreq registers
USB: musb: fix late external abort on suspend
USB: musb: fix session-bit runtime-PM quirk
usb: cdc_acm: Add quirk for Elatec TWN3
USB: devio: Revert "USB: devio: Don't corrupt user memory"
usb: xhci: Handle error condition in xhci_stop_device()
usb: xhci: Reset halted endpoint if trb is noop
xhci: Cleanup current_cmd in xhci_cleanup_command_queue()
xhci: Identify USB 3.1 capable hosts by their port protocol capability
USB: serial: metro-usb: add MS7820 device id
phy: rockchip-typec: Check for errors from tcphy_phy_init()
phy: rockchip-typec: Don't set the aux voltage swing to 400 mV
...
+226
-77
-1
MAINTAINERS
-1
MAINTAINERS
+14
-4
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
+14
-4
drivers/phy/marvell/phy-mvebu-cp110-comphy.c
···
111
111
#define MVEBU_COMPHY_CONF6_40B BIT(18)
112
112
#define MVEBU_COMPHY_SELECTOR 0x1140
113
113
#define MVEBU_COMPHY_SELECTOR_PHY(n) ((n) * 0x4)
114
+
#define MVEBU_COMPHY_PIPE_SELECTOR 0x1144
115
+
#define MVEBU_COMPHY_PIPE_SELECTOR_PIPE(n) ((n) * 0x4)
114
116
115
117
#define MVEBU_COMPHY_LANES 6
116
118
#define MVEBU_COMPHY_PORTS 3
···
470
468
{
471
469
struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
472
470
struct mvebu_comphy_priv *priv = lane->priv;
473
-
int ret;
474
-
u32 mux, val;
471
+
int ret, mux;
472
+
u32 val;
475
473
476
474
mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode);
477
475
if (mux < 0)
478
476
return -ENOTSUPP;
477
+
478
+
regmap_read(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, &val);
479
+
val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id));
480
+
regmap_write(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, val);
479
481
480
482
regmap_read(priv->regmap, MVEBU_COMPHY_SELECTOR, &val);
481
483
val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id));
···
532
526
val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id));
533
527
regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
534
528
529
+
regmap_read(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, &val);
530
+
val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id));
531
+
regmap_write(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, val);
532
+
535
533
return 0;
536
534
}
537
535
···
586
576
return PTR_ERR(priv->regmap);
587
577
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
588
578
priv->base = devm_ioremap_resource(&pdev->dev, res);
589
-
if (!priv->base)
590
-
return -ENOMEM;
579
+
if (IS_ERR(priv->base))
580
+
return PTR_ERR(priv->base);
591
581
592
582
for_each_available_child_of_node(pdev->dev.of_node, child) {
593
583
struct mvebu_comphy_lane *lane;
+2
-1
drivers/phy/mediatek/phy-mtk-tphy.c
+2
-1
drivers/phy/mediatek/phy-mtk-tphy.c
···
27
27
/* banks shared by multiple phys */
28
28
#define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */
29
29
#define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */
30
+
#define SSUSB_SIFSLV_V1_CHIP 0x300 /* shared by u3 phys */
30
31
/* u2 phy bank */
31
32
#define SSUSB_SIFSLV_V1_U2PHY_COM 0x000
32
33
/* u3/pcie/sata phy banks */
···
763
762
case PHY_TYPE_USB3:
764
763
case PHY_TYPE_PCIE:
765
764
u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
766
-
u3_banks->chip = NULL;
765
+
u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
767
766
u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
768
767
u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
769
768
break;
+55
-27
drivers/phy/rockchip/phy-rockchip-typec.c
+55
-27
drivers/phy/rockchip/phy-rockchip-typec.c
···
443
443
return regmap_write(tcphy->grf_regs, reg->offset, val | mask);
444
444
}
445
445
446
+
static void tcphy_dp_aux_set_flip(struct rockchip_typec_phy *tcphy)
447
+
{
448
+
u16 tx_ana_ctrl_reg_1;
449
+
450
+
/*
451
+
* Select the polarity of the xcvr:
452
+
* 1, Reverses the polarity (If TYPEC, Pulls ups aux_p and pull
453
+
* down aux_m)
454
+
* 0, Normal polarity (if TYPEC, pulls up aux_m and pulls down
455
+
* aux_p)
456
+
*/
457
+
tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
458
+
if (!tcphy->flip)
459
+
tx_ana_ctrl_reg_1 |= BIT(12);
460
+
else
461
+
tx_ana_ctrl_reg_1 &= ~BIT(12);
462
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
463
+
}
464
+
446
465
static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
447
466
{
467
+
u16 tx_ana_ctrl_reg_1;
448
468
u16 rdata, rdata2, val;
449
469
450
470
/* disable txda_cal_latch_en for rewrite the calibration values */
451
-
rdata = readl(tcphy->base + TX_ANA_CTRL_REG_1);
452
-
val = rdata & 0xdfff;
453
-
writel(val, tcphy->base + TX_ANA_CTRL_REG_1);
471
+
tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
472
+
tx_ana_ctrl_reg_1 &= ~BIT(13);
473
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
454
474
455
475
/*
456
476
* read a resistor calibration code from CMN_TXPUCAL_CTRL[6:0] and
···
492
472
* Activate this signal for 1 clock cycle to sample new calibration
493
473
* values.
494
474
*/
495
-
rdata = readl(tcphy->base + TX_ANA_CTRL_REG_1);
496
-
val = rdata | 0x2000;
497
-
writel(val, tcphy->base + TX_ANA_CTRL_REG_1);
475
+
tx_ana_ctrl_reg_1 |= BIT(13);
476
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
498
477
usleep_range(150, 200);
499
478
500
479
/* set TX Voltage Level and TX Deemphasis to 0 */
···
501
482
/* re-enable decap */
502
483
writel(0x100, tcphy->base + TX_ANA_CTRL_REG_2);
503
484
writel(0x300, tcphy->base + TX_ANA_CTRL_REG_2);
504
-
writel(0x2008, tcphy->base + TX_ANA_CTRL_REG_1);
505
-
writel(0x2018, tcphy->base + TX_ANA_CTRL_REG_1);
485
+
tx_ana_ctrl_reg_1 |= BIT(3);
486
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
487
+
tx_ana_ctrl_reg_1 |= BIT(4);
488
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
506
489
507
490
writel(0, tcphy->base + TX_ANA_CTRL_REG_5);
508
491
···
515
494
writel(0x1001, tcphy->base + TX_ANA_CTRL_REG_4);
516
495
517
496
/* re-enables Bandgap reference for LDO */
518
-
writel(0x2098, tcphy->base + TX_ANA_CTRL_REG_1);
519
-
writel(0x2198, tcphy->base + TX_ANA_CTRL_REG_1);
497
+
tx_ana_ctrl_reg_1 |= BIT(7);
498
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
499
+
tx_ana_ctrl_reg_1 |= BIT(8);
500
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
520
501
521
502
/*
522
503
* re-enables the transmitter pre-driver, driver data selection MUX,
···
528
505
writel(0x303, tcphy->base + TX_ANA_CTRL_REG_2);
529
506
530
507
/*
531
-
* BIT 12: Controls auxda_polarity, which selects the polarity of the
532
-
* xcvr:
533
-
* 1, Reverses the polarity (If TYPEC, Pulls ups aux_p and pull
534
-
* down aux_m)
535
-
* 0, Normal polarity (if TYPE_C, pulls up aux_m and pulls down
536
-
* aux_p)
508
+
* Do some magic undocumented stuff, some of which appears to
509
+
* undo the "re-enables Bandgap reference for LDO" above.
537
510
*/
538
-
val = 0xa078;
539
-
if (!tcphy->flip)
540
-
val |= BIT(12);
541
-
writel(val, tcphy->base + TX_ANA_CTRL_REG_1);
511
+
tx_ana_ctrl_reg_1 |= BIT(15);
512
+
tx_ana_ctrl_reg_1 &= ~BIT(8);
513
+
tx_ana_ctrl_reg_1 &= ~BIT(7);
514
+
tx_ana_ctrl_reg_1 |= BIT(6);
515
+
tx_ana_ctrl_reg_1 |= BIT(5);
516
+
writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
542
517
543
518
writel(0, tcphy->base + TX_ANA_CTRL_REG_3);
544
519
writel(0, tcphy->base + TX_ANA_CTRL_REG_4);
545
520
writel(0, tcphy->base + TX_ANA_CTRL_REG_5);
546
521
547
522
/*
548
-
* Controls low_power_swing_en, set the voltage swing of the driver
549
-
* to 400mv. The values below are peak to peak (differential) values.
523
+
* Controls low_power_swing_en, don't set the voltage swing of the
524
+
* driver to 400mv. The values below are peak to peak (differential)
525
+
* values.
550
526
*/
551
-
writel(4, tcphy->base + TXDA_COEFF_CALC_CTRL);
527
+
writel(0, tcphy->base + TXDA_COEFF_CALC_CTRL);
552
528
writel(0, tcphy->base + TXDA_CYA_AUXDA_CYA);
553
529
554
530
/* Controls tx_high_z_tm_en */
···
577
555
reset_control_deassert(tcphy->tcphy_rst);
578
556
579
557
property_enable(tcphy, &cfg->typec_conn_dir, tcphy->flip);
558
+
tcphy_dp_aux_set_flip(tcphy);
580
559
581
560
tcphy_cfg_24m(tcphy);
582
561
···
708
685
if (tcphy->mode == new_mode)
709
686
goto unlock_ret;
710
687
711
-
if (tcphy->mode == MODE_DISCONNECT)
712
-
tcphy_phy_init(tcphy, new_mode);
688
+
if (tcphy->mode == MODE_DISCONNECT) {
689
+
ret = tcphy_phy_init(tcphy, new_mode);
690
+
if (ret)
691
+
goto unlock_ret;
692
+
}
713
693
714
694
/* wait TCPHY for pipe ready */
715
695
for (timeout = 0; timeout < 100; timeout++) {
···
786
760
*/
787
761
if (new_mode == MODE_DFP_DP && tcphy->mode != MODE_DISCONNECT) {
788
762
tcphy_phy_deinit(tcphy);
789
-
tcphy_phy_init(tcphy, new_mode);
763
+
ret = tcphy_phy_init(tcphy, new_mode);
790
764
} else if (tcphy->mode == MODE_DISCONNECT) {
791
-
tcphy_phy_init(tcphy, new_mode);
765
+
ret = tcphy_phy_init(tcphy, new_mode);
792
766
}
767
+
if (ret)
768
+
goto unlock_ret;
793
769
794
770
ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
795
771
val, val & DP_MODE_A2, 1000,
+2
drivers/phy/tegra/xusb.c
+2
drivers/phy/tegra/xusb.c
+3
drivers/usb/class/cdc-acm.c
+3
drivers/usb/class/cdc-acm.c
···
1832
1832
{ USB_DEVICE(0xfff0, 0x0100), /* DATECS FP-2000 */
1833
1833
.driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */
1834
1834
},
1835
+
{ USB_DEVICE(0x09d8, 0x0320), /* Elatec GmbH TWN3 */
1836
+
.driver_info = NO_UNION_NORMAL, /* has misplaced union descriptor */
1837
+
},
1835
1838
1836
1839
{ USB_DEVICE(0x2912, 0x0001), /* ATOL FPrint */
1837
1840
.driver_info = CLEAR_HALT_CONDITIONS,
+4
-2
drivers/usb/core/config.c
+4
-2
drivers/usb/core/config.c
···
960
960
for (i = 0; i < num; i++) {
961
961
buffer += length;
962
962
cap = (struct usb_dev_cap_header *)buffer;
963
-
length = cap->bLength;
964
963
965
-
if (total_len < length)
964
+
if (total_len < sizeof(*cap) || total_len < cap->bLength) {
965
+
dev->bos->desc->bNumDeviceCaps = i;
966
966
break;
967
+
}
968
+
length = cap->bLength;
967
969
total_len -= length;
968
970
969
971
if (cap->bDescriptorType != USB_DT_DEVICE_CAPABILITY) {
+1
-5
drivers/usb/core/devio.c
+1
-5
drivers/usb/core/devio.c
···
1576
1576
totlen += isopkt[u].length;
1577
1577
}
1578
1578
u *= sizeof(struct usb_iso_packet_descriptor);
1579
-
if (totlen <= uurb->buffer_length)
1580
-
uurb->buffer_length = totlen;
1581
-
else
1582
-
WARN_ONCE(1, "uurb->buffer_length is too short %d vs %d",
1583
-
totlen, uurb->buffer_length);
1579
+
uurb->buffer_length = totlen;
1584
1580
break;
1585
1581
1586
1582
default:
+7
-4
drivers/usb/core/hub.c
+7
-4
drivers/usb/core/hub.c
···
2710
2710
if (!(portstatus & USB_PORT_STAT_CONNECTION))
2711
2711
return -ENOTCONN;
2712
2712
2713
-
/* bomb out completely if the connection bounced. A USB 3.0
2714
-
* connection may bounce if multiple warm resets were issued,
2713
+
/* Retry if connect change is set but status is still connected.
2714
+
* A USB 3.0 connection may bounce if multiple warm resets were issued,
2715
2715
* but the device may have successfully re-connected. Ignore it.
2716
2716
*/
2717
2717
if (!hub_is_superspeed(hub->hdev) &&
2718
-
(portchange & USB_PORT_STAT_C_CONNECTION))
2719
-
return -ENOTCONN;
2718
+
(portchange & USB_PORT_STAT_C_CONNECTION)) {
2719
+
usb_clear_port_feature(hub->hdev, port1,
2720
+
USB_PORT_FEAT_C_CONNECTION);
2721
+
return -EAGAIN;
2722
+
}
2720
2723
2721
2724
if (!(portstatus & USB_PORT_STAT_ENABLE))
2722
2725
return -EBUSY;
+4
drivers/usb/core/quirks.c
+4
drivers/usb/core/quirks.c
···
221
221
/* Corsair Strafe RGB */
222
222
{ USB_DEVICE(0x1b1c, 0x1b20), .driver_info = USB_QUIRK_DELAY_INIT },
223
223
224
+
/* MIDI keyboard WORLDE MINI */
225
+
{ USB_DEVICE(0x1c75, 0x0204), .driver_info =
226
+
USB_QUIRK_CONFIG_INTF_STRINGS },
227
+
224
228
/* Acer C120 LED Projector */
225
229
{ USB_DEVICE(0x1de1, 0xc102), .driver_info = USB_QUIRK_NO_LPM },
226
230
+18
-5
drivers/usb/host/xhci-hub.c
+18
-5
drivers/usb/host/xhci-hub.c
···
420
420
GFP_NOWAIT);
421
421
if (!command) {
422
422
spin_unlock_irqrestore(&xhci->lock, flags);
423
-
xhci_free_command(xhci, cmd);
424
-
return -ENOMEM;
423
+
ret = -ENOMEM;
424
+
goto cmd_cleanup;
425
425
}
426
-
xhci_queue_stop_endpoint(xhci, command, slot_id, i,
427
-
suspend);
426
+
427
+
ret = xhci_queue_stop_endpoint(xhci, command, slot_id,
428
+
i, suspend);
429
+
if (ret) {
430
+
spin_unlock_irqrestore(&xhci->lock, flags);
431
+
xhci_free_command(xhci, command);
432
+
goto cmd_cleanup;
433
+
}
428
434
}
429
435
}
430
-
xhci_queue_stop_endpoint(xhci, cmd, slot_id, 0, suspend);
436
+
ret = xhci_queue_stop_endpoint(xhci, cmd, slot_id, 0, suspend);
437
+
if (ret) {
438
+
spin_unlock_irqrestore(&xhci->lock, flags);
439
+
goto cmd_cleanup;
440
+
}
441
+
431
442
xhci_ring_cmd_db(xhci);
432
443
spin_unlock_irqrestore(&xhci->lock, flags);
433
444
···
450
439
xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
451
440
ret = -ETIME;
452
441
}
442
+
443
+
cmd_cleanup:
453
444
xhci_free_command(xhci, cmd);
454
445
return ret;
455
446
}
+14
-7
drivers/usb/host/xhci-ring.c
+14
-7
drivers/usb/host/xhci-ring.c
···
1309
1309
void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
1310
1310
{
1311
1311
struct xhci_command *cur_cmd, *tmp_cmd;
1312
+
xhci->current_cmd = NULL;
1312
1313
list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
1313
1314
xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
1314
1315
}
···
2580
2579
(struct xhci_generic_trb *) ep_trb);
2581
2580
2582
2581
/*
2583
-
* No-op TRB should not trigger interrupts.
2584
-
* If ep_trb is a no-op TRB, it means the
2585
-
* corresponding TD has been cancelled. Just ignore
2586
-
* the TD.
2582
+
* No-op TRB could trigger interrupts in a case where
2583
+
* a URB was killed and a STALL_ERROR happens right
2584
+
* after the endpoint ring stopped. Reset the halted
2585
+
* endpoint. Otherwise, the endpoint remains stalled
2586
+
* indefinitely.
2587
2587
*/
2588
2588
if (trb_is_noop(ep_trb)) {
2589
-
xhci_dbg(xhci,
2590
-
"ep_trb is a no-op TRB. Skip it for slot %u ep %u\n",
2591
-
slot_id, ep_index);
2589
+
if (trb_comp_code == COMP_STALL_ERROR ||
2590
+
xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
2591
+
trb_comp_code))
2592
+
xhci_cleanup_halted_endpoint(xhci, slot_id,
2593
+
ep_index,
2594
+
ep_ring->stream_id,
2595
+
td, ep_trb,
2596
+
EP_HARD_RESET);
2592
2597
goto cleanup;
2593
2598
}
2594
2599
+2
-1
drivers/usb/host/xhci.c
+2
-1
drivers/usb/host/xhci.c
···
4805
4805
*/
4806
4806
hcd->has_tt = 1;
4807
4807
} else {
4808
-
if (xhci->sbrn == 0x31) {
4808
+
/* Some 3.1 hosts return sbrn 0x30, can't rely on sbrn alone */
4809
+
if (xhci->sbrn == 0x31 || xhci->usb3_rhub.min_rev >= 1) {
4809
4810
xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4810
4811
hcd->speed = HCD_USB31;
4811
4812
hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
+13
-8
drivers/usb/musb/musb_core.c
+13
-8
drivers/usb/musb/musb_core.c
···
906
906
*/
907
907
if (int_usb & MUSB_INTR_RESET) {
908
908
handled = IRQ_HANDLED;
909
-
if (devctl & MUSB_DEVCTL_HM) {
909
+
if (is_host_active(musb)) {
910
910
/*
911
911
* When BABBLE happens what we can depends on which
912
912
* platform MUSB is running, because some platforms
···
916
916
* drop the session.
917
917
*/
918
918
dev_err(musb->controller, "Babble\n");
919
-
920
-
if (is_host_active(musb))
921
-
musb_recover_from_babble(musb);
919
+
musb_recover_from_babble(musb);
922
920
} else {
923
921
musb_dbg(musb, "BUS RESET as %s",
924
922
usb_otg_state_string(musb->xceiv->otg->state));
···
1859
1861
MUSB_DEVCTL_HR;
1860
1862
switch (devctl & ~s) {
1861
1863
case MUSB_QUIRK_B_INVALID_VBUS_91:
1862
-
if (musb->quirk_retries--) {
1864
+
if (musb->quirk_retries && !musb->flush_irq_work) {
1863
1865
musb_dbg(musb,
1864
1866
"Poll devctl on invalid vbus, assume no session");
1865
1867
schedule_delayed_work(&musb->irq_work,
1866
1868
msecs_to_jiffies(1000));
1867
-
1869
+
musb->quirk_retries--;
1868
1870
return;
1869
1871
}
1870
1872
/* fall through */
1871
1873
case MUSB_QUIRK_A_DISCONNECT_19:
1872
-
if (musb->quirk_retries--) {
1874
+
if (musb->quirk_retries && !musb->flush_irq_work) {
1873
1875
musb_dbg(musb,
1874
1876
"Poll devctl on possible host mode disconnect");
1875
1877
schedule_delayed_work(&musb->irq_work,
1876
1878
msecs_to_jiffies(1000));
1877
-
1879
+
musb->quirk_retries--;
1878
1880
return;
1879
1881
}
1880
1882
if (!musb->session)
···
2679
2681
2680
2682
musb_platform_disable(musb);
2681
2683
musb_disable_interrupts(musb);
2684
+
2685
+
musb->flush_irq_work = true;
2686
+
while (flush_delayed_work(&musb->irq_work))
2687
+
;
2688
+
musb->flush_irq_work = false;
2689
+
2682
2690
if (!(musb->io.quirks & MUSB_PRESERVE_SESSION))
2683
2691
musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
2692
+
2684
2693
WARN_ON(!list_empty(&musb->pending_list));
2685
2694
2686
2695
spin_lock_irqsave(&musb->lock, flags);
+2
drivers/usb/musb/musb_core.h
+2
drivers/usb/musb/musb_core.h
+82
-12
drivers/usb/musb/musb_cppi41.c
+82
-12
drivers/usb/musb/musb_cppi41.c
···
26
26
27
27
#define MUSB_DMA_NUM_CHANNELS 15
28
28
29
+
#define DA8XX_USB_MODE 0x10
30
+
#define DA8XX_USB_AUTOREQ 0x14
31
+
#define DA8XX_USB_TEARDOWN 0x1c
32
+
33
+
#define DA8XX_DMA_NUM_CHANNELS 4
34
+
29
35
struct cppi41_dma_controller {
30
36
struct dma_controller controller;
31
-
struct cppi41_dma_channel rx_channel[MUSB_DMA_NUM_CHANNELS];
32
-
struct cppi41_dma_channel tx_channel[MUSB_DMA_NUM_CHANNELS];
37
+
struct cppi41_dma_channel *rx_channel;
38
+
struct cppi41_dma_channel *tx_channel;
33
39
struct hrtimer early_tx;
34
40
struct list_head early_tx_list;
35
41
u32 rx_mode;
36
42
u32 tx_mode;
37
43
u32 auto_req;
44
+
45
+
u32 tdown_reg;
46
+
u32 autoreq_reg;
47
+
48
+
void (*set_dma_mode)(struct cppi41_dma_channel *cppi41_channel,
49
+
unsigned int mode);
50
+
u8 num_channels;
38
51
};
39
52
40
53
static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
···
362
349
}
363
350
}
364
351
352
+
static void da8xx_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
353
+
unsigned int mode)
354
+
{
355
+
struct cppi41_dma_controller *controller = cppi41_channel->controller;
356
+
struct musb *musb = controller->controller.musb;
357
+
unsigned int shift;
358
+
u32 port;
359
+
u32 new_mode;
360
+
u32 old_mode;
361
+
362
+
old_mode = controller->tx_mode;
363
+
port = cppi41_channel->port_num;
364
+
365
+
shift = (port - 1) * 4;
366
+
if (!cppi41_channel->is_tx)
367
+
shift += 16;
368
+
new_mode = old_mode & ~(3 << shift);
369
+
new_mode |= mode << shift;
370
+
371
+
if (new_mode == old_mode)
372
+
return;
373
+
controller->tx_mode = new_mode;
374
+
musb_writel(musb->ctrl_base, DA8XX_USB_MODE, new_mode);
375
+
}
376
+
377
+
365
378
static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
366
379
unsigned mode)
367
380
{
···
403
364
if (new_mode == old_mode)
404
365
return;
405
366
controller->auto_req = new_mode;
406
-
musb_writel(controller->controller.musb->ctrl_base, USB_CTRL_AUTOREQ,
407
-
new_mode);
367
+
musb_writel(controller->controller.musb->ctrl_base,
368
+
controller->autoreq_reg, new_mode);
408
369
}
409
370
410
371
static bool cppi41_configure_channel(struct dma_channel *channel,
···
412
373
dma_addr_t dma_addr, u32 len)
413
374
{
414
375
struct cppi41_dma_channel *cppi41_channel = channel->private_data;
376
+
struct cppi41_dma_controller *controller = cppi41_channel->controller;
415
377
struct dma_chan *dc = cppi41_channel->dc;
416
378
struct dma_async_tx_descriptor *dma_desc;
417
379
enum dma_transfer_direction direction;
···
438
398
musb_writel(musb->ctrl_base,
439
399
RNDIS_REG(cppi41_channel->port_num), len);
440
400
/* gen rndis */
441
-
cppi41_set_dma_mode(cppi41_channel,
401
+
controller->set_dma_mode(cppi41_channel,
442
402
EP_MODE_DMA_GEN_RNDIS);
443
403
444
404
/* auto req */
···
447
407
} else {
448
408
musb_writel(musb->ctrl_base,
449
409
RNDIS_REG(cppi41_channel->port_num), 0);
450
-
cppi41_set_dma_mode(cppi41_channel,
410
+
controller->set_dma_mode(cppi41_channel,
451
411
EP_MODE_DMA_TRANSPARENT);
452
412
cppi41_set_autoreq_mode(cppi41_channel,
453
413
EP_MODE_AUTOREQ_NONE);
454
414
}
455
415
} else {
456
416
/* fallback mode */
457
-
cppi41_set_dma_mode(cppi41_channel, EP_MODE_DMA_TRANSPARENT);
417
+
controller->set_dma_mode(cppi41_channel,
418
+
EP_MODE_DMA_TRANSPARENT);
458
419
cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
459
420
len = min_t(u32, packet_sz, len);
460
421
}
···
486
445
struct cppi41_dma_channel *cppi41_channel = NULL;
487
446
u8 ch_num = hw_ep->epnum - 1;
488
447
489
-
if (ch_num >= MUSB_DMA_NUM_CHANNELS)
448
+
if (ch_num >= controller->num_channels)
490
449
return NULL;
491
450
492
451
if (is_tx)
···
622
581
623
582
do {
624
583
if (is_tx)
625
-
musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
584
+
musb_writel(musb->ctrl_base, controller->tdown_reg,
585
+
tdbit);
626
586
ret = dmaengine_terminate_all(cppi41_channel->dc);
627
587
} while (ret == -EAGAIN);
628
588
629
589
if (is_tx) {
630
-
musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
590
+
musb_writel(musb->ctrl_base, controller->tdown_reg, tdbit);
631
591
632
592
csr = musb_readw(epio, MUSB_TXCSR);
633
593
if (csr & MUSB_TXCSR_TXPKTRDY) {
···
646
604
struct dma_chan *dc;
647
605
int i;
648
606
649
-
for (i = 0; i < MUSB_DMA_NUM_CHANNELS; i++) {
607
+
for (i = 0; i < ctrl->num_channels; i++) {
650
608
dc = ctrl->tx_channel[i].dc;
651
609
if (dc)
652
610
dma_release_channel(dc);
···
698
656
goto err;
699
657
700
658
ret = -EINVAL;
701
-
if (port > MUSB_DMA_NUM_CHANNELS || !port)
659
+
if (port > controller->num_channels || !port)
702
660
goto err;
703
661
if (is_tx)
704
662
cppi41_channel = &controller->tx_channel[port - 1];
···
739
697
740
698
hrtimer_cancel(&controller->early_tx);
741
699
cppi41_dma_controller_stop(controller);
700
+
kfree(controller->rx_channel);
701
+
kfree(controller->tx_channel);
742
702
kfree(controller);
743
703
}
744
704
EXPORT_SYMBOL_GPL(cppi41_dma_controller_destroy);
···
749
705
cppi41_dma_controller_create(struct musb *musb, void __iomem *base)
750
706
{
751
707
struct cppi41_dma_controller *controller;
708
+
int channel_size;
752
709
int ret = 0;
753
710
754
711
if (!musb->controller->parent->of_node) {
···
772
727
controller->controller.is_compatible = cppi41_is_compatible;
773
728
controller->controller.musb = musb;
774
729
730
+
if (musb->io.quirks & MUSB_DA8XX) {
731
+
controller->tdown_reg = DA8XX_USB_TEARDOWN;
732
+
controller->autoreq_reg = DA8XX_USB_AUTOREQ;
733
+
controller->set_dma_mode = da8xx_set_dma_mode;
734
+
controller->num_channels = DA8XX_DMA_NUM_CHANNELS;
735
+
} else {
736
+
controller->tdown_reg = USB_TDOWN;
737
+
controller->autoreq_reg = USB_CTRL_AUTOREQ;
738
+
controller->set_dma_mode = cppi41_set_dma_mode;
739
+
controller->num_channels = MUSB_DMA_NUM_CHANNELS;
740
+
}
741
+
742
+
channel_size = controller->num_channels *
743
+
sizeof(struct cppi41_dma_channel);
744
+
controller->rx_channel = kzalloc(channel_size, GFP_KERNEL);
745
+
if (!controller->rx_channel)
746
+
goto rx_channel_alloc_fail;
747
+
controller->tx_channel = kzalloc(channel_size, GFP_KERNEL);
748
+
if (!controller->tx_channel)
749
+
goto tx_channel_alloc_fail;
750
+
775
751
ret = cppi41_dma_controller_start(controller);
776
752
if (ret)
777
753
goto plat_get_fail;
778
754
return &controller->controller;
779
755
780
756
plat_get_fail:
757
+
kfree(controller->tx_channel);
758
+
tx_channel_alloc_fail:
759
+
kfree(controller->rx_channel);
760
+
rx_channel_alloc_fail:
781
761
kfree(controller);
782
762
kzalloc_fail:
783
763
if (ret == -EPROBE_DEFER)
+2
drivers/usb/musb/sunxi.c
+2
drivers/usb/musb/sunxi.c
+1
drivers/usb/serial/metro-usb.c
+1
drivers/usb/serial/metro-usb.c
···
45
45
static const struct usb_device_id id_table[] = {
46
46
{ USB_DEVICE(FOCUS_VENDOR_ID, FOCUS_PRODUCT_ID_BI) },
47
47
{ USB_DEVICE(FOCUS_VENDOR_ID, FOCUS_PRODUCT_ID_UNI) },
48
+
{ USB_DEVICE_INTERFACE_CLASS(0x0c2e, 0x0730, 0xff) }, /* MS7820 */
48
49
{ }, /* Terminating entry. */
49
50
};
50
51
MODULE_DEVICE_TABLE(usb, id_table);