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iio: light: veml6030: add support for triggered buffer

All devices supported by this driver (currently veml6030, veml6035
and veml7700) have two 16-bit channels, and can profit for the same
configuration to support data access via triggered buffers.

The measurements are stored in two 16-bit consecutive registers
(addresses 0x04 and 0x05) as little endian, unsigned data.

Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com>
Link: https://patch.msgid.link/20241124-veml6030_triggered_buffer-v3-1-565bb6b4b5c8@gmail.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Javier Carrasco and committed by
Jonathan Cameron
582d732b c437190c

+78
+2
drivers/iio/light/Kconfig
··· 667 667 config VEML6030 668 668 tristate "VEML6030 and VEML6035 ambient light sensors" 669 669 select REGMAP_I2C 670 + select IIO_BUFFER 671 + select IIO_TRIGGERED_BUFFER 670 672 depends on I2C 671 673 help 672 674 Say Y here if you want to build a driver for the Vishay VEML6030
+76
drivers/iio/light/veml6030.c
··· 28 28 #include <linux/iio/iio.h> 29 29 #include <linux/iio/sysfs.h> 30 30 #include <linux/iio/events.h> 31 + #include <linux/iio/trigger_consumer.h> 32 + #include <linux/iio/triggered_buffer.h> 31 33 32 34 /* Device registers */ 33 35 #define VEML6030_REG_ALS_CONF 0x00 ··· 39 37 #define VEML6030_REG_ALS_DATA 0x04 40 38 #define VEML6030_REG_WH_DATA 0x05 41 39 #define VEML6030_REG_ALS_INT 0x06 40 + #define VEML6030_REG_DATA(ch) (VEML6030_REG_ALS_DATA + (ch)) 42 41 43 42 /* Bit masks for specific functionality */ 44 43 #define VEML6030_ALS_IT GENMASK(9, 6) ··· 58 55 #define VEML6035_SENS BIT(12) 59 56 #define VEML6035_INT_CHAN BIT(3) 60 57 #define VEML6035_CHAN_EN BIT(2) 58 + 59 + enum veml6030_scan { 60 + VEML6030_SCAN_ALS, 61 + VEML6030_SCAN_WH, 62 + VEML6030_SCAN_TIMESTAMP, 63 + }; 61 64 62 65 struct veml603x_chip { 63 66 const char *name; ··· 251 242 BIT(IIO_CHAN_INFO_SCALE), 252 243 .event_spec = veml6030_event_spec, 253 244 .num_event_specs = ARRAY_SIZE(veml6030_event_spec), 245 + .scan_index = VEML6030_SCAN_ALS, 246 + .scan_type = { 247 + .sign = 'u', 248 + .realbits = 16, 249 + .storagebits = 16, 250 + .endianness = IIO_CPU, 251 + }, 254 252 }, 255 253 { 256 254 .type = IIO_INTENSITY, ··· 269 253 BIT(IIO_CHAN_INFO_SCALE), 270 254 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 271 255 BIT(IIO_CHAN_INFO_SCALE), 256 + .scan_index = VEML6030_SCAN_WH, 257 + .scan_type = { 258 + .sign = 'u', 259 + .realbits = 16, 260 + .storagebits = 16, 261 + .endianness = IIO_CPU, 262 + }, 272 263 }, 264 + IIO_CHAN_SOFT_TIMESTAMP(VEML6030_SCAN_TIMESTAMP), 273 265 }; 274 266 275 267 static const struct iio_chan_spec veml7700_channels[] = { ··· 290 266 BIT(IIO_CHAN_INFO_SCALE), 291 267 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 292 268 BIT(IIO_CHAN_INFO_SCALE), 269 + .scan_index = VEML6030_SCAN_ALS, 270 + .scan_type = { 271 + .sign = 'u', 272 + .realbits = 16, 273 + .storagebits = 16, 274 + .endianness = IIO_CPU, 275 + }, 293 276 }, 294 277 { 295 278 .type = IIO_INTENSITY, ··· 308 277 BIT(IIO_CHAN_INFO_SCALE), 309 278 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) | 310 279 BIT(IIO_CHAN_INFO_SCALE), 280 + .scan_index = VEML6030_SCAN_WH, 281 + .scan_type = { 282 + .sign = 'u', 283 + .realbits = 16, 284 + .storagebits = 16, 285 + .endianness = IIO_CPU, 286 + }, 311 287 }, 288 + IIO_CHAN_SOFT_TIMESTAMP(VEML6030_SCAN_TIMESTAMP), 312 289 }; 313 290 314 291 static const struct regmap_config veml6030_regmap_config = { ··· 928 889 return IRQ_HANDLED; 929 890 } 930 891 892 + static irqreturn_t veml6030_trigger_handler(int irq, void *p) 893 + { 894 + struct iio_poll_func *pf = p; 895 + struct iio_dev *iio = pf->indio_dev; 896 + struct veml6030_data *data = iio_priv(iio); 897 + unsigned int reg; 898 + int ch, ret, i = 0; 899 + struct { 900 + u16 chans[2]; 901 + aligned_s64 timestamp; 902 + } scan; 903 + 904 + memset(&scan, 0, sizeof(scan)); 905 + 906 + iio_for_each_active_channel(iio, ch) { 907 + ret = regmap_read(data->regmap, VEML6030_REG_DATA(ch), 908 + &reg); 909 + if (ret) 910 + goto done; 911 + 912 + scan.chans[i++] = reg; 913 + } 914 + 915 + iio_push_to_buffers_with_timestamp(iio, &scan, pf->timestamp); 916 + 917 + done: 918 + iio_trigger_notify_done(iio->trig); 919 + 920 + return IRQ_HANDLED; 921 + } 922 + 931 923 static int veml6030_set_info(struct iio_dev *indio_dev) 932 924 { 933 925 struct veml6030_data *data = iio_priv(indio_dev); ··· 1146 1076 ret = data->chip->hw_init(indio_dev, &client->dev); 1147 1077 if (ret < 0) 1148 1078 return ret; 1079 + 1080 + ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev, NULL, 1081 + veml6030_trigger_handler, NULL); 1082 + if (ret) 1083 + return dev_err_probe(&client->dev, ret, 1084 + "Failed to register triggered buffer"); 1149 1085 1150 1086 return devm_iio_device_register(&client->dev, indio_dev); 1151 1087 }