Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM: SoC fixes from Olof Johansson:
"I was hoping to be done with fixes for 3.4 but we got two branches
from subarch maintainers the last couple of days. So here is one
last(?) pull request for arm-soc containing 7 patches:
- Five of them are for shmobile dealing with SMP setup and compile
failures
- The remaining two are for regressions on the Samsung platforms"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1
ARM: EXYNOS: use s5p-timer for UniversalC210 board
ARM / mach-shmobile: Invalidate caches when booting secondary cores
ARM / mach-shmobile: sh73a0 SMP TWD boot regression fix
ARM / mach-shmobile: r8a7779 SMP TWD boot regression fix
ARM: mach-shmobile: convert ag5evm to use the generic MMC GPIO hotplug helper
ARM: mach-shmobile: convert mackerel to use the generic MMC GPIO hotplug helper
+88
-55
+3
arch/arm/mach-exynos/Kconfig
+3
arch/arm/mach-exynos/Kconfig
+1
-1
arch/arm/mach-exynos/clock-exynos5.c
+1
-1
arch/arm/mach-exynos/clock-exynos5.c
+3
-1
arch/arm/mach-exynos/mach-universal_c210.c
+3
-1
arch/arm/mach-exynos/mach-universal_c210.c
···
40
40
#include <plat/pd.h>
41
41
#include <plat/regs-fb-v4.h>
42
42
#include <plat/fimc-core.h>
43
+
#include <plat/s5p-time.h>
43
44
#include <plat/camport.h>
44
45
#include <plat/mipi_csis.h>
45
46
···
1064
1063
exynos_init_io(NULL, 0);
1065
1064
s3c24xx_init_clocks(24000000);
1066
1065
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1066
+
s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
1067
1067
}
1068
1068
1069
1069
static void s5p_tv_setup(void)
···
1115
1113
.map_io = universal_map_io,
1116
1114
.handle_irq = gic_handle_irq,
1117
1115
.init_machine = universal_machine_init,
1118
-
.timer = &exynos4_timer,
1116
+
.timer = &s5p_timer,
1119
1117
.reserve = &universal_reserve,
1120
1118
.restart = exynos4_restart,
1121
1119
MACHINE_END
+2
-20
arch/arm/mach-shmobile/board-ag5evm.c
+2
-20
arch/arm/mach-shmobile/board-ag5evm.c
···
365
365
};
366
366
367
367
/* SDHI0 */
368
-
static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
369
-
{
370
-
struct device *dev = arg;
371
-
struct sh_mobile_sdhi_info *info = dev->platform_data;
372
-
struct tmio_mmc_data *pdata = info->pdata;
373
-
374
-
tmio_mmc_cd_wakeup(pdata);
375
-
376
-
return IRQ_HANDLED;
377
-
}
378
-
379
368
static struct sh_mobile_sdhi_info sdhi0_info = {
380
369
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
381
370
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
382
-
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
371
+
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
383
372
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
384
373
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
374
+
.cd_gpio = GPIO_PORT251,
385
375
};
386
376
387
377
static struct resource sdhi0_resources[] = {
···
547
557
lcd_backlight_reset();
548
558
549
559
/* enable SDHI0 on CN15 [SD I/F] */
550
-
gpio_request(GPIO_FN_SDHICD0, NULL);
551
560
gpio_request(GPIO_FN_SDHIWP0, NULL);
552
561
gpio_request(GPIO_FN_SDHICMD0, NULL);
553
562
gpio_request(GPIO_FN_SDHICLK0, NULL);
···
554
565
gpio_request(GPIO_FN_SDHID0_2, NULL);
555
566
gpio_request(GPIO_FN_SDHID0_1, NULL);
556
567
gpio_request(GPIO_FN_SDHID0_0, NULL);
557
-
558
-
if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
559
-
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
560
-
"sdhi0 cd", &sdhi0_device.dev))
561
-
sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
562
-
else
563
-
pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
564
568
565
569
/* enable SDHI1 on CN4 [WLAN I/F] */
566
570
gpio_request(GPIO_FN_SDHICLK1, NULL);
+2
-20
arch/arm/mach-shmobile/board-mackerel.c
+2
-20
arch/arm/mach-shmobile/board-mackerel.c
···
1011
1011
}
1012
1012
1013
1013
/* SDHI0 */
1014
-
static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
1015
-
{
1016
-
struct device *dev = arg;
1017
-
struct sh_mobile_sdhi_info *info = dev->platform_data;
1018
-
struct tmio_mmc_data *pdata = info->pdata;
1019
-
1020
-
tmio_mmc_cd_wakeup(pdata);
1021
-
1022
-
return IRQ_HANDLED;
1023
-
}
1024
-
1025
1014
static struct sh_mobile_sdhi_info sdhi0_info = {
1026
1015
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
1027
1016
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
1017
+
.tmio_flags = TMIO_MMC_USE_GPIO_CD,
1028
1018
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
1019
+
.cd_gpio = GPIO_PORT172,
1029
1020
};
1030
1021
1031
1022
static struct resource sdhi0_resources[] = {
···
1375
1384
{
1376
1385
u32 srcr4;
1377
1386
struct clk *clk;
1378
-
int ret;
1379
1387
1380
1388
/* External clock source */
1381
1389
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
···
1471
1481
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
1472
1482
1473
1483
/* enable SDHI0 */
1474
-
gpio_request(GPIO_FN_SDHICD0, NULL);
1475
1484
gpio_request(GPIO_FN_SDHIWP0, NULL);
1476
1485
gpio_request(GPIO_FN_SDHICMD0, NULL);
1477
1486
gpio_request(GPIO_FN_SDHICLK0, NULL);
···
1478
1489
gpio_request(GPIO_FN_SDHID0_2, NULL);
1479
1490
gpio_request(GPIO_FN_SDHID0_1, NULL);
1480
1491
gpio_request(GPIO_FN_SDHID0_0, NULL);
1481
-
1482
-
ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
1483
-
IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
1484
-
if (!ret)
1485
-
sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
1486
-
else
1487
-
pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
1488
1492
1489
1493
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1490
1494
/* enable SDHI1 */
+55
-1
arch/arm/mach-shmobile/headsmp.S
+55
-1
arch/arm/mach-shmobile/headsmp.S
···
16
16
17
17
__CPUINIT
18
18
19
+
/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks!
20
+
*
21
+
* The secondary kernel init calls v7_flush_dcache_all before it enables
22
+
* the L1; however, the L1 comes out of reset in an undefined state, so
23
+
* the clean + invalidate performed by v7_flush_dcache_all causes a bunch
24
+
* of cache lines with uninitialized data and uninitialized tags to get
25
+
* written out to memory, which does really unpleasant things to the main
26
+
* processor. We fix this by performing an invalidate, rather than a
27
+
* clean + invalidate, before jumping into the kernel.
28
+
*
29
+
* This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs
30
+
* to be called for both secondary cores startup and primary core resume
31
+
* procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S.
32
+
*/
33
+
ENTRY(v7_invalidate_l1)
34
+
mov r0, #0
35
+
mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
36
+
mcr p15, 2, r0, c0, c0, 0
37
+
mrc p15, 1, r0, c0, c0, 0
38
+
39
+
ldr r1, =0x7fff
40
+
and r2, r1, r0, lsr #13
41
+
42
+
ldr r1, =0x3ff
43
+
44
+
and r3, r1, r0, lsr #3 @ NumWays - 1
45
+
add r2, r2, #1 @ NumSets
46
+
47
+
and r0, r0, #0x7
48
+
add r0, r0, #4 @ SetShift
49
+
50
+
clz r1, r3 @ WayShift
51
+
add r4, r3, #1 @ NumWays
52
+
1: sub r2, r2, #1 @ NumSets--
53
+
mov r3, r4 @ Temp = NumWays
54
+
2: subs r3, r3, #1 @ Temp--
55
+
mov r5, r3, lsl r1
56
+
mov r6, r2, lsl r0
57
+
orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
58
+
mcr p15, 0, r5, c7, c6, 2
59
+
bgt 2b
60
+
cmp r2, #0
61
+
bgt 1b
62
+
dsb
63
+
isb
64
+
mov pc, lr
65
+
ENDPROC(v7_invalidate_l1)
66
+
67
+
ENTRY(shmobile_invalidate_start)
68
+
bl v7_invalidate_l1
69
+
b secondary_startup
70
+
ENDPROC(shmobile_invalidate_start)
71
+
19
72
/*
20
73
* Reset vector for secondary CPUs.
21
74
* This will be mapped at address 0 by SBAR register.
···
77
24
.align 12
78
25
ENTRY(shmobile_secondary_vector)
79
26
ldr pc, 1f
80
-
1: .long secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET
27
+
1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
28
+
ENDPROC(shmobile_secondary_vector)
+1
-1
arch/arm/mach-shmobile/include/mach/common.h
+1
-1
arch/arm/mach-shmobile/include/mach/common.h
···
4
4
extern void shmobile_earlytimer_init(void);
5
5
extern struct sys_timer shmobile_timer;
6
6
struct twd_local_timer;
7
-
void shmobile_twd_init(struct twd_local_timer *twd_local_timer);
8
7
extern void shmobile_setup_console(void);
9
8
extern void shmobile_secondary_vector(void);
10
9
extern int shmobile_platform_cpu_kill(unsigned int cpu);
···
81
82
extern void r8a7779_secondary_init(unsigned int cpu);
82
83
extern int r8a7779_boot_secondary(unsigned int cpu);
83
84
extern void r8a7779_smp_prepare_cpus(void);
85
+
extern void r8a7779_register_twd(void);
84
86
85
87
#endif /* __ARCH_MACH_COMMON_H */
+4
arch/arm/mach-shmobile/setup-r8a7779.c
+4
arch/arm/mach-shmobile/setup-r8a7779.c
···
262
262
ARRAY_SIZE(r8a7779_late_devices));
263
263
}
264
264
265
+
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
266
+
void __init __weak r8a7779_register_twd(void) { }
267
+
265
268
static void __init r8a7779_earlytimer_init(void)
266
269
{
267
270
r8a7779_clock_init();
268
271
shmobile_earlytimer_init();
272
+
r8a7779_register_twd();
269
273
}
270
274
271
275
void __init r8a7779_add_early_devices(void)
+4
arch/arm/mach-shmobile/setup-sh73a0.c
+4
arch/arm/mach-shmobile/setup-sh73a0.c
···
688
688
ARRAY_SIZE(sh73a0_late_devices));
689
689
}
690
690
691
+
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
692
+
void __init __weak sh73a0_register_twd(void) { }
693
+
691
694
static void __init sh73a0_earlytimer_init(void)
692
695
{
693
696
sh73a0_clock_init();
694
697
shmobile_earlytimer_init();
698
+
sh73a0_register_twd();
695
699
}
696
700
697
701
void __init sh73a0_add_early_devices(void)
+7
-1
arch/arm/mach-shmobile/smp-r8a7779.c
+7
-1
arch/arm/mach-shmobile/smp-r8a7779.c
···
64
64
static DEFINE_SPINLOCK(scu_lock);
65
65
static unsigned long tmp;
66
66
67
+
#ifdef CONFIG_HAVE_ARM_TWD
67
68
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
69
+
70
+
void __init r8a7779_register_twd(void)
71
+
{
72
+
twd_local_timer_register(&twd_local_timer);
73
+
}
74
+
#endif
68
75
69
76
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
70
77
{
···
91
84
{
92
85
void __iomem *scu_base = scu_base_addr();
93
86
94
-
shmobile_twd_init(&twd_local_timer);
95
87
return scu_get_core_count(scu_base);
96
88
}
97
89
+6
-1
arch/arm/mach-shmobile/smp-sh73a0.c
+6
-1
arch/arm/mach-shmobile/smp-sh73a0.c
···
42
42
static DEFINE_SPINLOCK(scu_lock);
43
43
static unsigned long tmp;
44
44
45
+
#ifdef CONFIG_HAVE_ARM_TWD
45
46
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
47
+
void __init sh73a0_register_twd(void)
48
+
{
49
+
twd_local_timer_register(&twd_local_timer);
50
+
}
51
+
#endif
46
52
47
53
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
48
54
{
···
68
62
{
69
63
void __iomem *scu_base = scu_base_addr();
70
64
71
-
shmobile_twd_init(&twd_local_timer);
72
65
return scu_get_core_count(scu_base);
73
66
}
74
67
-9
arch/arm/mach-shmobile/timer.c
-9
arch/arm/mach-shmobile/timer.c
···
46
46
{
47
47
}
48
48
49
-
void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)
50
-
{
51
-
#ifdef CONFIG_HAVE_ARM_TWD
52
-
int err = twd_local_timer_register(twd_local_timer);
53
-
if (err)
54
-
pr_err("twd_local_timer_register failed %d\n", err);
55
-
#endif
56
-
}
57
-
58
49
struct sys_timer shmobile_timer = {
59
50
.init = shmobile_timer_init,
60
51
};